From patchwork Tue Jan 22 18:07:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ben Whitten X-Patchwork-Id: 1029428 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="sIurZ1Kh"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43kbxq0HCTz9s3q for ; Wed, 23 Jan 2019 05:08:15 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726300AbfAVSHz (ORCPT ); Tue, 22 Jan 2019 13:07:55 -0500 Received: from mail-wm1-f65.google.com ([209.85.128.65]:35188 "EHLO mail-wm1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725950AbfAVSHx (ORCPT ); Tue, 22 Jan 2019 13:07:53 -0500 Received: by mail-wm1-f65.google.com with SMTP id t200so15314279wmt.0; Tue, 22 Jan 2019 10:07:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Ya3H+ZTnuGjJNr1EVqWxISdggU9hjIWwY99VhY5fSOQ=; b=sIurZ1Khzxeky71LvNH5yiZTchOZBKTMIsZ02gW7eR1a/gbcf3RDanTHQQsGcb7XYP l9Xc/eiPvxG1YfdOcrKgYKgP+pB6RoJxplUCa7mcZlaXZTX10Db17ChmywD0DIEiPfsn bAhMSgLDyxUezQL+xGLnwMZw+QVIGlN+G7PUz1RN+cmYzTl4QKqM5VgZhMRDWV7mRL6J FIyt8+enN+mtHadayttpGAzgv1nAEDnQB19iVmjtTUJcC7HgaKXVQHKubuAccla4rij8 Q0OGoxMdCypwkgC0kWpmzhzpTYCyIXVaNoVmZ2RMOXrpKEyU0ak4HMufA5vQ1Kn6f+y6 BF/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=Ya3H+ZTnuGjJNr1EVqWxISdggU9hjIWwY99VhY5fSOQ=; b=e5mUDsXAIrGsQFri6FivGnjZ+5hQZJ49+IHO5aV77+gjGbb99NyHzmfaLBnuYslBl2 zZHYHvn7jryFrOhK5ae2AFoTGUOeO4IvBDUOANYYjSTBce+zn3oZ0Jrp5F6zUb92ENrZ pvO4XRGYZYjV3fdK1U+Ql/2DmdEsHBkaySRfczeLGzovtsGma2uAauEkqmEteVUmiaqm 2wmsOqN4kDYiKW1UqbDbmcstejd3uUF3vscPVFU1lLgJ+oxq7hTqfwjH7bkKe8/ZU41+ iRS7S6hSOjeFgSamqIEFaXIUASNSKgZkK2gbMu5etpgtTYob36EFMGhNsmFSnhoiaXb5 1qmA== X-Gm-Message-State: AJcUukdAGgxRpz27rTerj19km6FcDn8HIR9zPT1G+1Jz6eJw/vTTXIvH 6ZxV9RC0T2zgVgiVoEkYZOo= X-Google-Smtp-Source: ALg8bN4AugS+kNuINBnjbM1m2aS/IMlpniXnHKjWk/OlgZfwUYpkwoRresBu3gDrFagXpXx84ezaXw== X-Received: by 2002:a1c:400b:: with SMTP id n11mr4860816wma.85.1548180470841; Tue, 22 Jan 2019 10:07:50 -0800 (PST) Received: from Sarah.lan (229.98.125.91.dyn.plus.net. [91.125.98.229]) by smtp.gmail.com with ESMTPSA id 129sm93804220wmd.18.2019.01.22.10.07.49 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 22 Jan 2019 10:07:50 -0800 (PST) From: Ben Whitten X-Google-Original-From: Ben Whitten To: afaerber@suse.de Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, mark.rutland@arm.com, linux-lpwan@lists.infradead.org, robh@kernel.org, Ben Whitten , "David S. Miller" , Rob Herring Subject: [PATCH v2 lora-next 1/4] dt-bindings: lora: sx130x: add basic documentation Date: Tue, 22 Jan 2019 18:07:26 +0000 Message-Id: <20190122180729.1834-2-ben.whitten@lairdtech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190122180729.1834-1-ben.whitten@lairdtech.com> References: <20190122180729.1834-1-ben.whitten@lairdtech.com> MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org From: Ben Whitten Add basic documentation in YAML format for the SX130x series concentrators from Semtech. Required is; the location on the SPI bus and the compatible string. Signed-off-by: Ben Whitten --- v1 -> v2: * Dropped reset-gpios, radio-spi from required. * Dropped spi-max-frequency from binding. * Changed compatible to allow fallback from SX1308 to SX1301. * Wording changes in commit and descriptions. * Dual licence * Incorperate Robs comments on child node and spi wrapper --- .../bindings/net/lora/semtech,sx130x.yaml | 96 +++++++++++++++++++ 1 file changed, 96 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/lora/semtech,sx130x.yaml diff --git a/Documentation/devicetree/bindings/net/lora/semtech,sx130x.yaml b/Documentation/devicetree/bindings/net/lora/semtech,sx130x.yaml new file mode 100644 index 000000000000..41919fb67ec4 --- /dev/null +++ b/Documentation/devicetree/bindings/net/lora/semtech,sx130x.yaml @@ -0,0 +1,96 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/lora/semtech,sx130x.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Semtech LoRa concentrator + +maintainers: + - Andreas Färber + - Ben Whitten + +description: | + Semtech LoRa concentrator SX130x digital baseband chip is capable of + demodulating LoRa signals on 8 channels simultaneously. + + It is typically paired with two SX125x IQ radios controlled over an + SPI directly from the concentrator. + + The concentrator itself is controlled over SPI. + +properties: + compatible: + items: + - enum: + - semtech,sx1308 + - enum: + - semtech,sx1301 + + reg: + maxItems: 1 + description: The chip select on the SPI bus. + + reset-gpios: + maxItems: 1 + description: A connection of the reset gpio line. + + radio-spi: + type: object + description: The concentrator can have two radios connected which are + contained within the following node. + + properties: + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + patternProperties: + "^[a-zA-Z0-9]@[0-1]$": + properties: + reg: + maxItems: 1 + required: + - reg + + required: + - '#address-cells' + - '#size-cells' + +required: + - compatible + - reg + +examples: + - | + + #include + + spi { + #address-cells = <1>; + #size-cells = <0>; + + concentrator0: lora@0 { + compatible = "semtech,sx1301"; + reg = <0>; + reset-gpios = <&pioB 27 GPIO_ACTIVE_HIGH>; + spi-max-frequency = <8000000>; + + radio-spi { + #address-cells = <1>; + #size-cells = <0>; + + radio0: lora@0 { + compatible = "semtech,sx1257"; + reg = <0>; + }; + + radio1: lora@1 { + compatible = "semtech,sx1257"; + reg = <1>; + }; + }; + }; + }; From patchwork Tue Jan 22 18:07:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ben Whitten X-Patchwork-Id: 1029429 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; 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[91.125.98.229]) by smtp.gmail.com with ESMTPSA id 129sm93804220wmd.18.2019.01.22.10.07.51 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 22 Jan 2019 10:07:51 -0800 (PST) From: Ben Whitten X-Google-Original-From: Ben Whitten To: afaerber@suse.de Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, mark.rutland@arm.com, linux-lpwan@lists.infradead.org, robh@kernel.org, Ben Whitten , "David S. Miller" , Rob Herring Subject: [PATCH v2 lora-next 2/4] dt-bindings: lora: sx125x: add basic documentation Date: Tue, 22 Jan 2019 18:07:27 +0000 Message-Id: <20190122180729.1834-3-ben.whitten@lairdtech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190122180729.1834-1-ben.whitten@lairdtech.com> References: <20190122180729.1834-1-ben.whitten@lairdtech.com> MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org From: Ben Whitten The SX125x family are IQ radio transceivers from Semtech configured over SPI, they are typically connected to an SX130x series concentrator however may be connected to a host directly. Required properties include the radio number of the host or concentrator bus. Signed-off-by: Ben Whitten --- v1 -> v2: * Dropped spi-max-frequency binding * Wording changes to commit and descriptions * Added spi wrapper suggested by Rob H * Dual licence --- .../bindings/net/lora/semtech,sx125x.yaml | 44 +++++++++++++++++++ 1 file changed, 44 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/lora/semtech,sx125x.yaml diff --git a/Documentation/devicetree/bindings/net/lora/semtech,sx125x.yaml b/Documentation/devicetree/bindings/net/lora/semtech,sx125x.yaml new file mode 100644 index 000000000000..4a51a251d97f --- /dev/null +++ b/Documentation/devicetree/bindings/net/lora/semtech,sx125x.yaml @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/lora/semtech,sx125x.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Semtech IQ modulator/de-modulator transeiver + +maintainers: + - Andreas Färber + - Ben Whitten + +description: | + The SX125x family are transceivers capable of supporting multiple constant + and non-constant envelope modulation schemes. + +properties: + compatible: + items: + - enum: + - semtech,sx1255 + - semtech,sx1257 + - semtech,sx1258 + + reg: + maxItems: 1 + description: The chip select on the SPI bus or radio number in concentrator + , with radio A = 0 and radio B = 1. + +required: + - compatible + - reg + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + radio0: lora@0 { + compatible = "semtech,sx1257"; + reg = <0>; + }; + }; From patchwork Tue Jan 22 18:07:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Whitten X-Patchwork-Id: 1029425 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="b+sf+BPh"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43kbxW4bYkz9sDB for ; Wed, 23 Jan 2019 05:07:59 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726604AbfAVSH5 (ORCPT ); Tue, 22 Jan 2019 13:07:57 -0500 Received: from mail-wm1-f65.google.com ([209.85.128.65]:53732 "EHLO mail-wm1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726216AbfAVSH4 (ORCPT ); Tue, 22 Jan 2019 13:07:56 -0500 Received: by mail-wm1-f65.google.com with SMTP id d15so15126629wmb.3; Tue, 22 Jan 2019 10:07:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=8px0zs5XB/4ChUB1gs+Hi0NzZO2T0KRcyHZEa6MOb1I=; b=b+sf+BPheANdPAJPuKGQ22h4pdW+44U6cQsBkQ5Rh4JCQkBW44QCcuuTgrg+FoWhek daghuExiiyePnXd5yhHClan6hXulZbFD9NsPLudkhWBfE+C51MPG5+Kp9f0GgqZRpLg9 hjNkSWvUPl0e+wR6LW+jOPnjQbi7Op/1jq9hhIOujW4HCyXy0fZ1SDto+Y07UcW7RyHM JtuSkpRAlQ21QM0yl6JDd9Av7xWPLZta+mVjFoo5rjDvYM7NmnnkaEL4PSCDxGbSJzzj eWQByCY5rjTyMfUFEAOtCdjEweHNv1Z4HuH1QnHbqv4W25IfeSOJoz/oObyeDib3uEms fQFQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=8px0zs5XB/4ChUB1gs+Hi0NzZO2T0KRcyHZEa6MOb1I=; b=AyMZVWp8RLYArVzBpldH3Ntj9UKpEiqnHfGD6j5nExZy3rNMMMrpipX+cuP36BWcWI TL53ddAhvCUOpTR1PRkMM8xHRtZilRbLRc8wpbsjGNrEjdUE/jdaJd+s2sON01/cLpj9 qYbQFZzE/4MkScqNjn98Up+qohW2t+QcZWMyA3KcgclmXf7ApqWbK8qMX8bQ0Ls4OZb0 Uk7E1AmWxl5TC4mPsCteIlcrTvOQnvSe0EiAdCfUSKrCYHd9vuKTpBGq3L9nlrfARwGY FdLVMWGC0kbJJucy8Qa6vQV8asCJGQ/iofdQK4FBL53WPvrDvAiMC+N55V/vP7sMP4FI a1tA== X-Gm-Message-State: AJcUukfbRho2uRvHVUbElY9eB4NBoXFTkY/ps6IdswnMWiJez08zFXH4 RzRQXN2qCxQpbh5VDEGRT/Y= X-Google-Smtp-Source: ALg8bN5l/trBauNT6JfZl62VCJnONMeBHcIbZUCUShnainOzJuLg7nCraWl3BqSLua94kEu30hV8+Q== X-Received: by 2002:a1c:dc86:: with SMTP id t128mr5069503wmg.42.1548180473587; Tue, 22 Jan 2019 10:07:53 -0800 (PST) Received: from Sarah.lan (229.98.125.91.dyn.plus.net. [91.125.98.229]) by smtp.gmail.com with ESMTPSA id 129sm93804220wmd.18.2019.01.22.10.07.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 22 Jan 2019 10:07:52 -0800 (PST) From: Ben Whitten X-Google-Original-From: Ben Whitten To: afaerber@suse.de Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, mark.rutland@arm.com, linux-lpwan@lists.infradead.org, robh@kernel.org, Ben Whitten , "David S. Miller" , Rob Herring Subject: [PATCH v2 lora-next 3/4] dt-bindings: lora: sx125x: add clock bindings Date: Tue, 22 Jan 2019 18:07:28 +0000 Message-Id: <20190122180729.1834-4-ben.whitten@lairdtech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190122180729.1834-1-ben.whitten@lairdtech.com> References: <20190122180729.1834-1-ben.whitten@lairdtech.com> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org From: Ben Whitten The SX125x consumes a clock (FXOSC) ranging from 32 to 36 MHz. If the radio is coupled with an SX130x the radio is therefor operating in master mode and it may also provide a gated version of this clock for the concentrator. In this case the concentrator is expecting a 32 MHz input clock. In the example we connect to the "txco" clock source, represented by a fixed clock. The radio also provides a clock output named "clk32m" for consumption by the SX130x concentrator. Signed-off-by: Ben Whitten --- v1 -> v2: * Fixed incorrect usage of clock cells * Fixed wording in commit and descriptions * Dropped enforced clock names --- .../bindings/net/lora/semtech,sx125x.yaml | 28 +++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/Documentation/devicetree/bindings/net/lora/semtech,sx125x.yaml b/Documentation/devicetree/bindings/net/lora/semtech,sx125x.yaml index 4a51a251d97f..8287472fd545 100644 --- a/Documentation/devicetree/bindings/net/lora/semtech,sx125x.yaml +++ b/Documentation/devicetree/bindings/net/lora/semtech,sx125x.yaml @@ -27,12 +27,36 @@ properties: description: The chip select on the SPI bus or radio number in concentrator , with radio A = 0 and radio B = 1. + clocks: + maxItems: 1 + description: Input clock (FXOSC) provider with output ranging from 32 MHz + to 36 MHz. + + clock-names: + maxItems: 1 + description: Input clock (FXOSC) name from provider. + + clock-output-names: + maxItems: 1 + description: Output clock (CLK_OUT) name, clock is gated version of the + input (FXOSC). Used in master mode operation. + + '#clock-cells': + const: 0 + required: - compatible - reg examples: - | + tcxo: dummy32m { + compatible = "fixed-clock"; + clock-frequency = <32000000>; + clock-output-names = "tcxo"; + #clock-cells = <0>; + }; + spi { #address-cells = <1>; #size-cells = <0>; @@ -40,5 +64,9 @@ examples: radio0: lora@0 { compatible = "semtech,sx1257"; reg = <0>; + clocks = <&tcxo>; + clock-names = "tcxo"; + clock-output-names = "clk32m"; + #clock-cells = <0>; }; }; From patchwork Tue Jan 22 18:07:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Whitten X-Patchwork-Id: 1029426 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="L5NkXy7a"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43kbxg1hRdz9s3q for ; Wed, 23 Jan 2019 05:08:07 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726741AbfAVSH7 (ORCPT ); Tue, 22 Jan 2019 13:07:59 -0500 Received: from mail-wm1-f66.google.com ([209.85.128.66]:56255 "EHLO mail-wm1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726268AbfAVSH4 (ORCPT ); Tue, 22 Jan 2019 13:07:56 -0500 Received: by mail-wm1-f66.google.com with SMTP id y139so15024910wmc.5; Tue, 22 Jan 2019 10:07:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=hZeBjCu63s+G7vddlBdkWNetlj8fXMGpFNN+/TY6MRo=; b=L5NkXy7aTZ8XKkEQ/JkvZbIskcmBYB+a3VnftUaqDil89m7SsIgq3oxan6rwJ8Avhl 2GSb+9q5bBIpRP9UI6vGES+Jb6fL8G9XX0udqBOFDvAdiib2mik73HXTqJH8yx3EtEMY tQBLiPjLIg/7g/vaCgvW7KWDXZ6+UWJLPFwkxpRnS85dtHRswFJwShPLAVW8CddnsbjR 9XCsOnWmoqn68FVwVypwOLAH0QK+S4/4sHQUViVeOQuEzPrl1sT5PZwIDe5lTrw/T11T ZUBJNS6T+MwzqorWoQd7LfNE1kKTH4BMKzf/G44KtXedniuOuLTjw9B+dBsDGGEiTl8e sD0g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=hZeBjCu63s+G7vddlBdkWNetlj8fXMGpFNN+/TY6MRo=; b=dKiFHC9p9meIV39Rp/ipKivAKo0L/DsZkJOhKSR1E8Fo/UTFAA0j+21asx6KsUCajW D6PoRomTVGSBNQo8pRgN5WksJ2lLpt/+lV5TbS4nCA3jYSjeSosfZH/Hd6cYGMO83K7p Kc3tiY0QH4YNmVjFurbDAzKVAfk9bQsJffR+LsqM5T+f7pbuzZ6J+rRDDH4E2wXbRfFF KZJWaggYYobib5+iuAiO2ZUzHu6Q5UsRr8Axn49YkLA6V7hvp4yvOFCDqjsSWS8Ml+Lw UbDFzZRwZHUD3gMB7a0aZ/fx1tVbHUjMiwoInlK9S12MsNcX/VL6DYkBxNi4apeBwRdE QocQ== X-Gm-Message-State: AJcUukdHJXcriHfWkAlGk7F3aSTBz2ggagl3/VJ1Lz9cdXZWKxRmnPCp wFFfQWxDTmAyh4TdsZ9SGJc= X-Google-Smtp-Source: ALg8bN5Zo0pemL2//iH2rmrKltZVYNT0Zjv+/EW6dVIXXeVSjLinkFlnrHqbdKr7OL/h2lXJU/Dj6g== X-Received: by 2002:a1c:df46:: with SMTP id w67mr4894994wmg.51.1548180474781; Tue, 22 Jan 2019 10:07:54 -0800 (PST) Received: from Sarah.lan (229.98.125.91.dyn.plus.net. [91.125.98.229]) by smtp.gmail.com with ESMTPSA id 129sm93804220wmd.18.2019.01.22.10.07.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 22 Jan 2019 10:07:54 -0800 (PST) From: Ben Whitten X-Google-Original-From: Ben Whitten To: afaerber@suse.de Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, mark.rutland@arm.com, linux-lpwan@lists.infradead.org, robh@kernel.org, Ben Whitten , "David S. Miller" , Rob Herring Subject: [PATCH v2 lora-next 4/4] dt-bindings: lora: sx130x: add clock bindings Date: Tue, 22 Jan 2019 18:07:29 +0000 Message-Id: <20190122180729.1834-5-ben.whitten@lairdtech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190122180729.1834-1-ben.whitten@lairdtech.com> References: <20190122180729.1834-1-ben.whitten@lairdtech.com> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org From: Ben Whitten The SX130x family consumes two clocks, a 32 MHz clock provided by a connected IQ transceiver, and a 133 MHz high speed clock. In the example we connect the concentrator to a fixed clock providing the 133 MHz high speed clock, and we connect to a connected transceiver 32 MHz clock. The connected radios are both fed from a fixed 32 MHz clock, with only one being the clock source back to the SX130x concentrator. Signed-off-by: Ben Whitten --- v1 -> v2: * Fixed incorrect usage of clock cells * Fixed wording in commit and descriptions --- .../bindings/net/lora/semtech,sx130x.yaml | 39 ++++++++++++++++++- 1 file changed, 38 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/net/lora/semtech,sx130x.yaml b/Documentation/devicetree/bindings/net/lora/semtech,sx130x.yaml index 41919fb67ec4..6f9db3c84385 100644 --- a/Documentation/devicetree/bindings/net/lora/semtech,sx130x.yaml +++ b/Documentation/devicetree/bindings/net/lora/semtech,sx130x.yaml @@ -15,7 +15,8 @@ description: | demodulating LoRa signals on 8 channels simultaneously. It is typically paired with two SX125x IQ radios controlled over an - SPI directly from the concentrator. + SPI directly from the concentrator. One of the radios will provide + a 32 MHz clock back into the concentrator. The concentrator itself is controlled over SPI. @@ -35,6 +36,20 @@ properties: maxItems: 1 description: A connection of the reset gpio line. + clocks: + maxItems: 2 + items: + - description: 32 MHz clock provider (CLK32M) + - description: 133 MHz high speed clock provider (CLKHS) + description: The chip requires two clock inputs; A 32MHz clock at CMOS + level which is provided from a connected radio. + And a 133MHz high speed clock at CMOS level provided by an oscillator. + + clock-names: + maxItems: 2 + description: Input clock (CLK32M) name from provider, Input clock (CLKHS) + name from provider. + radio-spi: type: object description: The concentrator can have two radios connected which are @@ -68,6 +83,20 @@ examples: #include + tcxo: dummy32m { + compatible = "fixed-clock"; + clock-frequency = <32000000>; + clock-output-names = "tcxo"; + #clock-cells = <0>; + }; + + clkhs: dummy133m { + compatible = "fixed-clock"; + clock-frequency = <133000000>; + clock-output-names = "clkhs"; + #clock-cells = <0>; + }; + spi { #address-cells = <1>; #size-cells = <0>; @@ -77,6 +106,8 @@ examples: reg = <0>; reset-gpios = <&pioB 27 GPIO_ACTIVE_HIGH>; spi-max-frequency = <8000000>; + clocks = <&radio1>, <&clkhs>; + clock-names = "clk32m", "clkhs"; radio-spi { #address-cells = <1>; @@ -85,11 +116,17 @@ examples: radio0: lora@0 { compatible = "semtech,sx1257"; reg = <0>; + clocks = <&tcxo>; + clock-names = "tcxo"; }; radio1: lora@1 { compatible = "semtech,sx1257"; reg = <1>; + clocks = <&tcxo>; + clock-names = "tcxo"; + clock-output-names = "clk32m"; + #clock-cells = <0>; }; }; };