From patchwork Thu Dec 27 15:13:09 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ludovic Desroches X-Patchwork-Id: 1018929 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-i2c-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=microchip.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43QYJV46yRz9s7h for ; Fri, 28 Dec 2018 02:13:46 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731078AbeL0PN0 (ORCPT ); Thu, 27 Dec 2018 10:13:26 -0500 Received: from esa4.microchip.iphmx.com ([68.232.154.123]:65339 "EHLO esa4.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727546AbeL0PN0 (ORCPT ); Thu, 27 Dec 2018 10:13:26 -0500 X-IronPort-AV: E=Sophos;i="5.56,405,1539673200"; d="scan'208";a="24405605" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa4.microchip.iphmx.com with ESMTP/TLS/DHE-RSA-AES256-SHA; 27 Dec 2018 08:13:25 -0700 Received: from M43218.corp.atmel.com (10.10.76.4) by chn-sv-exch03.mchp-main.com (10.10.76.49) with Microsoft SMTP Server id 14.3.352.0; Thu, 27 Dec 2018 08:13:49 -0700 From: Ludovic Desroches To: , CC: , , , , , , Ludovic Desroches Subject: [PATCH v4 1/3] i2c: at91: segregate master mode specific code from probe and init func Date: Thu, 27 Dec 2018 16:13:09 +0100 Message-ID: <20181227151311.20107-2-ludovic.desroches@microchip.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20181227151311.20107-1-ludovic.desroches@microchip.com> References: <20181227151311.20107-1-ludovic.desroches@microchip.com> MIME-Version: 1.0 Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org From: Juergen Fitschen In order to implement slave mode support for the at91 hardware we have to segregate all master mode specific function parts from the general parts. The upcoming slave mode patch will call its sepcific probe resp. init function instead of the master mode functions after the shared general code has been executed. This concept has been influenced by the i2c-designware driver. Signed-off-by: Juergen Fitschen Signed-off-by: Ludovic Desroches --- drivers/i2c/busses/i2c-at91.c | 90 +++++++++++++++++++++-------------- 1 file changed, 55 insertions(+), 35 deletions(-) diff --git a/drivers/i2c/busses/i2c-at91.c b/drivers/i2c/busses/i2c-at91.c index 3f3e8b3bf5ff..bc74184462c6 100644 --- a/drivers/i2c/busses/i2c-at91.c +++ b/drivers/i2c/busses/i2c-at91.c @@ -174,10 +174,8 @@ static void at91_twi_irq_restore(struct at91_twi_dev *dev) at91_twi_write(dev, AT91_TWI_IER, dev->imr); } -static void at91_init_twi_bus(struct at91_twi_dev *dev) +static void at91_init_twi_bus_master(struct at91_twi_dev *dev) { - at91_disable_twi_interrupts(dev); - at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_SWRST); /* FIFO should be enabled immediately after the software reset */ if (dev->fifo_size) at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_FIFOEN); @@ -186,6 +184,14 @@ static void at91_init_twi_bus(struct at91_twi_dev *dev) at91_twi_write(dev, AT91_TWI_CWGR, dev->twi_cwgr_reg); } +static void at91_init_twi_bus(struct at91_twi_dev *dev) +{ + at91_disable_twi_interrupts(dev); + at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_SWRST); + + at91_init_twi_bus_master(dev); +} + /* * Calculate symmetric clock as stated in datasheet: * twi_clk = F_MAIN / (2 * (cdiv * (1 << ckdiv) + offset)) @@ -1046,18 +1052,56 @@ static struct at91_twi_pdata *at91_twi_get_driver_data( return (struct at91_twi_pdata *) platform_get_device_id(pdev)->driver_data; } +static int at91_twi_probe_master(struct platform_device *pdev, + u32 phy_addr, struct at91_twi_dev *dev) +{ + int rc; + u32 bus_clk_rate; + + init_completion(&dev->cmd_complete); + + rc = devm_request_irq(&pdev->dev, dev->irq, atmel_twi_interrupt, 0, + dev_name(dev->dev), dev); + if (rc) { + dev_err(dev->dev, "Cannot get irq %d: %d\n", dev->irq, rc); + return rc; + } + + if (dev->dev->of_node) { + rc = at91_twi_configure_dma(dev, phy_addr); + if (rc == -EPROBE_DEFER) + return rc; + } + + if (!of_property_read_u32(pdev->dev.of_node, "atmel,fifo-size", + &dev->fifo_size)) { + dev_info(dev->dev, "Using FIFO (%u data)\n", dev->fifo_size); + } + + rc = of_property_read_u32(dev->dev->of_node, "clock-frequency", + &bus_clk_rate); + if (rc) + bus_clk_rate = DEFAULT_TWI_CLK_HZ; + + at91_calc_twi_clock(dev, bus_clk_rate); + + dev->adapter.algo = &at91_twi_algorithm; + dev->adapter.quirks = &at91_twi_quirks; + + return 0; +} + static int at91_twi_probe(struct platform_device *pdev) { struct at91_twi_dev *dev; struct resource *mem; int rc; u32 phy_addr; - u32 bus_clk_rate; dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL); if (!dev) return -ENOMEM; - init_completion(&dev->cmd_complete); + dev->dev = &pdev->dev; mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); @@ -1077,13 +1121,6 @@ static int at91_twi_probe(struct platform_device *pdev) if (dev->irq < 0) return dev->irq; - rc = devm_request_irq(&pdev->dev, dev->irq, atmel_twi_interrupt, 0, - dev_name(dev->dev), dev); - if (rc) { - dev_err(dev->dev, "Cannot get irq %d: %d\n", dev->irq, rc); - return rc; - } - platform_set_drvdata(pdev, dev); dev->clk = devm_clk_get(dev->dev, NULL); @@ -1095,38 +1132,21 @@ static int at91_twi_probe(struct platform_device *pdev) if (rc) return rc; - if (dev->dev->of_node) { - rc = at91_twi_configure_dma(dev, phy_addr); - if (rc == -EPROBE_DEFER) { - clk_disable_unprepare(dev->clk); - return rc; - } - } - - if (!of_property_read_u32(pdev->dev.of_node, "atmel,fifo-size", - &dev->fifo_size)) { - dev_info(dev->dev, "Using FIFO (%u data)\n", dev->fifo_size); - } - - rc = of_property_read_u32(dev->dev->of_node, "clock-frequency", - &bus_clk_rate); - if (rc) - bus_clk_rate = DEFAULT_TWI_CLK_HZ; - - at91_calc_twi_clock(dev, bus_clk_rate); - at91_init_twi_bus(dev); - snprintf(dev->adapter.name, sizeof(dev->adapter.name), "AT91"); i2c_set_adapdata(&dev->adapter, dev); dev->adapter.owner = THIS_MODULE; dev->adapter.class = I2C_CLASS_DEPRECATED; - dev->adapter.algo = &at91_twi_algorithm; - dev->adapter.quirks = &at91_twi_quirks; dev->adapter.dev.parent = dev->dev; dev->adapter.nr = pdev->id; dev->adapter.timeout = AT91_I2C_TIMEOUT; dev->adapter.dev.of_node = pdev->dev.of_node; + rc = at91_twi_probe_master(pdev, phy_addr, dev); + if (rc) + return rc; + + at91_init_twi_bus(dev); + pm_runtime_set_autosuspend_delay(dev->dev, AUTOSUSPEND_TIMEOUT); pm_runtime_use_autosuspend(dev->dev); pm_runtime_set_active(dev->dev); From patchwork Thu Dec 27 15:13:10 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ludovic Desroches X-Patchwork-Id: 1018927 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-i2c-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=microchip.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43QYJS50JVz9s7h for ; Fri, 28 Dec 2018 02:13:44 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727546AbeL0PNa (ORCPT ); Thu, 27 Dec 2018 10:13:30 -0500 Received: from esa6.microchip.iphmx.com ([216.71.154.253]:36403 "EHLO esa6.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731096AbeL0PN3 (ORCPT ); Thu, 27 Dec 2018 10:13:29 -0500 X-IronPort-AV: E=Sophos;i="5.56,405,1539673200"; d="scan'208";a="21970191" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa6.microchip.iphmx.com with ESMTP/TLS/DHE-RSA-AES256-SHA; 27 Dec 2018 08:13:27 -0700 Received: from M43218.corp.atmel.com (10.10.76.4) by chn-sv-exch03.mchp-main.com (10.10.76.49) with Microsoft SMTP Server id 14.3.352.0; Thu, 27 Dec 2018 08:13:51 -0700 From: Ludovic Desroches To: , CC: , , , , , , Ludovic Desroches Subject: [PATCH v4 2/3] i2c: at91: split driver into core and master file Date: Thu, 27 Dec 2018 16:13:10 +0100 Message-ID: <20181227151311.20107-3-ludovic.desroches@microchip.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20181227151311.20107-1-ludovic.desroches@microchip.com> References: <20181227151311.20107-1-ludovic.desroches@microchip.com> MIME-Version: 1.0 Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org From: Juergen Fitschen The single file i2c-at91.c has been split into core code (i2c-at91-core.c) and master mode specific code (i2c-at91-master.c). This should enhance maintainability and reduce ifdeffery for slave mode related code. The code itself hasn't been touched. Shared functions only had to be made non-static. Furthermore, includes have been cleaned up. Signed-off-by: Juergen Fitschen [ludovic.desroches@microchip.com: fix checkpatch errors] Signed-off-by: Ludovic Desroches --- MAINTAINERS | 3 +- drivers/i2c/busses/Makefile | 1 + drivers/i2c/busses/i2c-at91-core.c | 373 ++++++++++++++ .../busses/{i2c-at91.c => i2c-at91-master.c} | 467 +----------------- drivers/i2c/busses/i2c-at91.h | 151 ++++++ 5 files changed, 531 insertions(+), 464 deletions(-) create mode 100644 drivers/i2c/busses/i2c-at91-core.c rename drivers/i2c/busses/{i2c-at91.c => i2c-at91-master.c} (67%) create mode 100644 drivers/i2c/busses/i2c-at91.h diff --git a/MAINTAINERS b/MAINTAINERS index 82dc44b09a7e..d61941db6933 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -9873,7 +9873,8 @@ MICROCHIP I2C DRIVER M: Ludovic Desroches L: linux-i2c@vger.kernel.org S: Supported -F: drivers/i2c/busses/i2c-at91.c +F: drivers/i2c/busses/i2c-at91.h +F: drivers/i2c/busses/i2c-at91-*.c MICROCHIP ISC DRIVER M: Eugen Hristev diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile index 5f0cb6915969..ea75a777940e 100644 --- a/drivers/i2c/busses/Makefile +++ b/drivers/i2c/busses/Makefile @@ -35,6 +35,7 @@ obj-$(CONFIG_I2C_POWERMAC) += i2c-powermac.o obj-$(CONFIG_I2C_ALTERA) += i2c-altera.o obj-$(CONFIG_I2C_ASPEED) += i2c-aspeed.o obj-$(CONFIG_I2C_AT91) += i2c-at91.o +i2c-at91-objs := i2c-at91-core.o i2c-at91-master.o obj-$(CONFIG_I2C_AU1550) += i2c-au1550.o obj-$(CONFIG_I2C_AXXIA) += i2c-axxia.o obj-$(CONFIG_I2C_BCM2835) += i2c-bcm2835.o diff --git a/drivers/i2c/busses/i2c-at91-core.c b/drivers/i2c/busses/i2c-at91-core.c new file mode 100644 index 000000000000..5d9c6c81e6ab --- /dev/null +++ b/drivers/i2c/busses/i2c-at91-core.c @@ -0,0 +1,373 @@ +/* + * i2c Support for Atmel's AT91 Two-Wire Interface (TWI) + * + * Copyright (C) 2011 Weinmann Medical GmbH + * Author: Nikolaus Voss + * + * Evolved from original work by: + * Copyright (C) 2004 Rick Bronson + * Converted to 2.6 by Andrew Victor + * + * Borrowed heavily from original work by: + * Copyright (C) 2000 Philip Edelbrock + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "i2c-at91.h" + +unsigned at91_twi_read(struct at91_twi_dev *dev, unsigned reg) +{ + return readl_relaxed(dev->base + reg); +} + +void at91_twi_write(struct at91_twi_dev *dev, unsigned reg, unsigned val) +{ + writel_relaxed(val, dev->base + reg); +} + +void at91_disable_twi_interrupts(struct at91_twi_dev *dev) +{ + at91_twi_write(dev, AT91_TWI_IDR, AT91_TWI_INT_MASK); +} + +void at91_twi_irq_save(struct at91_twi_dev *dev) +{ + dev->imr = at91_twi_read(dev, AT91_TWI_IMR) & AT91_TWI_INT_MASK; + at91_disable_twi_interrupts(dev); +} + +void at91_twi_irq_restore(struct at91_twi_dev *dev) +{ + at91_twi_write(dev, AT91_TWI_IER, dev->imr); +} + +void at91_init_twi_bus(struct at91_twi_dev *dev) +{ + at91_disable_twi_interrupts(dev); + at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_SWRST); + + at91_init_twi_bus_master(dev); +} + +static struct at91_twi_pdata at91rm9200_config = { + .clk_max_div = 5, + .clk_offset = 3, + .has_unre_flag = true, + .has_alt_cmd = false, + .has_hold_field = false, +}; + +static struct at91_twi_pdata at91sam9261_config = { + .clk_max_div = 5, + .clk_offset = 4, + .has_unre_flag = false, + .has_alt_cmd = false, + .has_hold_field = false, +}; + +static struct at91_twi_pdata at91sam9260_config = { + .clk_max_div = 7, + .clk_offset = 4, + .has_unre_flag = false, + .has_alt_cmd = false, + .has_hold_field = false, +}; + +static struct at91_twi_pdata at91sam9g20_config = { + .clk_max_div = 7, + .clk_offset = 4, + .has_unre_flag = false, + .has_alt_cmd = false, + .has_hold_field = false, +}; + +static struct at91_twi_pdata at91sam9g10_config = { + .clk_max_div = 7, + .clk_offset = 4, + .has_unre_flag = false, + .has_alt_cmd = false, + .has_hold_field = false, +}; + +static const struct platform_device_id at91_twi_devtypes[] = { + { + .name = "i2c-at91rm9200", + .driver_data = (unsigned long) &at91rm9200_config, + }, { + .name = "i2c-at91sam9261", + .driver_data = (unsigned long) &at91sam9261_config, + }, { + .name = "i2c-at91sam9260", + .driver_data = (unsigned long) &at91sam9260_config, + }, { + .name = "i2c-at91sam9g20", + .driver_data = (unsigned long) &at91sam9g20_config, + }, { + .name = "i2c-at91sam9g10", + .driver_data = (unsigned long) &at91sam9g10_config, + }, { + /* sentinel */ + } +}; + +#if defined(CONFIG_OF) +static struct at91_twi_pdata at91sam9x5_config = { + .clk_max_div = 7, + .clk_offset = 4, + .has_unre_flag = false, + .has_alt_cmd = false, + .has_hold_field = false, +}; + +static struct at91_twi_pdata sama5d4_config = { + .clk_max_div = 7, + .clk_offset = 4, + .has_unre_flag = false, + .has_alt_cmd = false, + .has_hold_field = true, +}; + +static struct at91_twi_pdata sama5d2_config = { + .clk_max_div = 7, + .clk_offset = 4, + .has_unre_flag = true, + .has_alt_cmd = true, + .has_hold_field = true, +}; + +static const struct of_device_id atmel_twi_dt_ids[] = { + { + .compatible = "atmel,at91rm9200-i2c", + .data = &at91rm9200_config, + }, { + .compatible = "atmel,at91sam9260-i2c", + .data = &at91sam9260_config, + }, { + .compatible = "atmel,at91sam9261-i2c", + .data = &at91sam9261_config, + }, { + .compatible = "atmel,at91sam9g20-i2c", + .data = &at91sam9g20_config, + }, { + .compatible = "atmel,at91sam9g10-i2c", + .data = &at91sam9g10_config, + }, { + .compatible = "atmel,at91sam9x5-i2c", + .data = &at91sam9x5_config, + }, { + .compatible = "atmel,sama5d4-i2c", + .data = &sama5d4_config, + }, { + .compatible = "atmel,sama5d2-i2c", + .data = &sama5d2_config, + }, { + /* sentinel */ + } +}; +MODULE_DEVICE_TABLE(of, atmel_twi_dt_ids); +#endif + +static struct at91_twi_pdata *at91_twi_get_driver_data( + struct platform_device *pdev) +{ + if (pdev->dev.of_node) { + const struct of_device_id *match; + match = of_match_node(atmel_twi_dt_ids, pdev->dev.of_node); + if (!match) + return NULL; + return (struct at91_twi_pdata *)match->data; + } + return (struct at91_twi_pdata *) platform_get_device_id(pdev)->driver_data; +} + +static int at91_twi_probe(struct platform_device *pdev) +{ + struct at91_twi_dev *dev; + struct resource *mem; + int rc; + u32 phy_addr; + + dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL); + if (!dev) + return -ENOMEM; + + dev->dev = &pdev->dev; + + mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!mem) + return -ENODEV; + phy_addr = mem->start; + + dev->pdata = at91_twi_get_driver_data(pdev); + if (!dev->pdata) + return -ENODEV; + + dev->base = devm_ioremap_resource(&pdev->dev, mem); + if (IS_ERR(dev->base)) + return PTR_ERR(dev->base); + + dev->irq = platform_get_irq(pdev, 0); + if (dev->irq < 0) + return dev->irq; + + platform_set_drvdata(pdev, dev); + + dev->clk = devm_clk_get(dev->dev, NULL); + if (IS_ERR(dev->clk)) { + dev_err(dev->dev, "no clock defined\n"); + return -ENODEV; + } + clk_prepare_enable(dev->clk); + + snprintf(dev->adapter.name, sizeof(dev->adapter.name), "AT91"); + i2c_set_adapdata(&dev->adapter, dev); + dev->adapter.owner = THIS_MODULE; + dev->adapter.class = I2C_CLASS_DEPRECATED; + dev->adapter.dev.parent = dev->dev; + dev->adapter.nr = pdev->id; + dev->adapter.timeout = AT91_I2C_TIMEOUT; + dev->adapter.dev.of_node = pdev->dev.of_node; + + rc = at91_twi_probe_master(pdev, phy_addr, dev); + if (rc) + return rc; + + at91_init_twi_bus(dev); + + pm_runtime_set_autosuspend_delay(dev->dev, AUTOSUSPEND_TIMEOUT); + pm_runtime_use_autosuspend(dev->dev); + pm_runtime_set_active(dev->dev); + pm_runtime_enable(dev->dev); + + rc = i2c_add_numbered_adapter(&dev->adapter); + if (rc) { + clk_disable_unprepare(dev->clk); + + pm_runtime_disable(dev->dev); + pm_runtime_set_suspended(dev->dev); + + return rc; + } + + dev_info(dev->dev, "AT91 i2c bus driver (hw version: %#x).\n", + at91_twi_read(dev, AT91_TWI_VER)); + return 0; +} + +static int at91_twi_remove(struct platform_device *pdev) +{ + struct at91_twi_dev *dev = platform_get_drvdata(pdev); + + i2c_del_adapter(&dev->adapter); + clk_disable_unprepare(dev->clk); + + pm_runtime_disable(dev->dev); + pm_runtime_set_suspended(dev->dev); + + return 0; +} + +#ifdef CONFIG_PM + +static int at91_twi_runtime_suspend(struct device *dev) +{ + struct at91_twi_dev *twi_dev = dev_get_drvdata(dev); + + clk_disable_unprepare(twi_dev->clk); + + pinctrl_pm_select_sleep_state(dev); + + return 0; +} + +static int at91_twi_runtime_resume(struct device *dev) +{ + struct at91_twi_dev *twi_dev = dev_get_drvdata(dev); + + pinctrl_pm_select_default_state(dev); + + return clk_prepare_enable(twi_dev->clk); +} + +static int at91_twi_suspend_noirq(struct device *dev) +{ + if (!pm_runtime_status_suspended(dev)) + at91_twi_runtime_suspend(dev); + + return 0; +} + +static int at91_twi_resume_noirq(struct device *dev) +{ + struct at91_twi_dev *twi_dev = dev_get_drvdata(dev); + int ret; + + if (!pm_runtime_status_suspended(dev)) { + ret = at91_twi_runtime_resume(dev); + if (ret) + return ret; + } + + pm_runtime_mark_last_busy(dev); + pm_request_autosuspend(dev); + + at91_init_twi_bus(twi_dev); + + return 0; +} + +static const struct dev_pm_ops at91_twi_pm = { + .suspend_noirq = at91_twi_suspend_noirq, + .resume_noirq = at91_twi_resume_noirq, + .runtime_suspend = at91_twi_runtime_suspend, + .runtime_resume = at91_twi_runtime_resume, +}; + +#define at91_twi_pm_ops (&at91_twi_pm) +#else +#define at91_twi_pm_ops NULL +#endif + +static struct platform_driver at91_twi_driver = { + .probe = at91_twi_probe, + .remove = at91_twi_remove, + .id_table = at91_twi_devtypes, + .driver = { + .name = "at91_i2c", + .of_match_table = of_match_ptr(atmel_twi_dt_ids), + .pm = at91_twi_pm_ops, + }, +}; + +static int __init at91_twi_init(void) +{ + return platform_driver_register(&at91_twi_driver); +} + +static void __exit at91_twi_exit(void) +{ + platform_driver_unregister(&at91_twi_driver); +} + +subsys_initcall(at91_twi_init); +module_exit(at91_twi_exit); + +MODULE_AUTHOR("Nikolaus Voss "); +MODULE_DESCRIPTION("I2C (TWI) driver for Atmel AT91"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:at91_i2c"); diff --git a/drivers/i2c/busses/i2c-at91.c b/drivers/i2c/busses/i2c-at91-master.c similarity index 67% rename from drivers/i2c/busses/i2c-at91.c rename to drivers/i2c/busses/i2c-at91-master.c index bc74184462c6..4ef335f95506 100644 --- a/drivers/i2c/busses/i2c-at91.c +++ b/drivers/i2c/busses/i2c-at91-master.c @@ -25,156 +25,15 @@ #include #include #include -#include #include #include #include -#include #include #include -#include - -#define DEFAULT_TWI_CLK_HZ 100000 /* max 400 Kbits/s */ -#define AT91_I2C_TIMEOUT msecs_to_jiffies(100) /* transfer timeout */ -#define AT91_I2C_DMA_THRESHOLD 8 /* enable DMA if transfer size is bigger than this threshold */ -#define AUTOSUSPEND_TIMEOUT 2000 -#define AT91_I2C_MAX_ALT_CMD_DATA_SIZE 256 - -/* AT91 TWI register definitions */ -#define AT91_TWI_CR 0x0000 /* Control Register */ -#define AT91_TWI_START BIT(0) /* Send a Start Condition */ -#define AT91_TWI_STOP BIT(1) /* Send a Stop Condition */ -#define AT91_TWI_MSEN BIT(2) /* Master Transfer Enable */ -#define AT91_TWI_MSDIS BIT(3) /* Master Transfer Disable */ -#define AT91_TWI_SVEN BIT(4) /* Slave Transfer Enable */ -#define AT91_TWI_SVDIS BIT(5) /* Slave Transfer Disable */ -#define AT91_TWI_QUICK BIT(6) /* SMBus quick command */ -#define AT91_TWI_SWRST BIT(7) /* Software Reset */ -#define AT91_TWI_ACMEN BIT(16) /* Alternative Command Mode Enable */ -#define AT91_TWI_ACMDIS BIT(17) /* Alternative Command Mode Disable */ -#define AT91_TWI_THRCLR BIT(24) /* Transmit Holding Register Clear */ -#define AT91_TWI_RHRCLR BIT(25) /* Receive Holding Register Clear */ -#define AT91_TWI_LOCKCLR BIT(26) /* Lock Clear */ -#define AT91_TWI_FIFOEN BIT(28) /* FIFO Enable */ -#define AT91_TWI_FIFODIS BIT(29) /* FIFO Disable */ - -#define AT91_TWI_MMR 0x0004 /* Master Mode Register */ -#define AT91_TWI_IADRSZ_1 0x0100 /* Internal Device Address Size */ -#define AT91_TWI_MREAD BIT(12) /* Master Read Direction */ - -#define AT91_TWI_IADR 0x000c /* Internal Address Register */ - -#define AT91_TWI_CWGR 0x0010 /* Clock Waveform Generator Reg */ -#define AT91_TWI_CWGR_HOLD_MAX 0x1f -#define AT91_TWI_CWGR_HOLD(x) (((x) & AT91_TWI_CWGR_HOLD_MAX) << 24) - -#define AT91_TWI_SR 0x0020 /* Status Register */ -#define AT91_TWI_TXCOMP BIT(0) /* Transmission Complete */ -#define AT91_TWI_RXRDY BIT(1) /* Receive Holding Register Ready */ -#define AT91_TWI_TXRDY BIT(2) /* Transmit Holding Register Ready */ -#define AT91_TWI_OVRE BIT(6) /* Overrun Error */ -#define AT91_TWI_UNRE BIT(7) /* Underrun Error */ -#define AT91_TWI_NACK BIT(8) /* Not Acknowledged */ -#define AT91_TWI_LOCK BIT(23) /* TWI Lock due to Frame Errors */ - -#define AT91_TWI_INT_MASK \ - (AT91_TWI_TXCOMP | AT91_TWI_RXRDY | AT91_TWI_TXRDY | AT91_TWI_NACK) - -#define AT91_TWI_IER 0x0024 /* Interrupt Enable Register */ -#define AT91_TWI_IDR 0x0028 /* Interrupt Disable Register */ -#define AT91_TWI_IMR 0x002c /* Interrupt Mask Register */ -#define AT91_TWI_RHR 0x0030 /* Receive Holding Register */ -#define AT91_TWI_THR 0x0034 /* Transmit Holding Register */ - -#define AT91_TWI_ACR 0x0040 /* Alternative Command Register */ -#define AT91_TWI_ACR_DATAL(len) ((len) & 0xff) -#define AT91_TWI_ACR_DIR BIT(8) - -#define AT91_TWI_FMR 0x0050 /* FIFO Mode Register */ -#define AT91_TWI_FMR_TXRDYM(mode) (((mode) & 0x3) << 0) -#define AT91_TWI_FMR_TXRDYM_MASK (0x3 << 0) -#define AT91_TWI_FMR_RXRDYM(mode) (((mode) & 0x3) << 4) -#define AT91_TWI_FMR_RXRDYM_MASK (0x3 << 4) -#define AT91_TWI_ONE_DATA 0x0 -#define AT91_TWI_TWO_DATA 0x1 -#define AT91_TWI_FOUR_DATA 0x2 - -#define AT91_TWI_FLR 0x0054 /* FIFO Level Register */ - -#define AT91_TWI_FSR 0x0060 /* FIFO Status Register */ -#define AT91_TWI_FIER 0x0064 /* FIFO Interrupt Enable Register */ -#define AT91_TWI_FIDR 0x0068 /* FIFO Interrupt Disable Register */ -#define AT91_TWI_FIMR 0x006c /* FIFO Interrupt Mask Register */ - -#define AT91_TWI_VER 0x00fc /* Version Register */ - -struct at91_twi_pdata { - unsigned clk_max_div; - unsigned clk_offset; - bool has_unre_flag; - bool has_alt_cmd; - bool has_hold_field; - struct at_dma_slave dma_slave; -}; - -struct at91_twi_dma { - struct dma_chan *chan_rx; - struct dma_chan *chan_tx; - struct scatterlist sg[2]; - struct dma_async_tx_descriptor *data_desc; - enum dma_data_direction direction; - bool buf_mapped; - bool xfer_in_progress; -}; - -struct at91_twi_dev { - struct device *dev; - void __iomem *base; - struct completion cmd_complete; - struct clk *clk; - u8 *buf; - size_t buf_len; - struct i2c_msg *msg; - int irq; - unsigned imr; - unsigned transfer_status; - struct i2c_adapter adapter; - unsigned twi_cwgr_reg; - struct at91_twi_pdata *pdata; - bool use_dma; - bool use_alt_cmd; - bool recv_len_abort; - u32 fifo_size; - struct at91_twi_dma dma; -}; - -static unsigned at91_twi_read(struct at91_twi_dev *dev, unsigned reg) -{ - return readl_relaxed(dev->base + reg); -} - -static void at91_twi_write(struct at91_twi_dev *dev, unsigned reg, unsigned val) -{ - writel_relaxed(val, dev->base + reg); -} - -static void at91_disable_twi_interrupts(struct at91_twi_dev *dev) -{ - at91_twi_write(dev, AT91_TWI_IDR, AT91_TWI_INT_MASK); -} - -static void at91_twi_irq_save(struct at91_twi_dev *dev) -{ - dev->imr = at91_twi_read(dev, AT91_TWI_IMR) & AT91_TWI_INT_MASK; - at91_disable_twi_interrupts(dev); -} -static void at91_twi_irq_restore(struct at91_twi_dev *dev) -{ - at91_twi_write(dev, AT91_TWI_IER, dev->imr); -} +#include "i2c-at91.h" -static void at91_init_twi_bus_master(struct at91_twi_dev *dev) +void at91_init_twi_bus_master(struct at91_twi_dev *dev) { /* FIFO should be enabled immediately after the software reset */ if (dev->fifo_size) @@ -184,14 +43,6 @@ static void at91_init_twi_bus_master(struct at91_twi_dev *dev) at91_twi_write(dev, AT91_TWI_CWGR, dev->twi_cwgr_reg); } -static void at91_init_twi_bus(struct at91_twi_dev *dev) -{ - at91_disable_twi_interrupts(dev); - at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_SWRST); - - at91_init_twi_bus_master(dev); -} - /* * Calculate symmetric clock as stated in datasheet: * twi_clk = F_MAIN / (2 * (cdiv * (1 << ckdiv) + offset)) @@ -839,124 +690,6 @@ static const struct i2c_algorithm at91_twi_algorithm = { .functionality = at91_twi_func, }; -static struct at91_twi_pdata at91rm9200_config = { - .clk_max_div = 5, - .clk_offset = 3, - .has_unre_flag = true, - .has_alt_cmd = false, - .has_hold_field = false, -}; - -static struct at91_twi_pdata at91sam9261_config = { - .clk_max_div = 5, - .clk_offset = 4, - .has_unre_flag = false, - .has_alt_cmd = false, - .has_hold_field = false, -}; - -static struct at91_twi_pdata at91sam9260_config = { - .clk_max_div = 7, - .clk_offset = 4, - .has_unre_flag = false, - .has_alt_cmd = false, - .has_hold_field = false, -}; - -static struct at91_twi_pdata at91sam9g20_config = { - .clk_max_div = 7, - .clk_offset = 4, - .has_unre_flag = false, - .has_alt_cmd = false, - .has_hold_field = false, -}; - -static struct at91_twi_pdata at91sam9g10_config = { - .clk_max_div = 7, - .clk_offset = 4, - .has_unre_flag = false, - .has_alt_cmd = false, - .has_hold_field = false, -}; - -static const struct platform_device_id at91_twi_devtypes[] = { - { - .name = "i2c-at91rm9200", - .driver_data = (unsigned long) &at91rm9200_config, - }, { - .name = "i2c-at91sam9261", - .driver_data = (unsigned long) &at91sam9261_config, - }, { - .name = "i2c-at91sam9260", - .driver_data = (unsigned long) &at91sam9260_config, - }, { - .name = "i2c-at91sam9g20", - .driver_data = (unsigned long) &at91sam9g20_config, - }, { - .name = "i2c-at91sam9g10", - .driver_data = (unsigned long) &at91sam9g10_config, - }, { - /* sentinel */ - } -}; - -#if defined(CONFIG_OF) -static struct at91_twi_pdata at91sam9x5_config = { - .clk_max_div = 7, - .clk_offset = 4, - .has_unre_flag = false, - .has_alt_cmd = false, - .has_hold_field = false, -}; - -static struct at91_twi_pdata sama5d4_config = { - .clk_max_div = 7, - .clk_offset = 4, - .has_unre_flag = false, - .has_alt_cmd = false, - .has_hold_field = true, -}; - -static struct at91_twi_pdata sama5d2_config = { - .clk_max_div = 7, - .clk_offset = 4, - .has_unre_flag = true, - .has_alt_cmd = true, - .has_hold_field = true, -}; - -static const struct of_device_id atmel_twi_dt_ids[] = { - { - .compatible = "atmel,at91rm9200-i2c", - .data = &at91rm9200_config, - } , { - .compatible = "atmel,at91sam9260-i2c", - .data = &at91sam9260_config, - } , { - .compatible = "atmel,at91sam9261-i2c", - .data = &at91sam9261_config, - } , { - .compatible = "atmel,at91sam9g20-i2c", - .data = &at91sam9g20_config, - } , { - .compatible = "atmel,at91sam9g10-i2c", - .data = &at91sam9g10_config, - }, { - .compatible = "atmel,at91sam9x5-i2c", - .data = &at91sam9x5_config, - }, { - .compatible = "atmel,sama5d4-i2c", - .data = &sama5d4_config, - }, { - .compatible = "atmel,sama5d2-i2c", - .data = &sama5d2_config, - }, { - /* sentinel */ - } -}; -MODULE_DEVICE_TABLE(of, atmel_twi_dt_ids); -#endif - static int at91_twi_configure_dma(struct at91_twi_dev *dev, u32 phy_addr) { int ret = 0; @@ -1039,21 +772,8 @@ static int at91_twi_configure_dma(struct at91_twi_dev *dev, u32 phy_addr) return ret; } -static struct at91_twi_pdata *at91_twi_get_driver_data( - struct platform_device *pdev) -{ - if (pdev->dev.of_node) { - const struct of_device_id *match; - match = of_match_node(atmel_twi_dt_ids, pdev->dev.of_node); - if (!match) - return NULL; - return (struct at91_twi_pdata *)match->data; - } - return (struct at91_twi_pdata *) platform_get_device_id(pdev)->driver_data; -} - -static int at91_twi_probe_master(struct platform_device *pdev, - u32 phy_addr, struct at91_twi_dev *dev) +int at91_twi_probe_master(struct platform_device *pdev, + u32 phy_addr, struct at91_twi_dev *dev) { int rc; u32 bus_clk_rate; @@ -1090,182 +810,3 @@ static int at91_twi_probe_master(struct platform_device *pdev, return 0; } - -static int at91_twi_probe(struct platform_device *pdev) -{ - struct at91_twi_dev *dev; - struct resource *mem; - int rc; - u32 phy_addr; - - dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL); - if (!dev) - return -ENOMEM; - - dev->dev = &pdev->dev; - - mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!mem) - return -ENODEV; - phy_addr = mem->start; - - dev->pdata = at91_twi_get_driver_data(pdev); - if (!dev->pdata) - return -ENODEV; - - dev->base = devm_ioremap_resource(&pdev->dev, mem); - if (IS_ERR(dev->base)) - return PTR_ERR(dev->base); - - dev->irq = platform_get_irq(pdev, 0); - if (dev->irq < 0) - return dev->irq; - - platform_set_drvdata(pdev, dev); - - dev->clk = devm_clk_get(dev->dev, NULL); - if (IS_ERR(dev->clk)) { - dev_err(dev->dev, "no clock defined\n"); - return -ENODEV; - } - rc = clk_prepare_enable(dev->clk); - if (rc) - return rc; - - snprintf(dev->adapter.name, sizeof(dev->adapter.name), "AT91"); - i2c_set_adapdata(&dev->adapter, dev); - dev->adapter.owner = THIS_MODULE; - dev->adapter.class = I2C_CLASS_DEPRECATED; - dev->adapter.dev.parent = dev->dev; - dev->adapter.nr = pdev->id; - dev->adapter.timeout = AT91_I2C_TIMEOUT; - dev->adapter.dev.of_node = pdev->dev.of_node; - - rc = at91_twi_probe_master(pdev, phy_addr, dev); - if (rc) - return rc; - - at91_init_twi_bus(dev); - - pm_runtime_set_autosuspend_delay(dev->dev, AUTOSUSPEND_TIMEOUT); - pm_runtime_use_autosuspend(dev->dev); - pm_runtime_set_active(dev->dev); - pm_runtime_enable(dev->dev); - - rc = i2c_add_numbered_adapter(&dev->adapter); - if (rc) { - clk_disable_unprepare(dev->clk); - - pm_runtime_disable(dev->dev); - pm_runtime_set_suspended(dev->dev); - - return rc; - } - - dev_info(dev->dev, "AT91 i2c bus driver (hw version: %#x).\n", - at91_twi_read(dev, AT91_TWI_VER)); - return 0; -} - -static int at91_twi_remove(struct platform_device *pdev) -{ - struct at91_twi_dev *dev = platform_get_drvdata(pdev); - - i2c_del_adapter(&dev->adapter); - clk_disable_unprepare(dev->clk); - - pm_runtime_disable(dev->dev); - pm_runtime_set_suspended(dev->dev); - - return 0; -} - -#ifdef CONFIG_PM - -static int at91_twi_runtime_suspend(struct device *dev) -{ - struct at91_twi_dev *twi_dev = dev_get_drvdata(dev); - - clk_disable_unprepare(twi_dev->clk); - - pinctrl_pm_select_sleep_state(dev); - - return 0; -} - -static int at91_twi_runtime_resume(struct device *dev) -{ - struct at91_twi_dev *twi_dev = dev_get_drvdata(dev); - - pinctrl_pm_select_default_state(dev); - - return clk_prepare_enable(twi_dev->clk); -} - -static int at91_twi_suspend_noirq(struct device *dev) -{ - if (!pm_runtime_status_suspended(dev)) - at91_twi_runtime_suspend(dev); - - return 0; -} - -static int at91_twi_resume_noirq(struct device *dev) -{ - struct at91_twi_dev *twi_dev = dev_get_drvdata(dev); - int ret; - - if (!pm_runtime_status_suspended(dev)) { - ret = at91_twi_runtime_resume(dev); - if (ret) - return ret; - } - - pm_runtime_mark_last_busy(dev); - pm_request_autosuspend(dev); - - at91_init_twi_bus(twi_dev); - - return 0; -} - -static const struct dev_pm_ops at91_twi_pm = { - .suspend_noirq = at91_twi_suspend_noirq, - .resume_noirq = at91_twi_resume_noirq, - .runtime_suspend = at91_twi_runtime_suspend, - .runtime_resume = at91_twi_runtime_resume, -}; - -#define at91_twi_pm_ops (&at91_twi_pm) -#else -#define at91_twi_pm_ops NULL -#endif - -static struct platform_driver at91_twi_driver = { - .probe = at91_twi_probe, - .remove = at91_twi_remove, - .id_table = at91_twi_devtypes, - .driver = { - .name = "at91_i2c", - .of_match_table = of_match_ptr(atmel_twi_dt_ids), - .pm = at91_twi_pm_ops, - }, -}; - -static int __init at91_twi_init(void) -{ - return platform_driver_register(&at91_twi_driver); -} - -static void __exit at91_twi_exit(void) -{ - platform_driver_unregister(&at91_twi_driver); -} - -subsys_initcall(at91_twi_init); -module_exit(at91_twi_exit); - -MODULE_AUTHOR("Nikolaus Voss "); -MODULE_DESCRIPTION("I2C (TWI) driver for Atmel AT91"); -MODULE_LICENSE("GPL"); -MODULE_ALIAS("platform:at91_i2c"); diff --git a/drivers/i2c/busses/i2c-at91.h b/drivers/i2c/busses/i2c-at91.h new file mode 100644 index 000000000000..555b1674ddbe --- /dev/null +++ b/drivers/i2c/busses/i2c-at91.h @@ -0,0 +1,151 @@ +/* + * i2c Support for Atmel's AT91 Two-Wire Interface (TWI) + * + * Copyright (C) 2011 Weinmann Medical GmbH + * Author: Nikolaus Voss + * + * Evolved from original work by: + * Copyright (C) 2004 Rick Bronson + * Converted to 2.6 by Andrew Victor + * + * Borrowed heavily from original work by: + * Copyright (C) 2000 Philip Edelbrock + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include + +#define DEFAULT_TWI_CLK_HZ 100000 /* max 400 Kbits/s */ +#define AT91_I2C_TIMEOUT msecs_to_jiffies(100) /* transfer timeout */ +#define AT91_I2C_DMA_THRESHOLD 8 /* enable DMA if transfer size is bigger than this threshold */ +#define AUTOSUSPEND_TIMEOUT 2000 +#define AT91_I2C_MAX_ALT_CMD_DATA_SIZE 256 + +/* AT91 TWI register definitions */ +#define AT91_TWI_CR 0x0000 /* Control Register */ +#define AT91_TWI_START BIT(0) /* Send a Start Condition */ +#define AT91_TWI_STOP BIT(1) /* Send a Stop Condition */ +#define AT91_TWI_MSEN BIT(2) /* Master Transfer Enable */ +#define AT91_TWI_MSDIS BIT(3) /* Master Transfer Disable */ +#define AT91_TWI_SVEN BIT(4) /* Slave Transfer Enable */ +#define AT91_TWI_SVDIS BIT(5) /* Slave Transfer Disable */ +#define AT91_TWI_QUICK BIT(6) /* SMBus quick command */ +#define AT91_TWI_SWRST BIT(7) /* Software Reset */ +#define AT91_TWI_ACMEN BIT(16) /* Alternative Command Mode Enable */ +#define AT91_TWI_ACMDIS BIT(17) /* Alternative Command Mode Disable */ +#define AT91_TWI_THRCLR BIT(24) /* Transmit Holding Register Clear */ +#define AT91_TWI_RHRCLR BIT(25) /* Receive Holding Register Clear */ +#define AT91_TWI_LOCKCLR BIT(26) /* Lock Clear */ +#define AT91_TWI_FIFOEN BIT(28) /* FIFO Enable */ +#define AT91_TWI_FIFODIS BIT(29) /* FIFO Disable */ + +#define AT91_TWI_MMR 0x0004 /* Master Mode Register */ +#define AT91_TWI_IADRSZ_1 0x0100 /* Internal Device Address Size */ +#define AT91_TWI_MREAD BIT(12) /* Master Read Direction */ + +#define AT91_TWI_IADR 0x000c /* Internal Address Register */ + +#define AT91_TWI_CWGR 0x0010 /* Clock Waveform Generator Reg */ +#define AT91_TWI_CWGR_HOLD_MAX 0x1f +#define AT91_TWI_CWGR_HOLD(x) (((x) & AT91_TWI_CWGR_HOLD_MAX) << 24) + +#define AT91_TWI_SR 0x0020 /* Status Register */ +#define AT91_TWI_TXCOMP BIT(0) /* Transmission Complete */ +#define AT91_TWI_RXRDY BIT(1) /* Receive Holding Register Ready */ +#define AT91_TWI_TXRDY BIT(2) /* Transmit Holding Register Ready */ +#define AT91_TWI_OVRE BIT(6) /* Overrun Error */ +#define AT91_TWI_UNRE BIT(7) /* Underrun Error */ +#define AT91_TWI_NACK BIT(8) /* Not Acknowledged */ +#define AT91_TWI_LOCK BIT(23) /* TWI Lock due to Frame Errors */ + +#define AT91_TWI_INT_MASK \ + (AT91_TWI_TXCOMP | AT91_TWI_RXRDY | AT91_TWI_TXRDY | AT91_TWI_NACK) + +#define AT91_TWI_IER 0x0024 /* Interrupt Enable Register */ +#define AT91_TWI_IDR 0x0028 /* Interrupt Disable Register */ +#define AT91_TWI_IMR 0x002c /* Interrupt Mask Register */ +#define AT91_TWI_RHR 0x0030 /* Receive Holding Register */ +#define AT91_TWI_THR 0x0034 /* Transmit Holding Register */ + +#define AT91_TWI_ACR 0x0040 /* Alternative Command Register */ +#define AT91_TWI_ACR_DATAL(len) ((len) & 0xff) +#define AT91_TWI_ACR_DIR BIT(8) + +#define AT91_TWI_FMR 0x0050 /* FIFO Mode Register */ +#define AT91_TWI_FMR_TXRDYM(mode) (((mode) & 0x3) << 0) +#define AT91_TWI_FMR_TXRDYM_MASK (0x3 << 0) +#define AT91_TWI_FMR_RXRDYM(mode) (((mode) & 0x3) << 4) +#define AT91_TWI_FMR_RXRDYM_MASK (0x3 << 4) +#define AT91_TWI_ONE_DATA 0x0 +#define AT91_TWI_TWO_DATA 0x1 +#define AT91_TWI_FOUR_DATA 0x2 + +#define AT91_TWI_FLR 0x0054 /* FIFO Level Register */ + +#define AT91_TWI_FSR 0x0060 /* FIFO Status Register */ +#define AT91_TWI_FIER 0x0064 /* FIFO Interrupt Enable Register */ +#define AT91_TWI_FIDR 0x0068 /* FIFO Interrupt Disable Register */ +#define AT91_TWI_FIMR 0x006c /* FIFO Interrupt Mask Register */ + +#define AT91_TWI_VER 0x00fc /* Version Register */ + +struct at91_twi_pdata { + unsigned clk_max_div; + unsigned clk_offset; + bool has_unre_flag; + bool has_alt_cmd; + bool has_hold_field; + struct at_dma_slave dma_slave; +}; + +struct at91_twi_dma { + struct dma_chan *chan_rx; + struct dma_chan *chan_tx; + struct scatterlist sg[2]; + struct dma_async_tx_descriptor *data_desc; + enum dma_data_direction direction; + bool buf_mapped; + bool xfer_in_progress; +}; + +struct at91_twi_dev { + struct device *dev; + void __iomem *base; + struct completion cmd_complete; + struct clk *clk; + u8 *buf; + size_t buf_len; + struct i2c_msg *msg; + int irq; + unsigned imr; + unsigned transfer_status; + struct i2c_adapter adapter; + unsigned twi_cwgr_reg; + struct at91_twi_pdata *pdata; + bool use_dma; + bool use_alt_cmd; + bool recv_len_abort; + u32 fifo_size; + struct at91_twi_dma dma; +}; + +unsigned at91_twi_read(struct at91_twi_dev *dev, unsigned reg); +void at91_twi_write(struct at91_twi_dev *dev, unsigned reg, unsigned val); +void at91_disable_twi_interrupts(struct at91_twi_dev *dev); +void at91_twi_irq_save(struct at91_twi_dev *dev); +void at91_twi_irq_restore(struct at91_twi_dev *dev); +void at91_init_twi_bus(struct at91_twi_dev *dev); + +void at91_init_twi_bus_master(struct at91_twi_dev *dev); +int at91_twi_probe_master(struct platform_device *pdev, u32 phy_addr, + struct at91_twi_dev *dev); From patchwork Thu Dec 27 15:13:11 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ludovic Desroches X-Patchwork-Id: 1018928 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-i2c-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=microchip.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43QYJT6LNPz9sD9 for ; Fri, 28 Dec 2018 02:13:45 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731107AbeL0PNb (ORCPT ); Thu, 27 Dec 2018 10:13:31 -0500 Received: from esa4.microchip.iphmx.com ([68.232.154.123]:65339 "EHLO esa4.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731098AbeL0PNb (ORCPT ); Thu, 27 Dec 2018 10:13:31 -0500 X-IronPort-AV: E=Sophos;i="5.56,405,1539673200"; d="scan'208";a="24405608" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa4.microchip.iphmx.com with ESMTP/TLS/DHE-RSA-AES256-SHA; 27 Dec 2018 08:13:30 -0700 Received: from M43218.corp.atmel.com (10.10.76.4) by chn-sv-exch03.mchp-main.com (10.10.76.49) with Microsoft SMTP Server id 14.3.352.0; Thu, 27 Dec 2018 08:13:54 -0700 From: Ludovic Desroches To: , CC: , , , , , , Juergen Fitschen , Ludovic Desroches Subject: [PATCH v4 3/3] i2c: at91: added slave mode support Date: Thu, 27 Dec 2018 16:13:11 +0100 Message-ID: <20181227151311.20107-4-ludovic.desroches@microchip.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20181227151311.20107-1-ludovic.desroches@microchip.com> References: <20181227151311.20107-1-ludovic.desroches@microchip.com> MIME-Version: 1.0 Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org From: Juergen Fitschen Slave mode driver is based on the concept of i2c-designware driver. Signed-off-by: Juergen Fitschen [ludovic.desroches@microchip.com: rework Kconfig] Signed-off-by: Ludovic Desroches --- drivers/i2c/busses/Kconfig | 13 +++ drivers/i2c/busses/Makefile | 3 + drivers/i2c/busses/i2c-at91-core.c | 13 ++- drivers/i2c/busses/i2c-at91-slave.c | 147 ++++++++++++++++++++++++++++ drivers/i2c/busses/i2c-at91.h | 30 +++++- 5 files changed, 202 insertions(+), 4 deletions(-) create mode 100644 drivers/i2c/busses/i2c-at91-slave.c diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index f2c681971201..6b1f6dcdf533 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig @@ -387,6 +387,19 @@ config I2C_AT91 the latency to fill the transmission register is too long. If you are facing this situation, use the i2c-gpio driver. +config I2C_AT91_SLAVE_EXPERIMENTAL + tristate "Microchip AT91 I2C experimental slave mode" + depends on I2C_AT91 + select I2C_SLAVE + help + If you say yes to this option, support for the slave mode will be + added. Caution: do not use it for production. This feature has not + been tested in a heavy way, help wanted. + There are known bugs: + - It can hang, on a SAMA5D4, after several transfers. + - There are some mismtaches with a SAMA5D4 as slave and a SAMA5D2 as + master. + config I2C_AU1550 tristate "Au1550/Au1200/Au1300 SMBus interface" depends on MIPS_ALCHEMY diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile index ea75a777940e..59b22fbef90a 100644 --- a/drivers/i2c/busses/Makefile +++ b/drivers/i2c/busses/Makefile @@ -36,6 +36,9 @@ obj-$(CONFIG_I2C_ALTERA) += i2c-altera.o obj-$(CONFIG_I2C_ASPEED) += i2c-aspeed.o obj-$(CONFIG_I2C_AT91) += i2c-at91.o i2c-at91-objs := i2c-at91-core.o i2c-at91-master.o +ifeq ($(CONFIG_I2C_AT91_SLAVE_EXPERIMENTAL),y) + i2c-at91-objs += i2c-at91-slave.o +endif obj-$(CONFIG_I2C_AU1550) += i2c-au1550.o obj-$(CONFIG_I2C_AXXIA) += i2c-axxia.o obj-$(CONFIG_I2C_BCM2835) += i2c-bcm2835.o diff --git a/drivers/i2c/busses/i2c-at91-core.c b/drivers/i2c/busses/i2c-at91-core.c index 5d9c6c81e6ab..c74283fa567f 100644 --- a/drivers/i2c/busses/i2c-at91-core.c +++ b/drivers/i2c/busses/i2c-at91-core.c @@ -60,8 +60,10 @@ void at91_init_twi_bus(struct at91_twi_dev *dev) { at91_disable_twi_interrupts(dev); at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_SWRST); - - at91_init_twi_bus_master(dev); + if (dev->slave_detected) + at91_init_twi_bus_slave(dev); + else + at91_init_twi_bus_master(dev); } static struct at91_twi_pdata at91rm9200_config = { @@ -243,7 +245,12 @@ static int at91_twi_probe(struct platform_device *pdev) dev->adapter.timeout = AT91_I2C_TIMEOUT; dev->adapter.dev.of_node = pdev->dev.of_node; - rc = at91_twi_probe_master(pdev, phy_addr, dev); + dev->slave_detected = i2c_detect_slave_mode(&pdev->dev); + + if (dev->slave_detected) + rc = at91_twi_probe_slave(pdev, phy_addr, dev); + else + rc = at91_twi_probe_master(pdev, phy_addr, dev); if (rc) return rc; diff --git a/drivers/i2c/busses/i2c-at91-slave.c b/drivers/i2c/busses/i2c-at91-slave.c new file mode 100644 index 000000000000..4b4808e0c8f7 --- /dev/null +++ b/drivers/i2c/busses/i2c-at91-slave.c @@ -0,0 +1,147 @@ +/* + * i2c slave support for Atmel's AT91 Two-Wire Interface (TWI) + * + * Copyright (C) 2017 Juergen Fitschen + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include + +#include "i2c-at91.h" + +static irqreturn_t atmel_twi_interrupt_slave(int irq, void *dev_id) +{ + struct at91_twi_dev *dev = dev_id; + const unsigned status = at91_twi_read(dev, AT91_TWI_SR); + const unsigned irqstatus = status & at91_twi_read(dev, AT91_TWI_IMR); + u8 value; + + if (!irqstatus) + return IRQ_NONE; + + /* slave address has been detected on I2C bus */ + if (irqstatus & AT91_TWI_SVACC) { + if (status & AT91_TWI_SVREAD) { + i2c_slave_event(dev->slave, + I2C_SLAVE_READ_REQUESTED, &value); + writeb_relaxed(value, dev->base + AT91_TWI_THR); + at91_twi_write(dev, AT91_TWI_IER, + AT91_TWI_TXRDY | AT91_TWI_EOSACC); + } else { + i2c_slave_event(dev->slave, + I2C_SLAVE_WRITE_REQUESTED, &value); + at91_twi_write(dev, AT91_TWI_IER, + AT91_TWI_RXRDY | AT91_TWI_EOSACC); + } + at91_twi_write(dev, AT91_TWI_IDR, AT91_TWI_SVACC); + } + + /* byte transmitted to remote master */ + if (irqstatus & AT91_TWI_TXRDY) { + i2c_slave_event(dev->slave, I2C_SLAVE_READ_PROCESSED, &value); + writeb_relaxed(value, dev->base + AT91_TWI_THR); + } + + /* byte received from remote master */ + if (irqstatus & AT91_TWI_RXRDY) { + value = readb_relaxed(dev->base + AT91_TWI_RHR); + i2c_slave_event(dev->slave, I2C_SLAVE_WRITE_RECEIVED, &value); + } + + /* master sent stop */ + if (irqstatus & AT91_TWI_EOSACC) { + at91_twi_write(dev, AT91_TWI_IDR, + AT91_TWI_TXRDY | AT91_TWI_RXRDY | AT91_TWI_EOSACC); + at91_twi_write(dev, AT91_TWI_IER, AT91_TWI_SVACC); + i2c_slave_event(dev->slave, I2C_SLAVE_STOP, &value); + } + + return IRQ_HANDLED; +} + +static int at91_reg_slave(struct i2c_client *slave) +{ + struct at91_twi_dev *dev = i2c_get_adapdata(slave->adapter); + + if (dev->slave) + return -EBUSY; + + if (slave->flags & I2C_CLIENT_TEN) + return -EAFNOSUPPORT; + + /* Make sure twi_clk doesn't get turned off! */ + pm_runtime_get_sync(dev->dev); + + dev->slave = slave; + dev->smr = AT91_TWI_SMR_SADR(slave->addr); + + at91_init_twi_bus(dev); + at91_twi_write(dev, AT91_TWI_IER, AT91_TWI_SVACC); + + dev_info(dev->dev, "entered slave mode (ADR=%d)\n", slave->addr); + + return 0; +} + +static int at91_unreg_slave(struct i2c_client *slave) +{ + struct at91_twi_dev *dev = i2c_get_adapdata(slave->adapter); + + WARN_ON(!dev->slave); + + dev_info(dev->dev, "leaving slave mode\n"); + + dev->slave = NULL; + dev->smr = 0; + + at91_init_twi_bus(dev); + + pm_runtime_put(dev->dev); + + return 0; +} + +static u32 at91_twi_func(struct i2c_adapter *adapter) +{ + return I2C_FUNC_SLAVE | I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL + | I2C_FUNC_SMBUS_READ_BLOCK_DATA; +} + +static const struct i2c_algorithm at91_twi_algorithm_slave = { + .reg_slave = at91_reg_slave, + .unreg_slave = at91_unreg_slave, + .functionality = at91_twi_func, +}; + +int at91_twi_probe_slave(struct platform_device *pdev, + u32 phy_addr, struct at91_twi_dev *dev) +{ + int rc; + + rc = devm_request_irq(&pdev->dev, dev->irq, atmel_twi_interrupt_slave, + 0, dev_name(dev->dev), dev); + if (rc) { + dev_err(dev->dev, "Cannot get irq %d: %d\n", dev->irq, rc); + return rc; + } + + dev->adapter.algo = &at91_twi_algorithm_slave; + + return 0; +} + +void at91_init_twi_bus_slave(struct at91_twi_dev *dev) +{ + at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_MSDIS); + if (dev->slave_detected && dev->smr) { + at91_twi_write(dev, AT91_TWI_SMR, dev->smr); + at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_SVEN); + } +} diff --git a/drivers/i2c/busses/i2c-at91.h b/drivers/i2c/busses/i2c-at91.h index 555b1674ddbe..14cc71433366 100644 --- a/drivers/i2c/busses/i2c-at91.h +++ b/drivers/i2c/busses/i2c-at91.h @@ -53,6 +53,10 @@ #define AT91_TWI_IADRSZ_1 0x0100 /* Internal Device Address Size */ #define AT91_TWI_MREAD BIT(12) /* Master Read Direction */ +#define AT91_TWI_SMR 0x0008 /* Slave Mode Register */ +#define AT91_TWI_SMR_SADR_MAX 0x007f +#define AT91_TWI_SMR_SADR(x) (((x) & AT91_TWI_SMR_SADR_MAX) << 16) + #define AT91_TWI_IADR 0x000c /* Internal Address Register */ #define AT91_TWI_CWGR 0x0010 /* Clock Waveform Generator Reg */ @@ -63,13 +67,17 @@ #define AT91_TWI_TXCOMP BIT(0) /* Transmission Complete */ #define AT91_TWI_RXRDY BIT(1) /* Receive Holding Register Ready */ #define AT91_TWI_TXRDY BIT(2) /* Transmit Holding Register Ready */ +#define AT91_TWI_SVREAD BIT(3) /* Slave Read */ +#define AT91_TWI_SVACC BIT(4) /* Slave Access */ #define AT91_TWI_OVRE BIT(6) /* Overrun Error */ #define AT91_TWI_UNRE BIT(7) /* Underrun Error */ #define AT91_TWI_NACK BIT(8) /* Not Acknowledged */ +#define AT91_TWI_EOSACC BIT(11) /* End Of Slave Access */ #define AT91_TWI_LOCK BIT(23) /* TWI Lock due to Frame Errors */ #define AT91_TWI_INT_MASK \ - (AT91_TWI_TXCOMP | AT91_TWI_RXRDY | AT91_TWI_TXRDY | AT91_TWI_NACK) + (AT91_TWI_TXCOMP | AT91_TWI_RXRDY | AT91_TWI_TXRDY | AT91_TWI_NACK \ + | AT91_TWI_SVACC | AT91_TWI_EOSACC) #define AT91_TWI_IER 0x0024 /* Interrupt Enable Register */ #define AT91_TWI_IDR 0x0028 /* Interrupt Disable Register */ @@ -137,6 +145,11 @@ struct at91_twi_dev { bool recv_len_abort; u32 fifo_size; struct at91_twi_dma dma; + bool slave_detected; +#if IS_ENABLED(CONFIG_I2C_AT91_SLAVE_EXPERIMENTAL) + unsigned smr; + struct i2c_client *slave; +#endif }; unsigned at91_twi_read(struct at91_twi_dev *dev, unsigned reg); @@ -149,3 +162,18 @@ void at91_init_twi_bus(struct at91_twi_dev *dev); void at91_init_twi_bus_master(struct at91_twi_dev *dev); int at91_twi_probe_master(struct platform_device *pdev, u32 phy_addr, struct at91_twi_dev *dev); + +#if IS_ENABLED(CONFIG_I2C_AT91_SLAVE_EXPERIMENTAL) +void at91_init_twi_bus_slave(struct at91_twi_dev *dev); +int at91_twi_probe_slave(struct platform_device *pdev, u32 phy_addr, + struct at91_twi_dev *dev); + +#else +static inline void at91_init_twi_bus_slave(struct at91_twi_dev *dev) {} +static inline int at91_twi_probe_slave(struct platform_device *pdev, + u32 phy_addr, struct at91_twi_dev *dev) +{ + return -EINVAL; +} + +#endif