From patchwork Wed Nov 21 00:06:47 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lina Iyer X-Patchwork-Id: 1000805 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=codeaurora.org header.i=@codeaurora.org header.b="HYcrFsJk"; dkim=pass (1024-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="kGGaPcoK"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 4302vh0B3sz9s3q for ; Wed, 21 Nov 2018 11:07:44 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726944AbeKUKjP (ORCPT ); Wed, 21 Nov 2018 05:39:15 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:48228 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726881AbeKUKjO (ORCPT ); Wed, 21 Nov 2018 05:39:14 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 6B1D260C4C; Wed, 21 Nov 2018 00:07:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1542758843; bh=dI/YF/YLgNGAhMIFdHF3+jTzVJx1RL6JwVJbhbfEis0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=HYcrFsJkzO2FQv5kxoGrJ6GIKWnRNuzrpC7nSSErLdnt0Q/KUEecDrZUdFs82mvT0 CQ0/IRZ/hD3hq7TvE3vR3WCRF2ge83f1fBnqp8pZDHGYEXGx8XunjNjfPf5oEMUb0Q vkkQxf2OS7pKHbGLHku5+CaujIe73VbSFKy7cFhw= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_INVALID, DKIM_SIGNED autolearn=no autolearn_force=no version=3.4.0 Received: from codeaurora.org (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: ilina@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id D8E5C60B19; Wed, 21 Nov 2018 00:07:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1542758842; bh=dI/YF/YLgNGAhMIFdHF3+jTzVJx1RL6JwVJbhbfEis0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=kGGaPcoKjUtH8Nn3DzFfPYOtjeGHcrj68YFvjVebnSxM6CaDl5EMBwI6pvSROjtow CkTQUqXLskajnGAZqq0yZPMOqZClo2Um8yD5Wx2pHwWYonGOeLqHXP6H84aOwdRKsZ ZT+KgfJ6MVxV3Gt3y0uHfRTV/61MylOfIf6aWFqI= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org D8E5C60B19 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=ilina@codeaurora.org From: Lina Iyer To: sboyd@kernel.org, evgreen@chromium.org, marc.zyngier@arm.com Cc: linux-kernel@vger.kernel.org, rplsssn@codeaurora.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, thierry.reding@gmail.com, Lina Iyer Subject: [RFC v3 2/3] dt-bindings: sdm845-pinctrl: add wakeup interrupt parent for GPIO Date: Tue, 20 Nov 2018 17:06:47 -0700 Message-Id: <20181121000648.29262-3-ilina@codeaurora.org> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181121000648.29262-1-ilina@codeaurora.org> References: <20181121000648.29262-1-ilina@codeaurora.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org SDM845 SoC has an always-on interrupt controller (PDC) with select GPIO routed to the PDC as interrupts that can be used to wake the system up from deep low power modes and suspend. Signed-off-by: Lina Iyer --- .../bindings/pinctrl/qcom,sdm845-pinctrl.txt | 31 ++++++++++++++++++- 1 file changed, 30 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt index 665aadb5ea28..bedfa0b57fa6 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt @@ -29,6 +29,17 @@ SDM845 platform. Definition: must be 2. Specifying the pin number and flags, as defined in +- wakeup-parent: + Usage: optional + Value type: + Definition: A phandle to the wakeup interrupt controller for the SoC. + +- wakeup-irq: + Usage: optional: + Value type: + Definition: Specifies the map of the gpio and the corresponding PDC + output port. + - gpio-controller: Usage: required Value type: @@ -53,7 +64,6 @@ pin, a group, or a list of pins or groups. This configuration can include the mux function to select on those pin(s)/group(s), and various pin configuration parameters, such as pull-up, drive strength, etc. - PIN CONFIGURATION NODES: The name of each subnode is not important; all subnodes should be enumerated @@ -160,6 +170,25 @@ Example: #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + wake-parent = <&pdc>; + wake-irq = + <1 30>, <3 31>, <5 32>, <10 33>, <11 34>, + <20 35>, <22 36>, <24 37>, <26 38>, <30 39>, + <31 117>, <32 41>, <34 42>, <36 43>, <37 44>, + <38 45>, <39 46>, <40 47>, <41 115>, <43 49>, + <44 50>, <46 51>, <48 52>, <49 118>, <52 54>, + <53 55>, <54 56>, <56 57>, <57 58>, <58 59>, + <59 60>, <60 61>, <61 62>, <62 63>, <63 64>, + <64 65>, <66 66>, <68 67>, <71 68>, <73 69>, + <77 70>, <78 71>, <79 72>, <80 73>, <84 74>, + <85 75>, <86 76>, <88 77>, <89 116>, <91 79>, + <92 80>, <95 81>, <96 82>, <97 83>, <101 84>, + <103 85>, <104 86>, <115 90>, <116 91>, + <117 92>, <118 93>, <119 94>, <120 95>, + <121 96>, <122 97>, <123 98>, <124 99>, + <125 100>, <127 102>, <128 103>, <129 104>, + <130 105>, <132 106>, <133 107>, <145 108>; + qup9_active: qup9-active { mux {