From patchwork Wed Oct 11 17:11:07 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Seth Forshee X-Patchwork-Id: 824493 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) by ozlabs.org (Postfix) with ESMTP id 3yC0rD1jd2z9sRq; Thu, 12 Oct 2017 04:11:24 +1100 (AEDT) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.86_2) (envelope-from ) id 1e2KXN-00087v-3m; Wed, 11 Oct 2017 17:11:17 +0000 Received: from youngberry.canonical.com ([91.189.89.112]) by huckleberry.canonical.com with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:128) (Exim 4.86_2) (envelope-from ) id 1e2KXH-00086k-F3 for kernel-team@lists.ubuntu.com; Wed, 11 Oct 2017 17:11:11 +0000 Received: from mail-io0-f200.google.com ([209.85.223.200]) by youngberry.canonical.com with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.76) (envelope-from ) id 1e2KXH-0008Aa-55 for kernel-team@lists.ubuntu.com; Wed, 11 Oct 2017 17:11:11 +0000 Received: by mail-io0-f200.google.com with SMTP id m81so1914630ioi.5 for ; Wed, 11 Oct 2017 10:11:11 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id; bh=k1CoVfJq6LqPecUtTmDEGjkv2IagAaA5g9Dh83S+bRQ=; b=WQv4Ps5+gTUb2Cil67V21tYp6TNhorPAcjyl+lSdoK8iq9ZxxxLFSVbTZbj+QwYkAu FmlPzQ285ukxvxMsfYQ8Pm+FacN2mxKKsPWS+PeX62nWrRHJPJqqPmsYosXWSNM80sTJ z6U60O8PE1r5Rnp6Zehe4dBV7DUuC//HW0uaN004dh7qNaL6Wfdi0boR6ToohGRoEzWE 2sxjXNUqJ8FwaHH8xUTy2+SDDlkG2BfpTequfb7yRAbTGvRVpHqx4RdKFN3CGTOUOVTM Ei72HoB7Hn01tVG+tttWKyTeWBUTDe9wDErBbm6JVPnhQSdaS7uYMCNZ5oY6U2B7f7En vnpg== X-Gm-Message-State: AMCzsaVo56TIIShItQ4Bu6hbP2wSbo5FOG1Par8ZL7uAj0YUTpQQzdLn IvlS1H4Bo98O9ANCC54mWnm5ioI5b169WgZP14qxrNU9vhU0LAfT6aJLDxt6Or2iLr5k+Tk516m f1dZpi9GMWYiicEJ+w+tWpK7EbwwpMHkhCNzZ6XR9Wg== X-Received: by 10.107.197.198 with SMTP id v189mr413792iof.94.1507741869916; Wed, 11 Oct 2017 10:11:09 -0700 (PDT) X-Google-Smtp-Source: ABhQp+S/4AXlCSN3hajTVxBnk7WUZD48zObDUdtyyo1V6ef8wTQdf77ZvzkAULckWOX5IDG/TtzimQ== X-Received: by 10.107.197.198 with SMTP id v189mr413769iof.94.1507741869599; Wed, 11 Oct 2017 10:11:09 -0700 (PDT) Received: from localhost ([2605:a601:aae:1b20:b4c7:abaf:87f8:2e08]) by smtp.gmail.com with ESMTPSA id l19sm6407723iol.24.2017.10.11.10.11.07 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 11 Oct 2017 10:11:08 -0700 (PDT) From: Seth Forshee To: kernel-team@lists.ubuntu.com Subject: [PATCH] UBUNTU: SAUCE: PCI: Disable broken RTIT_BAR of Intel TH Date: Wed, 11 Oct 2017 12:11:07 -0500 Message-Id: <20171011171107.22708-1-seth.forshee@canonical.com> X-Mailer: git-send-email 2.14.1 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Alexander Shishkin BugLink: http://bugs.launchpad.net/bugs/1715833 On some intergrations of the Intel TH the reported size of RTIT_BAR doesn't match its actual size, which leads to overlaps with other devices' resources. For this reason, we need to disable the RTIT_BAR on Denverton where it would overlap with XHCI MMIO space and effectively kill usb dead. Signed-off-by: Alexander Shishkin Signed-off-by: Seth Forshee Acked-by: Andy Whitcroft Acked-by: Thadeu Lima de Souza Cascardo --- drivers/pci/quirks.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 73bad58d587a..02b009426670 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -4811,6 +4811,27 @@ static void quirk_intel_no_flr(struct pci_dev *dev) DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x1502, quirk_intel_no_flr); DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x1503, quirk_intel_no_flr); +static void quirk_intel_th_rtit_bar(struct pci_dev *dev) +{ + struct resource *r = &dev->resource[4]; + + /* + * Hello, Denverton! + * Denverton reports 2k of RTIT_BAR (resource 4), which can't be + * right given the 16 threads. When Intel TH gets enabled, the + * actual resource overlaps the XHCI MMIO space and causes it + * to die. + * We're not really using RTIT_BAR at all at the moment, so it's + * a safe choice to disable this resource. + */ + if (r->end == r->start + 0x7ff) { + r->flags = 0; + r->start = 0; + r->end = 0; + } +} +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x19e1, quirk_intel_th_rtit_bar); + /* * The hibmc card on a HiSilicon D05 board sits behind a non-compliant * bridge. The bridge has the PCI_BRIDGE_CTL_VGA config bit fixed at 0