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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Thu, 8 Nov 2018 20:18:52 -0000 Received: from b03ledav001.gho.boulder.ibm.com (b03ledav001.gho.boulder.ibm.com [9.17.130.232]) by b03cxnp08026.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id wA8KIpEj25559196 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 8 Nov 2018 20:18:51 GMT Received: from b03ledav001.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A00E76E04E; Thu, 8 Nov 2018 20:18:51 +0000 (GMT) Received: from b03ledav001.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 70C636E050; Thu, 8 Nov 2018 20:18:51 +0000 (GMT) Received: from bigmac.rchland.ibm.com (unknown [9.10.86.17]) by b03ledav001.gho.boulder.ibm.com (Postfix) with ESMTP; Thu, 8 Nov 2018 20:18:51 +0000 (GMT) To: GCC Patches Cc: Segher Boessenkool From: Bill Schmidt Subject: [PATCH, rs6000] Fix constraints issue in _mm_cvtss_si{32,64} Date: Thu, 8 Nov 2018 14:18:51 -0600 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.13; rv:60.0) Gecko/20100101 Thunderbird/60.3.0 MIME-Version: 1.0 x-cbid: 18110820-8235-0000-0000-00000E239B9E X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00010009; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000269; SDB=6.01114594; UDB=6.00577878; IPR=6.00894693; MB=3.00024077; MTD=3.00000008; XFM=3.00000015; UTC=2018-11-08 20:18:53 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18110820-8236-0000-0000-00004349DE93 Message-Id: <06add7ad-55e6-40a3-ac1b-13aaf8dccd2e@linux.ibm.com> Hi, We recently discovered that GCC is getting lucky with register allocation of some inline assembly code, despite invalid register constraints. In these two functions, a "wi" constraint (VSX valid for direct moves) was used for a temporary that, as written, is further constrained to be an FPR. This patch fixes the problem by introducing a separate temporary with an "f" constraint and breaking the lifetime of the existing temporary. The existing temporary can now have a less onerous "wa" constraint as it is no longer used within a direct move instruction. Installed and tested on powerpc64le-linux-gnu with no regressions. Is this okay for trunk? Thanks, Bill 2018-11-08 Bill Schmidt Jinsong Ji * config/rs6000/xmmintrin.h (_mm_cvtss_si32): Fix incorrect constraints by introducing a new temporary. (_mm_cvtss_si64): Likewise. Index: gcc/config/rs6000/xmmintrin.h =================================================================== --- gcc/config/rs6000/xmmintrin.h (revision 265895) +++ gcc/config/rs6000/xmmintrin.h (working copy) @@ -908,13 +908,15 @@ _mm_cvtss_si32 (__m128 __A) __m64 res = 0; #ifdef _ARCH_PWR8 __m128 vtmp; + double dtmp; __asm__( - "xxsldwi %x1,%x2,%x2,3;\n" - "xscvspdp %x1,%x1;\n" - "fctiw %1,%1;\n" - "mfvsrd %0,%x1;\n" + "xxsldwi %x1,%x3,%x3,3;\n" + "xscvspdp %x2,%x1;\n" + "fctiw %2,%2;\n" + "mfvsrd %0,%x2;\n" : "=r" (res), - "=&wi" (vtmp) + "=&wa" (vtmp), + "=f" (dtmp) : "wa" (__A) : ); #else @@ -939,13 +941,15 @@ _mm_cvtss_si64 (__m128 __A) __m64 res = 0; #ifdef _ARCH_PWR8 __m128 vtmp; + double dtmp; __asm__( - "xxsldwi %x1,%x2,%x2,3;\n" - "xscvspdp %x1,%x1;\n" - "fctid %1,%1;\n" - "mfvsrd %0,%x1;\n" + "xxsldwi %x1,%x3,%x3,3;\n" + "xscvspdp %x2,%x1;\n" + "fctid %2,%2;\n" + "mfvsrd %0,%x2;\n" : "=r" (res), - "=&wi" (vtmp) + "=&wa" (vtmp), + "=f" (dtmp) : "wa" (__A) : ); #else