From patchwork Tue Sep 25 14:30:35 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loic Devulder X-Patchwork-Id: 974452 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=suse.de Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 42KNmc1y6Jz9s7T for ; Wed, 26 Sep 2018 00:31:24 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id BE61DC21D74; Tue, 25 Sep 2018 14:31:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id BB300C21C6A; Tue, 25 Sep 2018 14:31:16 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id E0B7CC21C6A; Tue, 25 Sep 2018 14:31:14 +0000 (UTC) Received: from mx1.suse.de (mx2.suse.de [195.135.220.15]) by lists.denx.de (Postfix) with ESMTPS id 809CCC21C50 for ; Tue, 25 Sep 2018 14:31:14 +0000 (UTC) X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 3BB9CB007 for ; Tue, 25 Sep 2018 14:31:14 +0000 (UTC) From: Loic Devulder To: u-boot@lists.denx.de Date: Tue, 25 Sep 2018 16:30:35 +0200 Message-Id: <20180925143035.20621-1-ldevulder@suse.de> X-Mailer: git-send-email 2.16.4 Subject: [U-Boot] [PATCH v2 1/1] ARM: meson: Extend mem_map to support 3GiB of RAM X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The current mem_map definition for Meson SoCs has support for up to 2GiB of RAM. According to S905, S905X, S912 and S805X datasheets the DDR region is set from 0x00000000 to 0xBFFFFFFF, so mem_map's definition should be changed accordingly. It is also needed to be able to boot Khadas VIM2 board with S912 SoC. Signed-off-by: Loic Devulder Acked-by: Neil Armstrong Acked-by: Marek Vasut --- v2: set the correct size for devices memory map arch/arm/mach-meson/board.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-meson/board.c b/arch/arm/mach-meson/board.c index 1ef7e5a6d1..48096ca7cf 100644 --- a/arch/arm/mach-meson/board.c +++ b/arch/arm/mach-meson/board.c @@ -111,13 +111,13 @@ static struct mm_region gx_mem_map[] = { { .virt = 0x0UL, .phys = 0x0UL, - .size = 0x80000000UL, + .size = 0xc0000000UL, .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE }, { - .virt = 0x80000000UL, - .phys = 0x80000000UL, - .size = 0x80000000UL, + .virt = 0xc0000000UL, + .phys = 0xc0000000UL, + .size = 0x30000000UL, .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN