From patchwork Mon Jul 16 14:16:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Siddhesh Poyarekar X-Patchwork-Id: 944451 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=sourceware.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=libc-alpha-return-94319-incoming=patchwork.ozlabs.org@sourceware.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=sourceware.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.b="ypR/tVfg"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 41Tlpc1PjYz9rxs for ; Tue, 17 Jul 2018 00:16:56 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id; q=dns; s= default; b=sySxSMCmz24VKIvRaBoL3hnPzMFVCQXRtPEYqkJh/BhTYVhY//rO6 chEZ9HFKl/j7xMoDsJ4rmNb5oZ1AQJZXhZPrFGcug8yoF/XRL4NssodaBXOmItHs OmblhegING7Qq/5h5YxiF87pn1JBtfF24rDuBmxGY9psNisHk7hTpI= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id; s=default; bh=0TrepI9MlI0STQ27gH1jjASJq7A=; b=ypR/tVfg/P5h61Eh6hoWPnPowK8M VYuTi9gOJ69Fxf7eBxnyssmt6pN4usVHlhsR76kcWKvWUYx0OIOb22tl+1GLBC+C R+JxkST5/arx7WIKV5FiwCidloU4Wbp1gws876z3r+Db2ebeUH2iSsR/fHkLBpf3 6Z/DSdtVuZ2RlJk= Received: (qmail 85360 invoked by alias); 16 Jul 2018 14:16:49 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 85067 invoked by uid 89); 16 Jul 2018 14:16:48 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-26.1 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_NEUTRAL autolearn=ham version=3.3.2 spammy=temporal, Behavior X-HELO: homiemail-a69.g.dreamhost.com From: Siddhesh Poyarekar To: libc-alpha@sourceware.org Subject: [PATCH] Rename the glibc.tune namespace to glibc.cpu Date: Mon, 16 Jul 2018 19:46:33 +0530 Message-Id: <20180716141633.6948-1-siddhesh@sourceware.org> The glibc.tune namespace is vaguely named since it is a 'tunable', so give it a more specific name that describes what it refers to. Rename the tunable namespace to 'cpu' to more accurately reflect what it encompasses. Also rename glibc.tune.cpu to glibc.cpu.name since glibc.cpu.cpu is weird. * NEWS: Mention the change. * elf/dl-tunables.list: Rename tune namespace to cpu. * sysdeps/powerpc/dl-tunables.list: Likewise. * sysdeps/x86/dl-tunables.list: Likewise. * sysdeps/aarch64/dl-tunables.list: Rename tune.cpu to cpu.name. * elf/dl-hwcaps.c (_dl_important_hwcaps): Adjust. * elf/dl-hwcaps.h (GET_HWCAP_MASK): Likewise. * manual/README.tunables: Likewise. * manual/tunables.texi: Likewise. * sysdeps/powerpc/cpu-features.c: Likewise. * sysdeps/unix/sysv/linux/aarch64/cpu-features.c (init_cpu_features): Likewise. * sysdeps/x86/cpu-features.c: Likewise. * sysdeps/x86/cpu-features.h: Likewise. * sysdeps/x86/cpu-tunables.c: Likewise. * sysdeps/x86_64/Makefile: Likewise. Reviewed-by: Carlos O'Donell Reviewed-by: Carlos O'Donell --- NEWS | 3 ++ elf/dl-hwcaps.c | 2 +- elf/dl-hwcaps.h | 2 +- elf/dl-tunables.list | 2 +- manual/README.tunables | 6 ++-- manual/tunables.texi | 30 +++++++++---------- sysdeps/aarch64/dl-tunables.list | 4 +-- sysdeps/powerpc/cpu-features.c | 2 +- sysdeps/powerpc/dl-tunables.list | 2 +- .../unix/sysv/linux/aarch64/cpu-features.c | 2 +- sysdeps/x86/cpu-features.c | 4 +-- sysdeps/x86/cpu-features.h | 2 +- sysdeps/x86/cpu-tunables.c | 4 +-- sysdeps/x86/dl-tunables.list | 2 +- sysdeps/x86_64/Makefile | 4 +-- 15 files changed, 37 insertions(+), 34 deletions(-) diff --git a/NEWS b/NEWS index 5de2c2816f..b5308fd596 100644 --- a/NEWS +++ b/NEWS @@ -173,6 +173,9 @@ Deprecated and removed features, and other changes affecting compatibility: project's versions of these files. The plan is to make this the default behavior in a future release. +* The glibc.tune tunable namespace has been renamed to glibc.cpu and the + tunable glibc.tune.cpu has been renamed to glibc.cpu.name. + Changes to build and runtime requirements: GNU make 4.0 or later is now required to build glibc. diff --git a/elf/dl-hwcaps.c b/elf/dl-hwcaps.c index 23482a88a1..ecf00b4577 100644 --- a/elf/dl-hwcaps.c +++ b/elf/dl-hwcaps.c @@ -140,7 +140,7 @@ _dl_important_hwcaps (const char *platform, size_t platform_len, size_t *sz, string and bit like you can ignore an OS-supplied HWCAP bit. */ hwcap_mask |= (uint64_t) mask << _DL_FIRST_EXTRA; #if HAVE_TUNABLES - TUNABLE_SET (glibc, tune, hwcap_mask, uint64_t, hwcap_mask); + TUNABLE_SET (glibc, cpu, hwcap_mask, uint64_t, hwcap_mask); #else GLRO(dl_hwcap_mask) = hwcap_mask; #endif diff --git a/elf/dl-hwcaps.h b/elf/dl-hwcaps.h index 17f0da4c73..d69ee11dc2 100644 --- a/elf/dl-hwcaps.h +++ b/elf/dl-hwcaps.h @@ -19,7 +19,7 @@ #include #if HAVE_TUNABLES -# define GET_HWCAP_MASK() TUNABLE_GET (glibc, tune, hwcap_mask, uint64_t, NULL) +# define GET_HWCAP_MASK() TUNABLE_GET (glibc, cpu, hwcap_mask, uint64_t, NULL) #else # ifdef SHARED # define GET_HWCAP_MASK() GLRO(dl_hwcap_mask) diff --git a/elf/dl-tunables.list b/elf/dl-tunables.list index 1f8ecb8437..b108592b62 100644 --- a/elf/dl-tunables.list +++ b/elf/dl-tunables.list @@ -86,7 +86,7 @@ glibc { type: SIZE_T } } - tune { + cpu { hwcap_mask { type: UINT_64 env_alias: LD_HWCAP_MASK diff --git a/manual/README.tunables b/manual/README.tunables index 3967679f43..f87a31a65e 100644 --- a/manual/README.tunables +++ b/manual/README.tunables @@ -105,11 +105,11 @@ where 'check' is the tunable name, 'int32_t' is the C type of the tunable and To get and set tunables in a different namespace from that module, use the full form of the macros as follows: - val = TUNABLE_GET_FULL (glibc, tune, hwcap_mask, uint64_t, NULL) + val = TUNABLE_GET_FULL (glibc, cpu, hwcap_mask, uint64_t, NULL) - TUNABLE_SET_FULL (glibc, tune, hwcap_mask, uint64_t, val) + TUNABLE_SET_FULL (glibc, cpu, hwcap_mask, uint64_t, val) -where 'glibc' is the top namespace, 'tune' is the tunable namespace and the +where 'glibc' is the top namespace, 'cpu' is the tunable namespace and the remaining arguments are the same as the short form macros. When TUNABLE_NAMESPACE is not defined in a module, TUNABLE_GET is equivalent to diff --git a/manual/tunables.texi b/manual/tunables.texi index be33c9fc79..9b8f9e4610 100644 --- a/manual/tunables.texi +++ b/manual/tunables.texi @@ -295,23 +295,23 @@ The default value of this tunable is @samp{3}. @cindex non_temporal_threshold tunables @cindex tunables, non_temporal_threshold -@deftp {Tunable namespace} glibc.tune +@deftp {Tunable namespace} glibc.cpu Behavior of @theglibc{} can be tuned to assume specific hardware capabilities by setting the following tunables in the @code{tune} namespace: @end deftp -@deftp Tunable glibc.tune.hwcap_mask +@deftp Tunable glibc.cpu.hwcap_mask This tunable supersedes the @env{LD_HWCAP_MASK} environment variable and is identical in features. The @code{AT_HWCAP} key in the Auxiliary Vector specifies instruction set extensions available in the processor at runtime for some architectures. The -@code{glibc.tune.hwcap_mask} tunable allows the user to mask out those +@code{glibc.cpu.hwcap_mask} tunable allows the user to mask out those capabilities at runtime, thus disabling use of those extensions. @end deftp -@deftp Tunable glibc.tune.hwcaps -The @code{glibc.tune.hwcaps=-xxx,yyy,-zzz...} tunable allows the user to +@deftp Tunable glibc.cpu.hwcaps +The @code{glibc.cpu.hwcaps=-xxx,yyy,-zzz...} tunable allows the user to enable CPU/ARCH feature @code{yyy}, disable CPU/ARCH feature @code{xxx} and @code{zzz} where the feature name is case-sensitive and has to match the ones in @code{sysdeps/x86/cpu-features.h}. @@ -319,8 +319,8 @@ the ones in @code{sysdeps/x86/cpu-features.h}. This tunable is specific to i386 and x86-64. @end deftp -@deftp Tunable glibc.tune.cached_memopt -The @code{glibc.tune.cached_memopt=[0|1]} tunable allows the user to +@deftp Tunable glibc.cpu.cached_memopt +The @code{glibc.cpu.cached_memopt=[0|1]} tunable allows the user to enable optimizations recommended for cacheable memory. If set to @code{1}, @theglibc{} assumes that the process memory image consists of cacheable (non-device) memory only. The default, @code{0}, @@ -329,8 +329,8 @@ indicates that the process may use device memory. This tunable is specific to powerpc, powerpc64 and powerpc64le. @end deftp -@deftp Tunable glibc.tune.cpu -The @code{glibc.tune.cpu=xxx} tunable allows the user to tell @theglibc{} to +@deftp Tunable glibc.cpu.cpu +The @code{glibc.cpu.cpu=xxx} tunable allows the user to tell @theglibc{} to assume that the CPU is @code{xxx} where xxx may have one of these values: @code{generic}, @code{falkor}, @code{thunderxt88}, @code{thunderx2t99}, @code{thunderx2t99p1}. @@ -338,20 +338,20 @@ assume that the CPU is @code{xxx} where xxx may have one of these values: This tunable is specific to aarch64. @end deftp -@deftp Tunable glibc.tune.x86_data_cache_size -The @code{glibc.tune.x86_data_cache_size} tunable allows the user to set +@deftp Tunable glibc.cpu.x86_data_cache_size +The @code{glibc.cpu.x86_data_cache_size} tunable allows the user to set data cache size in bytes for use in memory and string routines. This tunable is specific to i386 and x86-64. @end deftp -@deftp Tunable glibc.tune.x86_shared_cache_size -The @code{glibc.tune.x86_shared_cache_size} tunable allows the user to +@deftp Tunable glibc.cpu.x86_shared_cache_size +The @code{glibc.cpu.x86_shared_cache_size} tunable allows the user to set shared cache size in bytes for use in memory and string routines. @end deftp -@deftp Tunable glibc.tune.x86_non_temporal_threshold -The @code{glibc.tune.x86_non_temporal_threshold} tunable allows the user +@deftp Tunable glibc.cpu.x86_non_temporal_threshold +The @code{glibc.cpu.x86_non_temporal_threshold} tunable allows the user to set threshold in bytes for non temporal store. This tunable is specific to i386 and x86-64. diff --git a/sysdeps/aarch64/dl-tunables.list b/sysdeps/aarch64/dl-tunables.list index f6a88168cc..cfcf940ebd 100644 --- a/sysdeps/aarch64/dl-tunables.list +++ b/sysdeps/aarch64/dl-tunables.list @@ -17,8 +17,8 @@ # . glibc { - tune { - cpu { + cpu { + name { type: STRING } } diff --git a/sysdeps/powerpc/cpu-features.c b/sysdeps/powerpc/cpu-features.c index 955d4778a6..ad809b9815 100644 --- a/sysdeps/powerpc/cpu-features.c +++ b/sysdeps/powerpc/cpu-features.c @@ -30,7 +30,7 @@ init_cpu_features (struct cpu_features *cpu_features) tunables is enable, since for this case user can explicit disable unaligned optimizations. */ #if HAVE_TUNABLES - int32_t cached_memfunc = TUNABLE_GET (glibc, tune, cached_memopt, int32_t, + int32_t cached_memfunc = TUNABLE_GET (glibc, cpu, cached_memopt, int32_t, NULL); cpu_features->use_cached_memopt = (cached_memfunc > 0); #else diff --git a/sysdeps/powerpc/dl-tunables.list b/sysdeps/powerpc/dl-tunables.list index d26636a16b..b3372555f7 100644 --- a/sysdeps/powerpc/dl-tunables.list +++ b/sysdeps/powerpc/dl-tunables.list @@ -17,7 +17,7 @@ # . glibc { - tune { + cpu { cached_memopt { type: INT_32 minval: 0 diff --git a/sysdeps/unix/sysv/linux/aarch64/cpu-features.c b/sysdeps/unix/sysv/linux/aarch64/cpu-features.c index 39eba0186f..b4f348509e 100644 --- a/sysdeps/unix/sysv/linux/aarch64/cpu-features.c +++ b/sysdeps/unix/sysv/linux/aarch64/cpu-features.c @@ -57,7 +57,7 @@ init_cpu_features (struct cpu_features *cpu_features) #if HAVE_TUNABLES /* Get the tunable override. */ - const char *mcpu = TUNABLE_GET (glibc, tune, cpu, const char *, NULL); + const char *mcpu = TUNABLE_GET (glibc, cpu, name, const char *, NULL); if (mcpu != NULL) midr = get_midr_from_mcpu (mcpu); #endif diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c index d41ebde823..b8bef8d54b 100644 --- a/sysdeps/x86/cpu-features.c +++ b/sysdeps/x86/cpu-features.c @@ -22,7 +22,7 @@ #include #if HAVE_TUNABLES -# define TUNABLE_NAMESPACE tune +# define TUNABLE_NAMESPACE cpu # include /* Get STDOUT_FILENO for _dl_printf. */ # include @@ -398,7 +398,7 @@ no_cpuid: /* Reuse dl_platform, dl_hwcap and dl_hwcap_mask for x86. */ #if !HAVE_TUNABLES && defined SHARED - /* The glibc.tune.hwcap_mask tunable is initialized already, so no need to do + /* The glibc.cpu.hwcap_mask tunable is initialized already, so no need to do this. */ GLRO(dl_hwcap_mask) = HWCAP_IMPORTANT; #endif diff --git a/sysdeps/x86/cpu-features.h b/sysdeps/x86/cpu-features.h index 624e681e96..e9713f6215 100644 --- a/sysdeps/x86/cpu-features.h +++ b/sysdeps/x86/cpu-features.h @@ -141,7 +141,7 @@ struct cpu_features unsigned long int xsave_state_size; /* The full state size for XSAVE when XSAVEC is disabled by - GLIBC_TUNABLES=glibc.tune.hwcaps=-XSAVEC_Usable + GLIBC_TUNABLES=glibc.cpu.hwcaps=-XSAVEC_Usable */ unsigned int xsave_state_full_size; unsigned int feature[FEATURE_INDEX_MAX]; diff --git a/sysdeps/x86/cpu-tunables.c b/sysdeps/x86/cpu-tunables.c index af761dcbbc..c38af71b8a 100644 --- a/sysdeps/x86/cpu-tunables.c +++ b/sysdeps/x86/cpu-tunables.c @@ -17,7 +17,7 @@ . */ #if HAVE_TUNABLES -# define TUNABLE_NAMESPACE tune +# define TUNABLE_NAMESPACE cpu # include # include # include /* Get STDOUT_FILENO for _dl_printf. */ @@ -116,7 +116,7 @@ TUNABLE_CALLBACK (set_hwcaps) (tunable_val_t *valp) the hardware which wasn't available when the selection was made. The environment variable: - GLIBC_TUNABLES=glibc.tune.hwcaps=-xxx,yyy,-zzz,.... + GLIBC_TUNABLES=glibc.cpu.hwcaps=-xxx,yyy,-zzz,.... can be used to enable CPU/ARCH feature yyy, disable CPU/ARCH feature yyy and zzz, where the feature name is case-sensitive and has to diff --git a/sysdeps/x86/dl-tunables.list b/sysdeps/x86/dl-tunables.list index 7c3236a68f..9a5a0b1a63 100644 --- a/sysdeps/x86/dl-tunables.list +++ b/sysdeps/x86/dl-tunables.list @@ -17,7 +17,7 @@ # . glibc { - tune { + cpu { hwcaps { type: STRING } diff --git a/sysdeps/x86_64/Makefile b/sysdeps/x86_64/Makefile index 9f1562f1b2..d51cf03ac9 100644 --- a/sysdeps/x86_64/Makefile +++ b/sysdeps/x86_64/Makefile @@ -57,7 +57,7 @@ modules-names += x86_64/tst-x86_64mod-1 LDFLAGS-tst-x86_64mod-1.so = -Wl,-soname,tst-x86_64mod-1.so ifneq (no,$(have-tunables)) # Test the state size for XSAVE when XSAVEC is disabled. -tst-x86_64-1-ENV = GLIBC_TUNABLES=glibc.tune.hwcaps=-XSAVEC_Usable +tst-x86_64-1-ENV = GLIBC_TUNABLES=glibc.cpu.hwcaps=-XSAVEC_Usable endif $(objpfx)tst-x86_64-1: $(objpfx)x86_64/tst-x86_64mod-1.so @@ -74,7 +74,7 @@ $(objpfx)tst-platform-1.out: $(objpfx)x86_64/tst-platformmod-2.so # Turn off AVX512F_Usable and AVX2_Usable so that GLRO(dl_platform) is # always set to x86_64. tst-platform-1-ENV = LD_PRELOAD=$(objpfx)\$$PLATFORM/tst-platformmod-2.so \ - GLIBC_TUNABLES=glibc.tune.hwcaps=-AVX512F_Usable,-AVX2_Usable + GLIBC_TUNABLES=glibc.cpu.hwcaps=-AVX512F_Usable,-AVX2_Usable endif tests += tst-audit3 tst-audit4 tst-audit5 tst-audit6 tst-audit7 \