From patchwork Fri Jun 22 04:51:09 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rashmica Gupta X-Patchwork-Id: 933101 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 41BmPY4Vfxz9s47 for ; Fri, 22 Jun 2018 14:51:45 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="O+XnoGU8"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 41BmPY2w93zF0wy for ; Fri, 22 Jun 2018 14:51:45 +1000 (AEST) Authentication-Results: lists.ozlabs.org; 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Thu, 21 Jun 2018 21:51:40 -0700 (PDT) Received: from rashmica.ozlabs.ibm.com ([122.99.82.10]) by smtp.gmail.com with ESMTPSA id v27-v6sm11874992pfi.23.2018.06.21.21.51.39 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 21 Jun 2018 21:51:40 -0700 (PDT) From: Rashmica Gupta To: pdbg@lists.ozlabs.org Date: Fri, 22 Jun 2018 14:51:09 +1000 Message-Id: <20180622045116.12059-2-rashmica.g@gmail.com> X-Mailer: git-send-email 2.14.4 In-Reply-To: <20180622045116.12059-1-rashmica.g@gmail.com> References: <20180622045116.12059-1-rashmica.g@gmail.com> Subject: [Pdbg] [PATCH 1/8] libpdbg: Print the name of the instruction when erroring X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Rashmica Gupta --- libpdbg/chip.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/libpdbg/chip.c b/libpdbg/chip.c index f04bb15..4226cbf 100644 --- a/libpdbg/chip.c +++ b/libpdbg/chip.c @@ -29,7 +29,7 @@ static uint64_t mfspr(uint64_t reg, uint64_t spr) { if (reg > 31) - PR_ERROR("Invalid register specified\n"); + PR_ERROR("Invalid register specified for mfspr\n"); return MFSPR_OPCODE | (reg << 21) | ((spr & 0x1f) << 16) | ((spr & 0x3e0) << 6); } @@ -37,7 +37,7 @@ static uint64_t mfspr(uint64_t reg, uint64_t spr) static uint64_t mtspr(uint64_t spr, uint64_t reg) { if (reg > 31) - PR_ERROR("Invalid register specified\n"); + PR_ERROR("Invalid register specified for mtspr\n"); return MTSPR_OPCODE | (reg << 21) | ((spr & 0x1f) << 16) | ((spr & 0x3e0) << 6); } @@ -45,9 +45,9 @@ static uint64_t mtspr(uint64_t spr, uint64_t reg) static uint64_t mfocrf(uint64_t reg, uint64_t cr) { if (reg > 31) - PR_ERROR("Invalid register specified\n"); + PR_ERROR("Invalid register specified for mfocrf\n"); if (cr > 7) - PR_ERROR("Invalid register specified\n"); + PR_ERROR("Invalid CR field specified\n"); return MFOCRF_OPCODE | (reg << 21) | (1U << (12 + cr)); } @@ -55,7 +55,7 @@ static uint64_t mfocrf(uint64_t reg, uint64_t cr) static uint64_t mfnia(uint64_t reg) { if (reg > 31) - PR_ERROR("Invalid register specified\n"); + PR_ERROR("Invalid register specified for mfnia\n"); return MFNIA_OPCODE | (reg << 21); } @@ -63,7 +63,7 @@ static uint64_t mfnia(uint64_t reg) static uint64_t mtnia(uint64_t reg) { if (reg > 31) - PR_ERROR("Invalid register specified\n"); + PR_ERROR("Invalid register specified for mtnia\n"); return MTNIA_OPCODE | (reg << 21); } @@ -71,7 +71,7 @@ static uint64_t mtnia(uint64_t reg) static uint64_t mfmsr(uint64_t reg) { if (reg > 31) - PR_ERROR("Invalid register specified\n"); + PR_ERROR("Invalid register specified for mfmsr\n"); return MFMSR_OPCODE | (reg << 21); } @@ -79,7 +79,7 @@ static uint64_t mfmsr(uint64_t reg) static uint64_t mtmsr(uint64_t reg) { if (reg > 31) - PR_ERROR("Invalid register specified\n"); + PR_ERROR("Invalid register specified for mtmsr\n"); return MTMSR_OPCODE | (reg << 21); } From patchwork Fri Jun 22 04:51:10 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rashmica Gupta X-Patchwork-Id: 933102 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 41BmPl4Hklz9s4s for ; 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Thu, 21 Jun 2018 21:51:48 -0700 (PDT) From: Rashmica Gupta To: pdbg@lists.ozlabs.org Date: Fri, 22 Jun 2018 14:51:10 +1000 Message-Id: <20180622045116.12059-3-rashmica.g@gmail.com> X-Mailer: git-send-email 2.14.4 In-Reply-To: <20180622045116.12059-1-rashmica.g@gmail.com> References: <20180622045116.12059-1-rashmica.g@gmail.com> Subject: [Pdbg] [PATCH 2/8] libpdbg: Add in getxer and putxer functions X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Rashmica Gupta --- libpdbg/chip.c | 93 +++++++++++++++++++++++++++++++++++++++++++++++++--- libpdbg/libpdbg.h | 4 +++ libpdbg/operations.h | 11 ++++++- libpdbg/p8chip.c | 41 +++++++++++++++++++++++ libpdbg/p9chip.c | 32 ++++++++++++++++-- libpdbg/target.h | 2 ++ 6 files changed, 175 insertions(+), 8 deletions(-) diff --git a/libpdbg/chip.c b/libpdbg/chip.c index 4226cbf..6907765 100644 --- a/libpdbg/chip.c +++ b/libpdbg/chip.c @@ -84,6 +84,46 @@ static uint64_t mtmsr(uint64_t reg) return MTMSR_OPCODE | (reg << 21); } +static uint64_t mfxerf(uint64_t reg, uint64_t field) +{ + if (reg > 31) + PR_ERROR("Invalid register specified for mfxerf\n"); + + switch(field) { + case 0: + return MFXERF0_OPCODE | (reg << 21); + case 1: + return MFXERF1_OPCODE | (reg << 21); + case 2: + return MFXERF2_OPCODE | (reg << 21); + case 3: + return MFXERF3_OPCODE | (reg << 21); + default: + PR_ERROR("Invalid XER field specified\n"); + } + return 0; +} + +static uint64_t mtxerf(uint64_t reg, uint64_t field) +{ + if (reg > 31) + PR_ERROR("Invalid register specified for mtxerf\n"); + + switch(field) { + case 0: + return MTXERF0_OPCODE | (reg << 21); + case 1: + return MTXERF1_OPCODE | (reg << 21); + case 2: + return MTXERF2_OPCODE | (reg << 21); + case 3: + return MTXERF3_OPCODE | (reg << 21); + default: + PR_ERROR("Invalid XER field specified\n"); + } + return 0; +} + static uint64_t ld(uint64_t rt, uint64_t ds, uint64_t ra) { if ((rt > 31) | (ra > 31) | (ds > 0x3fff)) @@ -168,6 +208,7 @@ static int ram_instructions(struct pdbg_target *thread_target, uint64_t *opcodes /* RAM instructions */ for (i = -2; i < len + 2; i++) { if (i == -2) + /* Save r1 (assumes opcodes don't touch other registers) */ opcode = mtspr(277, 1); else if (i == -1) /* Save r0 (assumes opcodes don't touch other registers) */ @@ -309,6 +350,52 @@ int ram_getmem(struct pdbg_target *thread, uint64_t addr, uint64_t *value) return 0; } +int ram_getxer_field(struct pdbg_target *thread, uint32_t *value, uint32_t field) +{ + uint64_t opcodes[] = {mfxerf(0, field), mtspr(277, 0)}; + uint64_t results[] = {0, 0}; + + CHECK_ERR(ram_instructions(thread, opcodes, results, ARRAY_SIZE(opcodes), 0)); + + *value = results[1]; + return 0; +} + +int ram_getxer(struct pdbg_target *thread_target, uint32_t *value) +{ + + struct thread *thread; + + assert(!strcmp(thread_target->class, "thread")); + thread = target_to_thread(thread_target); + + CHECK_ERR(thread->ram_getxer(thread_target, value)); + + return 0; +} + +int ram_putxer_field(struct pdbg_target *thread, uint32_t value, uint32_t field) +{ + uint64_t opcodes[] = {mfspr(0, 277), mtxerf(0, field)}; + uint64_t results[] = {value, 0}; + + CHECK_ERR(ram_instructions(thread, opcodes, results, ARRAY_SIZE(opcodes), 0)); + + return 0; +} + +int ram_putxer(struct pdbg_target *thread_target, uint32_t value) +{ + struct thread *thread; + + assert(!strcmp(thread_target->class, "thread")); + thread = target_to_thread(thread_target); + + CHECK_ERR(thread->ram_putxer(thread_target, value)); + + return 0; +} + /* * Read the given ring from the given chiplet. Result must be large enough to hold ring_len bits. */ @@ -368,12 +455,8 @@ int ram_state_thread(struct pdbg_target *thread, struct thread_regs *regs) } printf("CR : 0x%08" PRIx32 "\n", regs->cr); -#if 0 - /* TODO: Disabling because reading SPR 0x1 reliably checkstops a P8 */ - ram_getspr(thread, 0x1, &value); - regs->xer = value; + ram_getxer(thread, ®s->xer); printf("XER : 0x%08" PRIx32 "\n", regs->xer); -#endif printf("GPRS :\n"); for (i = 0; i < 32; i++) { diff --git a/libpdbg/libpdbg.h b/libpdbg/libpdbg.h index c0990d9..81d6170 100644 --- a/libpdbg/libpdbg.h +++ b/libpdbg/libpdbg.h @@ -147,6 +147,10 @@ int ram_stop_thread(struct pdbg_target *target); int ram_sreset_thread(struct pdbg_target *target); int ram_state_thread(struct pdbg_target *target, struct thread_regs *regs); struct thread_state thread_status(struct pdbg_target *target); +int ram_getxer(struct pdbg_target *thread, uint32_t *value); +int ram_putxer(struct pdbg_target *thread, uint32_t value); +int ram_getxer_field(struct pdbg_target *thread, uint32_t *value, uint32_t field); +int ram_putxer_field(struct pdbg_target *thread, uint32_t value, uint32_t field); int getring(struct pdbg_target *chiplet_target, uint64_t ring_addr, uint64_t ring_len, uint32_t result[]); enum pdbg_sleep_state {PDBG_THREAD_STATE_RUN, PDBG_THREAD_STATE_DOZE, diff --git a/libpdbg/operations.h b/libpdbg/operations.h index 52bfe7e..c7e3218 100644 --- a/libpdbg/operations.h +++ b/libpdbg/operations.h @@ -64,12 +64,21 @@ #define MTMSR_OPCODE 0x7c000124UL #define MFSPR_OPCODE 0x7c0002a6UL #define MTSPR_OPCODE 0x7c0003a6UL +#define MTXERF0_OPCODE 0x00000008UL +#define MTXERF1_OPCODE 0x00000108UL +#define MTXERF2_OPCODE 0x00000208UL +#define MTXERF3_OPCODE 0x00000308UL +#define MFXERF0_OPCODE 0x00000010UL +#define MFXERF1_OPCODE 0x00000110UL +#define MFXERF2_OPCODE 0x00000210UL +#define MFXERF3_OPCODE 0x00000310UL #define MFOCRF_OPCODE 0x7c100026UL #define MFSPR_MASK (MFSPR_OPCODE | ((0x1f) << 16) | ((0x3e0) << 6)) #define MFXER_OPCODE (MFSPR_OPCODE | ((1 & 0x1f) << 16) | ((1 & 0x3e0) << 6)) +#define MTXER_OPCODE (MTSPR_OPCODE | ((1 & 0x1f) << 16) | ((1 & 0x3e0) << 6)) #define LD_OPCODE 0xe8000000UL -#define MFSPR_SPR(opcode) (((opcode >> 16) & 0x1f) | ((opcode >> 6) & 0x3e0)) +#define MXSPR_SPR(opcode) (((opcode >> 16) & 0x1f) | ((opcode >> 6) & 0x3e0)) /* GDB server functionality */ int gdbserver_start(uint16_t port); diff --git a/libpdbg/p8chip.c b/libpdbg/p8chip.c index 6640bb4..5626943 100644 --- a/libpdbg/p8chip.c +++ b/libpdbg/p8chip.c @@ -377,6 +377,45 @@ static int p8_ram_destroy(struct thread *thread) return 0; } +static int p8_ram_getxer(struct pdbg_target *thread, uint32_t *value) +{ + uint32_t fields[] = {0, 0, 0, 0}; + int i; + + /* On POWER8 we can't get xer with getspr. We can only get IBM + * bits 33-39 and 41-43 using the xer fields. The rest of the + * bits are in latches somewhere. */ + PR_WARNING("Can only get IBM bits 33-39 and 41-43 of the XER register\n"); + for (i = 0; i < 4; i++) { + CHECK_ERR(ram_getxer_field(thread, &fields[i], i)); + } + *value = fields[0] | fields[1] | fields[2] | fields[3]; + + return 0; +} + +static int p8_ram_putxer(struct pdbg_target *thread, uint32_t value) +{ + uint32_t fields[] = {0, 0, 0, 0}; + int i; + + /* On POWER8 we seem to be only able to set IBM bits 33 and 34. This is + * f0 and the first bit of f1, the only bits in the four XER fields + * that are publicly documented. + */ + PR_WARNING("Can only set IBM bits 33 and 34 of the XER register\n"); + fields[0] = (value & (0x1 << 30)); + fields[1] = (value & (0x3 << 28)); + fields[2] = (value & (0xf << 24)); + fields[3] = (value & (0x7 << 20 )); + + for (i = 0; i < 4; i++) { + CHECK_ERR(ram_putxer_field(thread, fields[i], i)); + } + + return 0; +} + /* * Initialise all viable threads for ramming on the given core. */ @@ -404,6 +443,8 @@ static struct thread p8_thread = { .ram_setup = p8_ram_setup, .ram_instruction = p8_ram_instruction, .ram_destroy = p8_ram_destroy, + .ram_getxer = p8_ram_getxer, + .ram_putxer = p8_ram_putxer, }; DECLARE_HW_UNIT(p8_thread); diff --git a/libpdbg/p9chip.c b/libpdbg/p9chip.c index c5de3bb..a266188 100644 --- a/libpdbg/p9chip.c +++ b/libpdbg/p9chip.c @@ -275,7 +275,6 @@ static int __p9_ram_instruction(struct thread *thread, uint64_t opcode, uint64_t switch(opcode & OPCODE_MASK) { case MTNIA_OPCODE: predecode = 8; - /* Not currently supported as we can only MTNIA from LR */ PR_ERROR("MTNIA is not currently supported\n"); break; @@ -290,7 +289,18 @@ static int __p9_ram_instruction(struct thread *thread, uint64_t opcode, uint64_t break; case MFSPR_OPCODE: - switch(MFSPR_SPR(opcode)) { + switch(MXSPR_SPR(opcode)) { + case 1: /* XER */ + predecode = 4; + break; + default: + predecode = 0; + break; + } + break; + + case MTSPR_OPCODE: + switch(MXSPR_SPR(opcode)) { case 1: /* XER */ predecode = 4; break; @@ -373,6 +383,22 @@ static int p9_ram_destroy(struct thread *thread) return 0; } +static int p9_ram_getxer(struct pdbg_target *thread, uint32_t *value) +{ + CHECK_ERR(ram_getspr(thread, 1, (uint64_t *)value)); + + return 0; +} + +static int p9_ram_putxer(struct pdbg_target *thread, uint32_t value) +{ + /* On POWER9 we can only set bits 32-34 and 44-63.*/ + CHECK_ERR(ram_putspr(thread, 1, (uint64_t)value)); + + return 0; + +} + static struct thread p9_thread = { .target = { .name = "POWER9 Thread", @@ -387,6 +413,8 @@ static struct thread p9_thread = { .ram_setup = p9_ram_setup, .ram_instruction = p9_ram_instruction, .ram_destroy = p9_ram_destroy, + .ram_getxer = p9_ram_getxer, + .ram_putxer = p9_ram_putxer, }; DECLARE_HW_UNIT(p9_thread); diff --git a/libpdbg/target.h b/libpdbg/target.h index e4a3ed4..87e9f25 100644 --- a/libpdbg/target.h +++ b/libpdbg/target.h @@ -152,6 +152,8 @@ struct thread { int (*ram_setup)(struct thread *); int (*ram_instruction)(struct thread *, uint64_t opcode, uint64_t *scratch); int (*ram_destroy)(struct thread *); + int (*ram_getxer)(struct pdbg_target *, uint32_t *value); + int (*ram_putxer)(struct pdbg_target *, uint32_t value); }; #define target_to_thread(x) container_of(x, struct thread, target) From patchwork Fri Jun 22 04:51:11 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rashmica Gupta X-Patchwork-Id: 933103 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 41BmPp6l4Gz9s47 for ; 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Thu, 21 Jun 2018 21:51:51 -0700 (PDT) From: Rashmica Gupta To: pdbg@lists.ozlabs.org Date: Fri, 22 Jun 2018 14:51:11 +1000 Message-Id: <20180622045116.12059-4-rashmica.g@gmail.com> X-Mailer: git-send-email 2.14.4 In-Reply-To: <20180622045116.12059-1-rashmica.g@gmail.com> References: <20180622045116.12059-1-rashmica.g@gmail.com> Subject: [Pdbg] [PATCH 3/8] pdbg: Add getxer & putxer commands X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Rashmica Gupta --- src/main.c | 6 ++++-- src/reg.c | 23 +++++++++++++++++++++++ 2 files changed, 27 insertions(+), 2 deletions(-) diff --git a/src/main.c b/src/main.c index 1cfaca7..ce218d5 100644 --- a/src/main.c +++ b/src/main.c @@ -84,7 +84,7 @@ extern struct optcmd_cmd optcmd_getnia, optcmd_putnia, optcmd_getmsr, optcmd_putmsr, optcmd_getring, optcmd_start, optcmd_stop, optcmd_step, optcmd_threadstatus, optcmd_sreset, optcmd_regs, optcmd_probe, - optcmd_getmem, optcmd_putmem; + optcmd_getmem, optcmd_putmem, optcmd_getxer, optcmd_putxer; static struct optcmd_cmd *cmds[] = { &optcmd_getscom, &optcmd_putscom, &optcmd_getcfam, &optcmd_putcfam, @@ -92,7 +92,7 @@ static struct optcmd_cmd *cmds[] = { &optcmd_getnia, &optcmd_putnia, &optcmd_getmsr, &optcmd_putmsr, &optcmd_getring, &optcmd_start, &optcmd_stop, &optcmd_step, &optcmd_threadstatus, &optcmd_sreset, &optcmd_regs, &optcmd_probe, - &optcmd_getmem, &optcmd_putmem, + &optcmd_getmem, &optcmd_putmem, &optcmd_getxer, &optcmd_putxer, }; /* Purely for printing usage text. We could integrate printing argument and flag @@ -112,6 +112,8 @@ static struct action actions[] = { { "putspr", " ", "Write Special Purpose Register (SPR)" }, { "getmsr", "", "Get Machine State Register (MSR)" }, { "putmsr", "", "Write Machine State Register (MSR)" }, + { "getxer", "", "Get Fixed Point Exception Register (XER)" }, + { "putxer", "", "Write Fixed Point Exception Register (XER)" }, { "getring", " ", "Read a ring. Length must be correct" }, { "start", "", "Start thread" }, { "step", "", "Set a thread instructions" }, diff --git a/src/reg.c b/src/reg.c index aa77a8a..dbef0ef 100644 --- a/src/reg.c +++ b/src/reg.c @@ -18,12 +18,14 @@ #include #include #include +#include #include #include "main.h" #include "optcmd.h" +#define REG_XER -4 #define REG_MEM -3 #define REG_MSR -2 #define REG_NIA -1 @@ -42,6 +44,8 @@ static void print_proc_reg(struct pdbg_target *target, uint64_t reg, uint64_t va printf("msr: "); else if (reg == REG_NIA) printf("nia: "); + else if (reg == REG_XER) + printf("xer: "); else if (reg > REG_R31) printf("spr%03" PRIu64 ": ", reg - REG_R31); else if (reg >= 0 && reg <= 31) @@ -63,6 +67,8 @@ static int putprocreg(struct pdbg_target *target, uint32_t index, uint64_t *reg, rc = ram_putmsr(target, *value); else if (*reg == REG_NIA) rc = ram_putnia(target, *value); + else if (*reg == REG_XER) + rc = ram_putxer(target, *value); else if (*reg > REG_R31) rc = ram_putspr(target, *reg - REG_R31, *value); else if (*reg >= 0 && *reg <= 31) @@ -82,6 +88,8 @@ static int getprocreg(struct pdbg_target *target, uint32_t index, uint64_t *reg, rc = ram_getmsr(target, &value); else if (*reg == REG_NIA) rc = ram_getnia(target, &value); + else if (*reg == REG_XER) + rc = ram_getxer(target, (uint32_t *)&value); else if (*reg > REG_R31) rc = ram_getspr(target, *reg - REG_R31, &value); else if (*reg >= 0 && *reg <= 31) @@ -147,3 +155,18 @@ static int putmsr(uint64_t data) return for_each_target("thread", putprocreg, ®, &data); } OPTCMD_DEFINE_CMD_WITH_ARGS(putmsr, putmsr, (DATA)); + +static int getxer(void) +{ + uint64_t reg = REG_XER; + return for_each_target("thread", getprocreg, ®, NULL); +} +OPTCMD_DEFINE_CMD(getxer, getxer); + +static int putxer(uint32_t data) +{ + uint64_t reg = REG_XER; + uint64_t d = data; + return for_each_target("thread", putprocreg, ®, &d); +} +OPTCMD_DEFINE_CMD_WITH_ARGS(putxer, putxer, (DATA32)); From patchwork Fri Jun 22 04:51:12 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rashmica Gupta X-Patchwork-Id: 933104 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 41BmPs2rQdz9s0W for ; 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Thu, 21 Jun 2018 21:51:54 -0700 (PDT) From: Rashmica Gupta To: pdbg@lists.ozlabs.org Date: Fri, 22 Jun 2018 14:51:12 +1000 Message-Id: <20180622045116.12059-5-rashmica.g@gmail.com> X-Mailer: git-send-email 2.14.4 In-Reply-To: <20180622045116.12059-1-rashmica.g@gmail.com> References: <20180622045116.12059-1-rashmica.g@gmail.com> Subject: [Pdbg] [PATCH 4/8] libpdbg: Make getcr actually get all of the Condition Register X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Rashmica Gupta --- libpdbg/chip.c | 25 ++++++++++++++++++------- libpdbg/libpdbg.h | 1 + 2 files changed, 19 insertions(+), 7 deletions(-) diff --git a/libpdbg/chip.c b/libpdbg/chip.c index 6907765..a4ee1e4 100644 --- a/libpdbg/chip.c +++ b/libpdbg/chip.c @@ -321,7 +321,7 @@ int ram_getmsr(struct pdbg_target *thread, uint64_t *value) return 0; } -int ram_getcr(struct pdbg_target *thread, int cr, uint64_t *value) +int ram_getcr_field(struct pdbg_target *thread, int cr, uint32_t *value) { uint64_t opcodes[] = {mfocrf(0, cr), mtspr(277, 0)}; uint64_t results[] = {0, 0}; @@ -331,6 +331,22 @@ int ram_getcr(struct pdbg_target *thread, int cr, uint64_t *value) return 0; } +int ram_getcr(struct pdbg_target *thread, uint32_t *value) +{ + uint32_t cr_field, cr = 0; + int i; + + for (i = 0; i < 8; i++){ + cr_field = 0; + ram_getcr_field(thread, i, &cr_field); + /* We are not guarenteed that the other bits will be zeroed out */ + cr |= cr_field & (0xf << 4*i); + } + + *value = cr; + return 0; +} + int ram_putmsr(struct pdbg_target *thread, uint64_t value) { uint64_t opcodes[] = {mfspr(0, 277), mtmsr(0)}; @@ -447,12 +463,7 @@ int ram_state_thread(struct pdbg_target *thread, struct thread_regs *regs) ram_getspr(thread, 815, ®s->tar); printf("TAR : 0x%016" PRIx64 "\n", regs->tar); - regs->cr = 0; - for (i = 0; i < 8; i++) { - uint64_t cr; - ram_getcr(thread, i, &cr); - regs->cr |= cr; - } + ram_getcr(thread, ®s->cr); printf("CR : 0x%08" PRIx32 "\n", regs->cr); ram_getxer(thread, ®s->xer); diff --git a/libpdbg/libpdbg.h b/libpdbg/libpdbg.h index 81d6170..28470c3 100644 --- a/libpdbg/libpdbg.h +++ b/libpdbg/libpdbg.h @@ -138,6 +138,7 @@ int ram_putnia(struct pdbg_target *target, uint64_t val); int ram_putspr(struct pdbg_target *target, int spr, uint64_t val); int ram_putgpr(struct pdbg_target *target, int spr, uint64_t val); int ram_getmsr(struct pdbg_target *target, uint64_t *val); +int ram_getcr(struct pdbg_target *thread, uint32_t *value); int ram_getnia(struct pdbg_target *target, uint64_t *val); int ram_getspr(struct pdbg_target *target, int spr, uint64_t *val); int ram_getgpr(struct pdbg_target *target, int gpr, uint64_t *val); From patchwork Fri Jun 22 04:51:13 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rashmica Gupta X-Patchwork-Id: 933105 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 41BmPw09YSz9s47 for ; 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Thu, 21 Jun 2018 21:51:56 -0700 (PDT) From: Rashmica Gupta To: pdbg@lists.ozlabs.org Date: Fri, 22 Jun 2018 14:51:13 +1000 Message-Id: <20180622045116.12059-6-rashmica.g@gmail.com> X-Mailer: git-send-email 2.14.4 In-Reply-To: <20180622045116.12059-1-rashmica.g@gmail.com> References: <20180622045116.12059-1-rashmica.g@gmail.com> Subject: [Pdbg] [PATCH 5/8] libpdbg: Add in mtocrf and putcr function X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Rashmica Gupta --- libpdbg/chip.c | 36 ++++++++++++++++++++++++++++++++++++ libpdbg/libpdbg.h | 1 + libpdbg/operations.h | 1 + src/reg.c | 2 ++ 4 files changed, 40 insertions(+) diff --git a/libpdbg/chip.c b/libpdbg/chip.c index a4ee1e4..5e61fe2 100644 --- a/libpdbg/chip.c +++ b/libpdbg/chip.c @@ -52,6 +52,20 @@ static uint64_t mfocrf(uint64_t reg, uint64_t cr) return MFOCRF_OPCODE | (reg << 21) | (1U << (12 + cr)); } +static uint64_t mtocrf(uint64_t cr, uint64_t reg) +{ + if (reg > 31) { + PR_ERROR("Invalid register specified for mfocrf\n"); + exit(1); + } + if (cr > 7) { + PR_ERROR("Invalid CR field specified\n"); + exit(1); + } + + return MTOCRF_OPCODE | (reg << 21) | (1U << (12 + cr)); +} + static uint64_t mfnia(uint64_t reg) { if (reg > 31) @@ -347,6 +361,28 @@ int ram_getcr(struct pdbg_target *thread, uint32_t *value) return 0; } +int ram_putcr_field(struct pdbg_target *thread, int cr, uint32_t value) +{ + uint64_t opcodes[] = {mfspr(0, 277), mtocrf(cr, 0)}; + uint64_t results[] = {value, 0}; + + CHECK_ERR(ram_instructions(thread, opcodes, results, ARRAY_SIZE(opcodes), 0)); + return 0; +} + +int ram_putcr(struct pdbg_target *thread, uint32_t value) +{ + uint32_t cr_field; + int i; + + for (i = 0; i < 8; i++){ + cr_field = value & (0xf << 4*i); + ram_putcr_field(thread, i, cr_field); + } + + return 0; +} + int ram_putmsr(struct pdbg_target *thread, uint64_t value) { uint64_t opcodes[] = {mfspr(0, 277), mtmsr(0)}; diff --git a/libpdbg/libpdbg.h b/libpdbg/libpdbg.h index 28470c3..0b69554 100644 --- a/libpdbg/libpdbg.h +++ b/libpdbg/libpdbg.h @@ -139,6 +139,7 @@ int ram_putspr(struct pdbg_target *target, int spr, uint64_t val); int ram_putgpr(struct pdbg_target *target, int spr, uint64_t val); int ram_getmsr(struct pdbg_target *target, uint64_t *val); int ram_getcr(struct pdbg_target *thread, uint32_t *value); +int ram_putcr(struct pdbg_target *thread, uint32_t value); int ram_getnia(struct pdbg_target *target, uint64_t *val); int ram_getspr(struct pdbg_target *target, int spr, uint64_t *val); int ram_getgpr(struct pdbg_target *target, int gpr, uint64_t *val); diff --git a/libpdbg/operations.h b/libpdbg/operations.h index c7e3218..74baed8 100644 --- a/libpdbg/operations.h +++ b/libpdbg/operations.h @@ -73,6 +73,7 @@ #define MFXERF2_OPCODE 0x00000210UL #define MFXERF3_OPCODE 0x00000310UL #define MFOCRF_OPCODE 0x7c100026UL +#define MTOCRF_OPCODE 0x7C100120UL #define MFSPR_MASK (MFSPR_OPCODE | ((0x1f) << 16) | ((0x3e0) << 6)) #define MFXER_OPCODE (MFSPR_OPCODE | ((1 & 0x1f) << 16) | ((1 & 0x3e0) << 6)) #define MTXER_OPCODE (MTSPR_OPCODE | ((1 & 0x1f) << 16) | ((1 & 0x3e0) << 6)) diff --git a/src/reg.c b/src/reg.c index dbef0ef..65e8eb4 100644 --- a/src/reg.c +++ b/src/reg.c @@ -90,6 +90,8 @@ static int getprocreg(struct pdbg_target *target, uint32_t index, uint64_t *reg, rc = ram_getnia(target, &value); else if (*reg == REG_XER) rc = ram_getxer(target, (uint32_t *)&value); + else if (*reg == REG_CR) + rc = ram_getcr(target, (uint32_t *)&value); else if (*reg > REG_R31) rc = ram_getspr(target, *reg - REG_R31, &value); else if (*reg >= 0 && *reg <= 31) From patchwork Fri Jun 22 04:51:14 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rashmica Gupta X-Patchwork-Id: 933106 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 41BmPz2Q5jz9s47 for ; Fri, 22 Jun 2018 14:52:07 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; 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Thu, 21 Jun 2018 21:51:58 -0700 (PDT) From: Rashmica Gupta To: pdbg@lists.ozlabs.org Date: Fri, 22 Jun 2018 14:51:14 +1000 Message-Id: <20180622045116.12059-7-rashmica.g@gmail.com> X-Mailer: git-send-email 2.14.4 In-Reply-To: <20180622045116.12059-1-rashmica.g@gmail.com> References: <20180622045116.12059-1-rashmica.g@gmail.com> Subject: [Pdbg] [PATCH 6/8] pdbg: Add getcr and putcr options X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Rashmica Gupta --- src/main.c | 6 +++++- src/reg.c | 20 ++++++++++++++++++++ 2 files changed, 25 insertions(+), 1 deletion(-) diff --git a/src/main.c b/src/main.c index ce218d5..33f7edb 100644 --- a/src/main.c +++ b/src/main.c @@ -84,7 +84,8 @@ extern struct optcmd_cmd optcmd_getnia, optcmd_putnia, optcmd_getmsr, optcmd_putmsr, optcmd_getring, optcmd_start, optcmd_stop, optcmd_step, optcmd_threadstatus, optcmd_sreset, optcmd_regs, optcmd_probe, - optcmd_getmem, optcmd_putmem, optcmd_getxer, optcmd_putxer; + optcmd_getmem, optcmd_putmem, optcmd_getxer, optcmd_putxer, + optcmd_getcr, optcmd_putcr; static struct optcmd_cmd *cmds[] = { &optcmd_getscom, &optcmd_putscom, &optcmd_getcfam, &optcmd_putcfam, @@ -93,6 +94,7 @@ static struct optcmd_cmd *cmds[] = { &optcmd_getring, &optcmd_start, &optcmd_stop, &optcmd_step, &optcmd_threadstatus, &optcmd_sreset, &optcmd_regs, &optcmd_probe, &optcmd_getmem, &optcmd_putmem, &optcmd_getxer, &optcmd_putxer, + &optcmd_getcr, &optcmd_putcr, }; /* Purely for printing usage text. We could integrate printing argument and flag @@ -112,6 +114,8 @@ static struct action actions[] = { { "putspr", " ", "Write Special Purpose Register (SPR)" }, { "getmsr", "", "Get Machine State Register (MSR)" }, { "putmsr", "", "Write Machine State Register (MSR)" }, + { "getcr", "", "Get Condition Register (CR)" }, + { "putcr", "", "Write Condition Register (CR)" }, { "getxer", "", "Get Fixed Point Exception Register (XER)" }, { "putxer", "", "Write Fixed Point Exception Register (XER)" }, { "getring", " ", "Read a ring. Length must be correct" }, diff --git a/src/reg.c b/src/reg.c index 65e8eb4..60705f1 100644 --- a/src/reg.c +++ b/src/reg.c @@ -25,6 +25,7 @@ #include "main.h" #include "optcmd.h" +#define REG_CR -5 #define REG_XER -4 #define REG_MEM -3 #define REG_MSR -2 @@ -46,6 +47,8 @@ static void print_proc_reg(struct pdbg_target *target, uint64_t reg, uint64_t va printf("nia: "); else if (reg == REG_XER) printf("xer: "); + else if (reg == REG_CR) + printf("cr: "); else if (reg > REG_R31) printf("spr%03" PRIu64 ": ", reg - REG_R31); else if (reg >= 0 && reg <= 31) @@ -69,6 +72,8 @@ static int putprocreg(struct pdbg_target *target, uint32_t index, uint64_t *reg, rc = ram_putnia(target, *value); else if (*reg == REG_XER) rc = ram_putxer(target, *value); + else if (*reg == REG_CR) + rc = ram_putcr(target, *value); else if (*reg > REG_R31) rc = ram_putspr(target, *reg - REG_R31, *value); else if (*reg >= 0 && *reg <= 31) @@ -172,3 +177,18 @@ static int putxer(uint32_t data) return for_each_target("thread", putprocreg, ®, &d); } OPTCMD_DEFINE_CMD_WITH_ARGS(putxer, putxer, (DATA32)); + +static int getcr(void) +{ + uint64_t cr = REG_CR; + return for_each_target("thread", getprocreg, &cr, NULL); +} +OPTCMD_DEFINE_CMD(getcr, getcr); + +static int putcr(uint32_t data) +{ + uint64_t cr = REG_CR; + uint64_t d = data; + return for_each_target("thread", putprocreg, &cr, &d); +} +OPTCMD_DEFINE_CMD_WITH_ARGS(putcr, putcr, (DATA32)); From patchwork Fri Jun 22 04:51:15 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rashmica Gupta X-Patchwork-Id: 933107 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 41BmQ14njsz9s52 for ; Fri, 22 Jun 2018 14:52:09 +1000 (AEST) Authentication-Results: ozlabs.org; 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Thu, 21 Jun 2018 21:52:00 -0700 (PDT) From: Rashmica Gupta To: pdbg@lists.ozlabs.org Date: Fri, 22 Jun 2018 14:51:15 +1000 Message-Id: <20180622045116.12059-8-rashmica.g@gmail.com> X-Mailer: git-send-email 2.14.4 In-Reply-To: <20180622045116.12059-1-rashmica.g@gmail.com> References: <20180622045116.12059-1-rashmica.g@gmail.com> Subject: [Pdbg] [PATCH 7/8] libpdbg: Check if scom controllers are exposed X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" If CONFIG_SCOM_DEBUGFS is not set in the running kernel then the scom controllers are not exposed and so using getscom won't work. Add check for /sys/kernel/debug/powerpc/scom to give a more useful error message. Signed-off-by: Rashmica Gupta --- libpdbg/host.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/libpdbg/host.c b/libpdbg/host.c index 483e048..eb627be 100644 --- a/libpdbg/host.c +++ b/libpdbg/host.c @@ -95,7 +95,15 @@ static int host_pib_probe(struct pdbg_target *target) if (chip_id == -1) goto out; - if (asprintf(&access_fn, "%s/%08x/access", XSCOM_BASE_PATH, chip_id) < 0) + /* This check should probably be done earlier */ + if (access(XSCOM_BASE_PATH, F_OK) == -1) + { + PR_ERROR("Can not access %s. ", XSCOM_BASE_PATH); + PR_ERROR("Is CONFIG_SCOM_DEBUGFS set? "); + PR_ERROR("You may need to re-run the command as root.\n"); + } + + if (asprintf(&access_fn, "%s/%08d/access", XSCOM_BASE_PATH, chip_id) < 0) goto out; *fd = open(access_fn, O_RDWR); From patchwork Fri Jun 22 04:51:16 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rashmica Gupta X-Patchwork-Id: 933108 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 41BmQ40f7Qz9s47 for ; Fri, 22 Jun 2018 14:52:12 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="GAUmfHa1"; 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Thu, 21 Jun 2018 21:52:02 -0700 (PDT) Received: from rashmica.ozlabs.ibm.com ([122.99.82.10]) by smtp.gmail.com with ESMTPSA id v27-v6sm11874992pfi.23.2018.06.21.21.52.00 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 21 Jun 2018 21:52:02 -0700 (PDT) From: Rashmica Gupta To: pdbg@lists.ozlabs.org Date: Fri, 22 Jun 2018 14:51:16 +1000 Message-Id: <20180622045116.12059-9-rashmica.g@gmail.com> X-Mailer: git-send-email 2.14.4 In-Reply-To: <20180622045116.12059-1-rashmica.g@gmail.com> References: <20180622045116.12059-1-rashmica.g@gmail.com> Subject: [Pdbg] [PATCH 8/8] pdbg: Make return codes consistent for get/put registers X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" --- src/reg.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/reg.c b/src/reg.c index 60705f1..679bf45 100644 --- a/src/reg.c +++ b/src/reg.c @@ -104,7 +104,7 @@ static int getprocreg(struct pdbg_target *target, uint32_t index, uint64_t *reg, print_proc_reg(target, *reg, value, rc); - return !rc; + return rc; } static int getgpr(int gpr)