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([2a00:c281:14ec:b301::2]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432aa5b5b2dsm103421725e9.1.2024.11.08.06.08.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Nov 2024 06:08:38 -0800 (PST) From: Gregory Kanter To: gcc-patches@gcc.gnu.org Cc: Gregory Kanter Subject: [PATCH] [APX EGPR] Fix indirect call prefix Date: Fri, 8 Nov 2024 16:07:31 +0200 Message-ID: <20241108140730.1844187-2-gregorykanter1@gmail.com> X-Mailer: git-send-email 2.46.1 MIME-Version: 1.0 X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org Fix indirect branch CS prefix for EGPR registers. Because of a mistake, they are not prefixed with CS when the indirect-branch-cs-prefix flag is specified. gcc/ChangeLog: * config/i386/i386.cc (ix86_output_indirect_branch_via_reg): fix wrong condition for REX2 registers. * config/i386/i386.opt: Clarify that -mindirect-branch-cs-prefix also applies to EGPR registers when enabled. Signed-off-by: Gregory Kanter --- gcc/config/i386/i386.cc | 2 +- gcc/config/i386/i386.opt | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc index 6ac3a5d55f..5728ba4408 100644 --- a/gcc/config/i386/i386.cc +++ b/gcc/config/i386/i386.cc @@ -16798,7 +16798,7 @@ ix86_output_indirect_branch_via_reg (rtx call_op, bool sibcall_p) { if (thunk_name != NULL) { - if ((REX_INT_REGNO_P (regno) || REX_INT_REGNO_P (regno)) + if ((REX_INT_REGNO_P (regno) || REX2_INT_REGNO_P (regno)) && ix86_indirect_branch_cs_prefix) fprintf (asm_out_file, "\tcs\n"); fprintf (asm_out_file, "\tcall\t"); diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt index 99e86f545e..b0f92cbc0f 100644 --- a/gcc/config/i386/i386.opt +++ b/gcc/config/i386/i386.opt @@ -1097,7 +1097,7 @@ Enum(indirect_branch) String(thunk-extern) Value(indirect_branch_thunk_extern) mindirect-branch-cs-prefix Target Var(ix86_indirect_branch_cs_prefix) Init(0) -Add CS prefix to call and jmp to indirect thunk with branch target in r8-r15 registers. +Add CS prefix to call and jmp to indirect thunk with branch target in r8-r15 registers (and r16-r31 when EGPR registers are in use). mindirect-branch-register Target Var(ix86_indirect_branch_register) Init(0)