From patchwork Fri Nov 8 02:40:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Hu, Lin1" X-Patchwork-Id: 2008208 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=c7pr7agg; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Xl39D36TRz1xyM for ; Fri, 8 Nov 2024 13:41:19 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id D59493858C52 for ; Fri, 8 Nov 2024 02:41:17 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.16]) by sourceware.org (Postfix) with ESMTPS id 299DA3858D33 for ; Fri, 8 Nov 2024 02:40:55 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 299DA3858D33 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 299DA3858D33 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=192.198.163.16 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1731033657; cv=none; b=cAcbvBHjrEP4tpVKloDJWM1CXMfkuBVfF9W0LnC6ahPk+d3vhvy1kA6faH/S8p2PmkqQ0qQfBM/+ng+PHG/jTn+zLADmFXG73JHD3hYmiaO9hFtmjRsU7t0DuMfPXWwvXUg6Z47839Vp3hdQaXOymPp+JtQlsXnZy7rFJxCt9zQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1731033657; c=relaxed/simple; bh=yMLfpHiBkELrbSS+JliOI/kvPuCa53Iipit59PtP2/M=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=srkonDUS4jNojFrjBdhWMZXcapNFF1FJwWObZ4ILOgGAICg7tyxC2bI6oVYPNabja9JLqmUbQp0CJfScB80gX3WkVcQmvo3u9dDtWYn7o/HFyT5H7Vd/72eqnVbmxgZDNmin+D3tlmovAnXBoQCuRNF6wYena2WIuUPp4Zfqh44= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731033655; x=1762569655; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=yMLfpHiBkELrbSS+JliOI/kvPuCa53Iipit59PtP2/M=; b=c7pr7aggiqqmAbqtnUEj542ywBCS+caJ953wQXWBa1nDtRv6hPeYw+Dx lnibVKLUNknpMFTrzSHyt7JDjmKEiO89XBjyQNM46DxISk6Gjdz3ic2tk lQLXseIonGJUAEBxXbfEpSf+WYJOSe2T/B0UQVHC/rY7IIdQvyoQIiIi9 xobaXRlmttHdPJLRopsUTHLBRwNZzC/FAYWd7kLcOnSbcJCU4+wwyZjtE bd8q2bjSIhOqmUvCBm1oMNi6y5LkEmZTtMKyaCN8t1Cm2BwRq5LJeTKqC 4W3iBMtCOEja6MjvJn8WA+AUyLNEmzuJuFmf4RSFvRVrwxPy40dGyPy/d w==; X-CSE-ConnectionGUID: E1cRQQTISJa7h94scIVNAA== X-CSE-MsgGUID: b3sDsqdoQo69oVBgi9dJ0A== X-IronPort-AV: E=McAfee;i="6700,10204,11249"; a="18534486" X-IronPort-AV: E=Sophos;i="6.12,136,1728975600"; d="scan'208";a="18534486" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by fmvoesa110.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Nov 2024 18:40:54 -0800 X-CSE-ConnectionGUID: pBRmhhHRTfuKFCWNyq1fqw== X-CSE-MsgGUID: tXJQWqFtSfiYL7KyXHpcXQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,136,1728975600"; d="scan'208";a="90211075" Received: from shliclel4217.sh.intel.com ([10.239.240.127]) by orviesa005.jf.intel.com with ESMTP; 07 Nov 2024 18:40:53 -0800 From: "Hu, Lin1" To: gcc-patches@gcc.gnu.org Cc: hongtao.liu@intel.com, ubizjak@gmail.com Subject: [PATCH] i386: Disallow long address mode in the x32 mode. [PR 117418] Date: Fri, 8 Nov 2024 10:40:52 +0800 Message-Id: <20241108024052.2847832-1-lin1.hu@intel.com> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org Hi, all -maddress-mode=long will let Pmode = DI_mode, but -mx32 request x32 ABI. So raise an error to avoid ICE. Bootstrapped and regtested, OK for trunk? BRs, Lin gcc/ChangeLog: PR target/117418 * config/i386/i386-options.cc (ix86_option_override_internal): raise an error with option -mx32 -maddress-mode=long. gcc/testsuite/ChangeLog: PR target/117418 * gcc.target/i386/pr117418-1.c: New test. --- gcc/config/i386/i386-options.cc | 4 ++++ gcc/testsuite/gcc.target/i386/pr117418-1.c | 13 +++++++++++++ 2 files changed, 17 insertions(+) create mode 100644 gcc/testsuite/gcc.target/i386/pr117418-1.c diff --git a/gcc/config/i386/i386-options.cc b/gcc/config/i386/i386-options.cc index 239269ecbdd..ba1abea2537 100644 --- a/gcc/config/i386/i386-options.cc +++ b/gcc/config/i386/i386-options.cc @@ -2190,6 +2190,10 @@ ix86_option_override_internal (bool main_args_p, error ("address mode %qs not supported in the %s bit mode", TARGET_64BIT_P (opts->x_ix86_isa_flags) ? "short" : "long", TARGET_64BIT_P (opts->x_ix86_isa_flags) ? "64" : "32"); + + if (TARGET_X32_P (opts->x_ix86_isa_flags) + && opts_set->x_ix86_pmode == PMODE_DI) + error ("address mode 'long' not supported in the x32 ABI"); } else opts->x_ix86_pmode = TARGET_LP64_P (opts->x_ix86_isa_flags) diff --git a/gcc/testsuite/gcc.target/i386/pr117418-1.c b/gcc/testsuite/gcc.target/i386/pr117418-1.c new file mode 100644 index 00000000000..08430ef9d4b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr117418-1.c @@ -0,0 +1,13 @@ +/* PR target/117418 */ +/* { dg-do compile } */ +/* { dg-options "-maddress-mode=long -mwidekl -mx32" } */ +/* { dg-error "address mode 'long' not supported in the x32 ABI" "" { target *-*-* } 0 } */ + +typedef __attribute__((__vector_size__(16))) long long V; +V a; + +void +foo() +{ + __builtin_ia32_encodekey256_u32(0, a, a, &a); +}