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Tue, 05 Nov 2024 21:14:37 +0100 (CET) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 06FEC40044; Tue, 5 Nov 2024 21:13:53 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 046B72A0A2B; Tue, 5 Nov 2024 21:13:27 +0100 (CET) Received: from jkgcxl0004.jkg.st.com (10.74.22.255) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.37; Tue, 5 Nov 2024 21:13:26 +0100 From: =?utf-8?q?Torbj=C3=B6rn_SVENSSON?= To: CC: , , =?utf-8?q?Torb?= =?utf-8?q?j=C3=B6rn_SVENSSON?= Subject: [PATCH] testsuite: arm: Require 16-bit float support Date: Tue, 5 Nov 2024 21:06:21 +0100 Message-ID: <20241105200619.3195453-1-torbjorn.svensson@foss.st.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Originating-IP: [10.74.22.255] X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org Based on how these functions are used in test cases, I think it's correct to require 16-bit float support in both functions. Without this change, the checks passes for armv8-m and armv8.1-m, but the test cases that uses them fails due to the incorrect -mfpu option. Ok for trunk and releases/gcc-14? --- In both functions, it's assumed that 16-bit float support is available, but it's not checked. In addition, check_effective_target_arm_v8_2a_fp16_neon_ok also assumes that neon is used, but it's not checked. gcc/testsuite/ChangeLog: * lib/target-supports.exp (check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache): Check that 16-bit float is supported. (check_effective_target_arm_v8_2a_fp16_neon_ok_nocache): Check that neon is used and that 16-bit float is supported. Signed-off-by: Torbjörn SVENSSON --- gcc/testsuite/lib/target-supports.exp | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 75703ddca60..19a9981d9cd 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -6360,6 +6360,12 @@ proc check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache { } { "-mfpu=fp-armv8 -mfloat-abi=softfp"} { if { [check_no_compiler_messages_nocache \ arm_v8_2a_fp16_scalar_ok object { + #if !defined (__ARM_FP) + #error "__ARM_FP not defined" + #endif + #if ((__ARM_FP & 1) == 0) + #error "__ARM_FP indicates that 16-bit is not supported" + #endif #if !defined (__ARM_FEATURE_FP16_SCALAR_ARITHMETIC) #error "__ARM_FEATURE_FP16_SCALAR_ARITHMETIC not defined" #endif @@ -6395,6 +6401,15 @@ proc check_effective_target_arm_v8_2a_fp16_neon_ok_nocache { } { "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} { if { [check_no_compiler_messages_nocache \ arm_v8_2a_fp16_neon_ok object { + #if !defined (__ARM_FP) + #error "__ARM_FP not defined" + #endif + #if ((__ARM_FP & 1) == 0) + #error "__ARM_FP indicates that 16-bit is not supported" + #endif + #if !defined (__ARM_NEON__) + #error "__ARM_NEON__ not defined" + #endif #if !defined (__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) #error "__ARM_FEATURE_FP16_VECTOR_ARITHMETIC not defined" #endif