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Mon, 28 Oct 2024 09:15:57 GMT Received: from smtpav06.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A9F702033E; Mon, 28 Oct 2024 09:15:57 +0000 (GMT) Received: from smtpav06.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 6E9402034C; Mon, 28 Oct 2024 09:15:47 +0000 (GMT) Received: from li-e7e2bd4c-2dae-11b2-a85c-bfd29497117c.ibm.com.com (unknown [9.39.17.130]) by smtpav06.fra02v.mail.ibm.com (Postfix) with ESMTP; Mon, 28 Oct 2024 09:15:47 +0000 (GMT) From: Amit Machhiwal To: Nicholas Piggin , qemu-ppc@nongnu.org, Vaibhav Jain , Harsh Prateek Bora Cc: David Gibson , Daniel Henrique Barboza , qemu-devel@nongnu.org, Amit Machhiwal Subject: [PATCH] spapr: nested: Add Power11 capability support for Nested PAPR guests in TCG L0 Date: Mon, 28 Oct 2024 14:45:36 +0530 Message-ID: <20241028091536.600913-1-amachhiw@linux.ibm.com> X-Mailer: git-send-email 2.47.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: uvwQBfUsbYy0kL3D8VjfUXwAja-5zmoa X-Proofpoint-GUID: _8ThbooamAo6pPICOhcILlK7lS9UIjlL X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1051,Hydra:6.0.680,FMLib:17.12.62.30 definitions=2024-10-15_01,2024-10-11_01,2024-09-30_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 adultscore=0 bulkscore=0 mlxlogscore=999 clxscore=1015 priorityscore=1501 suspectscore=0 lowpriorityscore=0 mlxscore=0 impostorscore=0 malwarescore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2410280073 Received-SPF: pass client-ip=148.163.156.1; envelope-from=amachhiw@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org The Power11 architected and raw mode support in Linux was merged via [1] and the corresponding support in QEMU is waiting to be added by [2] which in V6 currently. Add the Power11 capabilities and the required handling in TCG L0 implementation of the "Nested PAPR API". Note: This patch is based on [2]. [1] https://lore.kernel.org/all/20240221044623.1598642-1-mpe@ellerman.id.au/ [2] https://lore.kernel.org/all/20240731055022.696051-1-adityag@linux.ibm.com/ Signed-off-by: Amit Machhiwal --- hw/ppc/spapr_nested.c | 12 +++++++++++- include/hw/ppc/spapr_nested.h | 5 ++++- 2 files changed, 15 insertions(+), 2 deletions(-) diff --git a/hw/ppc/spapr_nested.c b/hw/ppc/spapr_nested.c index c02785756c1e..066d40e3c1b7 100644 --- a/hw/ppc/spapr_nested.c +++ b/hw/ppc/spapr_nested.c @@ -771,6 +771,7 @@ static void copy_logical_pvr(void *a, void *b, bool set) if (*pvr_logical_ptr) { switch (*pvr_logical_ptr) { + case CPU_POWERPC_LOGICAL_3_10_P11: case CPU_POWERPC_LOGICAL_3_10: pcr = PCR_COMPAT_3_10 | PCR_COMPAT_3_00; break; @@ -1184,6 +1185,12 @@ static target_ulong h_guest_get_capabilities(PowerPCCPU *cpu, return H_PARAMETER; } + /* P11 capabilities */ + if (ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_3_10_P11, 0, + spapr->max_compat_pvr)) { + env->gpr[4] |= H_GUEST_CAPABILITIES_P11_MODE; + } + /* P10 capabilities */ if (ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_3_10, 0, spapr->max_compat_pvr)) { @@ -1226,7 +1233,10 @@ static target_ulong h_guest_set_capabilities(PowerPCCPU *cpu, env->gpr[4] = 1; /* set R5 to the first supported Power Processor Mode */ - if (ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_3_10, 0, + if (ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_3_10_P11, 0, + spapr->max_compat_pvr)) { + env->gpr[5] = H_GUEST_CAP_P11_MODE_BMAP; + } else if (ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_3_10, 0, spapr->max_compat_pvr)) { env->gpr[5] = H_GUEST_CAP_P10_MODE_BMAP; } else if (ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_3_00, 0, diff --git a/include/hw/ppc/spapr_nested.h b/include/hw/ppc/spapr_nested.h index 93ef14adcc5e..24531c3fd2e9 100644 --- a/include/hw/ppc/spapr_nested.h +++ b/include/hw/ppc/spapr_nested.h @@ -210,11 +210,14 @@ typedef struct SpaprMachineStateNestedGuest { #define H_GUEST_CAPABILITIES_COPY_MEM 0x8000000000000000 #define H_GUEST_CAPABILITIES_P9_MODE 0x4000000000000000 #define H_GUEST_CAPABILITIES_P10_MODE 0x2000000000000000 -#define H_GUEST_CAP_VALID_MASK (H_GUEST_CAPABILITIES_P10_MODE | \ +#define H_GUEST_CAPABILITIES_P11_MODE 0x1000000000000000 +#define H_GUEST_CAP_VALID_MASK (H_GUEST_CAPABILITIES_P11_MODE | \ + H_GUEST_CAPABILITIES_P10_MODE | \ H_GUEST_CAPABILITIES_P9_MODE) #define H_GUEST_CAP_COPY_MEM_BMAP 0 #define H_GUEST_CAP_P9_MODE_BMAP 1 #define H_GUEST_CAP_P10_MODE_BMAP 2 +#define H_GUEST_CAP_P11_MODE_BMAP 3 #define PAPR_NESTED_GUEST_MAX 4096 #define H_GUEST_DELETE_ALL_FLAG 0x8000000000000000ULL #define PAPR_NESTED_GUEST_VCPU_MAX 2048