From patchwork Thu Oct 24 19:22:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Thompson X-Patchwork-Id: 2001909 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ubuntu.com (client-ip=185.125.189.65; helo=lists.ubuntu.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=patchwork.ozlabs.org) Received: from lists.ubuntu.com (lists.ubuntu.com [185.125.189.65]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4XZG5f0nNNz1xx6 for ; Fri, 25 Oct 2024 06:22:46 +1100 (AEDT) Received: from localhost ([127.0.0.1] helo=lists.ubuntu.com) by lists.ubuntu.com with esmtp (Exim 4.86_2) (envelope-from ) id 1t43Pq-00056S-RI; Thu, 24 Oct 2024 19:22:38 +0000 Received: from mail-co1nam11on2062.outbound.protection.outlook.com ([40.107.220.62] helo=NAM11-CO1-obe.outbound.protection.outlook.com) by lists.ubuntu.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1t43Pp-00055J-Ks for kernel-team@lists.ubuntu.com; Thu, 24 Oct 2024 19:22:38 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=IC3oYqvHp5Dkz8AsbVGW6xyqUhFXCdvWVNx8dAXohyRJX3WVAdsoaVplOFqweCcufw2NzmmZLBEECWGzvPckduKxF9DzUEXaFwqRH0AhQcHc73VrrjwP1UFXxOkuSpt0QZfNhO9iFmNcU5FJOaeVdjLzoDOfszEXhfRTuAlX8Ua9gvucmQ+Ki/G7IXPvn7G0lQgjJtkKgfevlYGl0V5XiBzvTXfjyrF7GyXxUYqw4HIl+ke0i0Xu3HrFz2GdOQlObwgLF/ZNi2YBnokTrLpRyO/HIe4muYAyiqa+TrZeli2fiyDsTwGKU1OIDkyriohjcNgHhY42Q92moCXAVOdVNA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=Vtfc5lwU1rzawKB43zxVtTBS6onHS79HvIkttsUcM30=; b=DfM+f3WZfnNjGWruYlW2DiRdoVv/ch9T5aeH04pqCR0u9AKbg7ygyTXW7ugsXA7TLA14j0LLWoO901JxRJAwVLcNU8Prt/tupebNA0x3h5RqRpdnOqchMBuoSHOzDrc4pJ++WP9R6HQ39FMciQro9ke63CzO0p36kLyBFVPmT/e57KW3bsNFD7UNe+8UTPnh7dtPkCSI+P+VyiC7tbcDzJ9BZvo1Q4aUT4rj14G6sOtI44nsRgZCTJ08YxdUtca4DwWPrE38Avg1AvYSM0jqiJBIwhJxH0029PCZhX+kGCuc1l1AVimqvUX/5+B4MT53c9qw8+atqYtWP2O1pXDaLg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.118.233) smtp.rcpttodomain=lists.ubuntu.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) Received: from CH0PR03CA0337.namprd03.prod.outlook.com (2603:10b6:610:11a::27) by SN7PR12MB7108.namprd12.prod.outlook.com (2603:10b6:806:2a3::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8069.28; Thu, 24 Oct 2024 19:22:31 +0000 Received: from CH1PEPF0000AD82.namprd04.prod.outlook.com (2603:10b6:610:11a:cafe::b8) by CH0PR03CA0337.outlook.office365.com (2603:10b6:610:11a::27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.19 via Frontend Transport; Thu, 24 Oct 2024 19:22:31 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.118.233) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.118.233 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.118.233; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.118.233) by CH1PEPF0000AD82.mail.protection.outlook.com (10.167.244.91) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.14 via Frontend Transport; Thu, 24 Oct 2024 19:22:31 +0000 Received: from drhqmail201.nvidia.com (10.126.190.180) by mail.nvidia.com (10.127.129.6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Thu, 24 Oct 2024 12:22:24 -0700 Received: from drhqmail201.nvidia.com (10.126.190.180) by drhqmail201.nvidia.com (10.126.190.180) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Thu, 24 Oct 2024 12:22:24 -0700 Received: from vdi.nvidia.com (10.127.8.14) by mail.nvidia.com (10.126.190.180) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Thu, 24 Oct 2024 12:22:23 -0700 From: David Thompson To: , Subject: [SRU][J:linux-bluefield][PATCH v2 1/6] Revert "UBUNTU: SAUCE: bluefield-edac: Fix potential integer overflow" Date: Thu, 24 Oct 2024 15:22:17 -0400 Message-ID: X-Mailer: git-send-email 2.30.1 In-Reply-To: References: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000AD82:EE_|SN7PR12MB7108:EE_ X-MS-Office365-Filtering-Correlation-Id: 9ff87bd8-4989-4183-b6d3-08dcf46134f1 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|1800799024|82310400026|36860700013|376014; X-Microsoft-Antispam-Message-Info: aDxeP5ygH3YiVshY3LSbM2daqfmVTTTBilcgpLpfRDar4jlK5DX+7ECB2hhaD/xJ+rHEhToac4uYsa2angWPcZweGk6P9qeEvH4bLg3BYcm3VQzy+qynzlBc99xQX8mtvKh8Swb0SLEnEkhJatvpykMyeDuVXWrL5GW8IG3g1lyu1wZMFlgGCJzYQB60WUluAKFp5QaHHtn08JokV2P7oEDnrOR5y0ji21c0bOW+v62qnfWByXYS3XgKVQl7XVs/pXL3fistkpg68NtqIamkjnnxdZSfk7OQaZHH3qDtd5Av5dN0Q2azsTSIB9yy1U0rn2E34dy52fbJis1PndbbXvKoosgHFJUgRlaVl7kJvAPJpcxpqSTvxegKNJ7PV1iO+ZagKZDhAaM6HQ0bTFZHGLjeOEqrS7LW+56o55HidFD4P1tR0UDAc75n9Oz2XfUe8is6wdidaXM7QIPVNy5kcTP/57RCCgogcnsPRz1To8EIPfEqeg17GvovS1RvF6N/2WquJjq2nM5JXeGPMNPMC2QweWs5p7MfJmzHzpe/Vu9AAYZ8Ou9PPb05YAJLv67rDMWnRbxiSwFEOvkzSZHmsrubkurDYlKeA3aWRPIwhRu1oY2ceMx/j2dcvJTlfGD7bRXt8ZN77pw815KvfSLmOLcff2jX5mxPu51FhJk5KDcb9GXCD7TSjjdM/lBKlNLK40n0aufmyj6thRWLXZEnI8x0fT5/i7AU5Jxmd1pInEau3ZvMFEfxKR9wNXcs4Weq8693+0iGlewRoL9cVddguv0HN2+QxU5wB2gtKmKumcdWAVonmDCD7vNNM6qzbs8/DScEIxx6nsiX37VNemfLrHo9N2Cbp+pLNrBNkIeVVhHSuMLdUyxrcb7Aa5sTRb20jNKNmj/tp8mxc6gGYVjx7T5ca4nGGciGh2Xm4esq1Thr5FhOtXeYGnYjd99BFfBRL7kzWtifgyGAOEXtXnt7G4SNMt9sbMgRpb7kIsE5WN5G2kxoqiVkU5Dnn6AcxDzKLBwzuwGAZceHus4uD76ZZ4ZIivaXz3bwkolsFESSMoY6chR+mnTy6hIdKlPemYkZA5TIAbLsVLF3QEDYzZciqy3Ssqn/mMqFVyaJh+/qXq+aaj6eheZ2N8zgUJ6jg34YaajRxsRtCu4TPmlTfjZSWsDaVkO8ESY1IB8wRE1EoLhe6fKLnxZjVcdDgq2nsStJwjhfu2j6vlF0o0pcHaGIunElYOC3IHHMZmsdwz1IfWN74SW9qZJdQv1vdYMyVqQa9UkFnlPQ/fiNQ7LL87O3l8tmtdmybXtk7OGhQPdcxxNsKC849YfU0AOwaY2q7znSnSafPsUYheGTsIUBxvqbEirDQYHt7P0F5oQv0PRI0WQ6LIXip+JUDwqKaDhFtefLQkJggALwdppWu1h61cIjUQ== X-Forefront-Antispam-Report: CIP:216.228.118.233; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc7edge2.nvidia.com; CAT:NONE; SFS:(13230040)(1800799024)(82310400026)(36860700013)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Oct 2024 19:22:31.5622 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9ff87bd8-4989-4183-b6d3-08dcf46134f1 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.118.233]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD82.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB7108 Received-SPF: softfail client-ip=40.107.220.62; envelope-from=davthompson@nvidia.com; helo=NAM11-CO1-obe.outbound.protection.outlook.com X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: shravankr@nvidia.com Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" BugLink: https://bugs.launchpad.net/bugs/2085561 This reverts commit 05bf8afe03a0a04ab546e5d056695943732a0ea9. Signed-off-by: David Thompson --- drivers/edac/bluefield_edac.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/edac/bluefield_edac.c b/drivers/edac/bluefield_edac.c index 82415e6fe1d8..c21eb015f2d1 100644 --- a/drivers/edac/bluefield_edac.c +++ b/drivers/edac/bluefield_edac.c @@ -291,7 +291,7 @@ static void bluefield_edac_check(struct mem_ctl_info *mci) static void bluefield_edac_init_dimms(struct mem_ctl_info *mci) { struct bluefield_edac_priv *priv = mci->pvt_info; - u64 mem_ctrl_idx = mci->mc_idx; + int mem_ctrl_idx = mci->mc_idx; struct dimm_info *dimm; u64 smc_info, smc_arg; int is_empty = 1, i; From patchwork Thu Oct 24 19:22:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Thompson X-Patchwork-Id: 2001914 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ubuntu.com (client-ip=185.125.189.65; helo=lists.ubuntu.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=patchwork.ozlabs.org) Received: from lists.ubuntu.com (lists.ubuntu.com [185.125.189.65]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4XZG5r00YCz1xw8 for ; Fri, 25 Oct 2024 06:22:55 +1100 (AEDT) Received: from localhost ([127.0.0.1] helo=lists.ubuntu.com) by lists.ubuntu.com with esmtp (Exim 4.86_2) (envelope-from ) id 1t43Q0-0005NA-JF; Thu, 24 Oct 2024 19:22:48 +0000 Received: from mail-bn8nam11on2057.outbound.protection.outlook.com ([40.107.236.57] helo=NAM11-BN8-obe.outbound.protection.outlook.com) by lists.ubuntu.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1t43Pv-0005An-ME for kernel-team@lists.ubuntu.com; Thu, 24 Oct 2024 19:22:43 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=GextVgRtl/DVRyMA8y8IBid0GXznq7qNVs79Km4ZOg8TYE/B6KE6CGZ5u7q60NB3xl48ylmKaAvyRGLJt1EC0CbnrpjsKchxP5vCgYDPDDfZohfDetiFoiWKblSzsVU25/reynfRwilQBED71xSzpENnU0p5jdk4zzWTGtvrXsktVaglklI9UNqN2YnO57qraA/1e0e2TiL8er3g60zpWFB9V/+yXpZYI9eNuz/9CIfoFCWn3PjykU+uAyXAQBTqRe7CMf5WB8qr688GIPl/zrhsniMrI3JDQ/JH+lYWlo/GNoT2EzONQaoYUUHuqxuKWPrbm4xJqg9MMZJKK2LnfQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=Ma1G+CtNxtI8UnrJduQYrhfZDVTvmGCoBmTSrlCWWGE=; b=JMLWn7lpMckzPUpJjKYKYHr9b+dWLjt0ezErxVgHMlY62MGPpXw+fCW0egjrswnZEUAoiRbITPR9pM81KNAkVrLLBg639o7tJRzhk4ITdm7PIcmlO0K+p4TcERSHy0fAvpppO1/Ox6cbSW7jC480B6VE7xCq0gHvqsms2j/4JQH/Iby5WYtc5srwGf3W1YkYh2E/BPFni0UUOQukh+PgucImAtiqXYXcMIlXB3Wco4qunLFOFKgQ07p8o6n0TPn+eO5NFgVbVEzZT0YkqaAnoqNoA46UZvJMvmjpivGA6TjpoKQaW3oZsqDRsQd/FVckKuzQ1mOiL7zfhfh22xn3cQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.118.233) smtp.rcpttodomain=lists.ubuntu.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) Received: from CH0PR03CA0347.namprd03.prod.outlook.com (2603:10b6:610:11a::26) by SA1PR12MB6726.namprd12.prod.outlook.com (2603:10b6:806:255::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.21; Thu, 24 Oct 2024 19:22:33 +0000 Received: from CH1PEPF0000AD82.namprd04.prod.outlook.com (2603:10b6:610:11a:cafe::d7) by CH0PR03CA0347.outlook.office365.com (2603:10b6:610:11a::26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.18 via Frontend Transport; Thu, 24 Oct 2024 19:22:32 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.118.233) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.118.233 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.118.233; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.118.233) by CH1PEPF0000AD82.mail.protection.outlook.com (10.167.244.91) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.14 via Frontend Transport; Thu, 24 Oct 2024 19:22:32 +0000 Received: from drhqmail202.nvidia.com (10.126.190.181) by mail.nvidia.com (10.127.129.6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Thu, 24 Oct 2024 12:22:25 -0700 Received: from drhqmail201.nvidia.com (10.126.190.180) by drhqmail202.nvidia.com (10.126.190.181) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Thu, 24 Oct 2024 12:22:24 -0700 Received: from vdi.nvidia.com (10.127.8.14) by mail.nvidia.com (10.126.190.180) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Thu, 24 Oct 2024 12:22:24 -0700 From: David Thompson To: , Subject: [SRU][J:linux-bluefield][PATCH v2 2/6] Revert "UBUNTU: SAUCE: bluefield_edac: Update license and copyright info" Date: Thu, 24 Oct 2024 15:22:18 -0400 Message-ID: <0adf1a0f6d75f51099cbc5576024da100f970ad3.1729797209.git.davthompson@nvidia.com> X-Mailer: git-send-email 2.30.1 In-Reply-To: References: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000AD82:EE_|SA1PR12MB6726:EE_ X-MS-Office365-Filtering-Correlation-Id: 4054b36c-df34-4206-fdd2-08dcf461359a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|1800799024|82310400026|36860700013|376014; X-Microsoft-Antispam-Message-Info: IR6/elAGn7U4DIgI1gRB0zF8FWuRVRRDDn1qOPVgJgbxOeimagkVOOwWrBXS200K2IeKZjMUHhV638yYGeNiXZgBZntvHWK/GI1qumBUMpioiJcBalG0h0nJganG7+FelMltExKkqKDpXhGuqsCYl5g9BThiyugvvrs2ACvDTUff1nDxVKao7K3fu4iURY8BLtwvKTkkMxwvP+Fj4LWRxledHGSDPUbJ8FghsvePu1FKboxxIxiZCLsILDdTJXqN+91wugbtg0ni99aLdB7zLth42BxQOU9DQ6/yDzwCj0z99aCil3ZqS52ZTBEOH1tw9OmlJ3N3/zONO6iAt3cY5N7F/atNk3lQROqij70qWYFju2PTN/pWsuyk0dCrtMvH6tsgpWSxSaCalaPrdeTl+mXWUPWj5vFaiBoI9Tm99gYldpiuszmCpQMw1roQBGSC2gAynuxItjXV5rztTfWnLHpHRMvbkOr7cXhBECVRqfQ47ac32ziiLL9exV6+Fa1u0ASa2yJfVVBrtks5VZ42Rb/njYWGDHPeD3JMt7kVkPR+AE68LbFr1jEaYVTIYGlx16nOUsDBjlTi9gKp+91nBUw67SxtWu9POnrg2RI83MUUTX28XpvYVDbYAobq+PjBVJr8YRAm0kPgdhS9YDcIcVtvoWZnvaEWybHzSauc7ILR4zOghlh8hITL+I+viUgAIU2bZURpo39OM2Rew/JtolvRU1wSzUUTF4Jxmw3r92CRwzL7oDA6xIDWtqvi8YmD1TruDJc7i496ZUtVAdgxVJ4c3TIietaNd70/SkYr73C0Tiqza5NT7CUYV3mxxJPnmCSJZUE8JvOy5EfEzoH9RuVXnqvhC4yP0O6LVll7DpvrHiH8Nqs26+6NLzBgN6m+LIM23ojQLtBWAyGCu8aJPPe0yfbHLkDs9BKyRMeFP05iU3abbIEkSZLXstyqHMXIutNKkgJrvzX/LOh4FPWCjCNfgfquO4/4nGTlINMA8TrLX8s4mPcHiTvWYE5VY0iWZG3gqyJdp3hbWV3ELHdUMC4PMbGKLZMvWHaQfKAIo+qkM/jgwlAtX/2PBZuGL9k3lPgnEaiobiLkHZ7AKWEDve5QydKnWYjbtE3AwP10Z4Vyxmr1mcDwPj18mGboVUdIgOEWW4bhlwWC9ehA1oCjPU7cNs3x37w34Xs6AEOnrwB+X/Hy9F3W0plLHy0wghKPDzHpCFdjQ7ExHhywlVq2TjsI4pWsJFEA2GPZ04xJ5ZfKDkbgt/fFxhvkx0+zDYShkNsiwoxN1EJtk3ICVHEb834DjBJRrh6DwA1ngPge8UI+ZPyleu4zewY/Vb3PT4SY8y5NY5vnXTxKcleoAF9W9nq4+REMlZay3gDiVSRaF68dxNHli3yqiY2gwe67GwzK6LH2dldHFIexRArnbWaIfw== X-Forefront-Antispam-Report: CIP:216.228.118.233; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc7edge2.nvidia.com; CAT:NONE; SFS:(13230040)(1800799024)(82310400026)(36860700013)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Oct 2024 19:22:32.6560 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4054b36c-df34-4206-fdd2-08dcf461359a X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.118.233]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD82.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB6726 Received-SPF: softfail client-ip=40.107.236.57; envelope-from=davthompson@nvidia.com; helo=NAM11-BN8-obe.outbound.protection.outlook.com X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: shravankr@nvidia.com Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" BugLink: https://bugs.launchpad.net/bugs/2085561 This reverts commit 19572d6d2ef59e606978e0e3ee5bb86fa523dd59. Signed-off-by: David Thompson --- drivers/edac/bluefield_edac.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/edac/bluefield_edac.c b/drivers/edac/bluefield_edac.c index c21eb015f2d1..8e1127a5681c 100644 --- a/drivers/edac/bluefield_edac.c +++ b/drivers/edac/bluefield_edac.c @@ -1,8 +1,8 @@ -// SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause +// SPDX-License-Identifier: GPL-2.0 /* * Bluefield-specific EDAC driver. * - * Copyright (c) 2022 NVIDIA Corporation. + * Copyright (c) 2019 Mellanox Technologies. */ #include @@ -492,5 +492,5 @@ static struct platform_driver bluefield_edac_mc_driver = { module_platform_driver(bluefield_edac_mc_driver); MODULE_DESCRIPTION("Mellanox BlueField memory edac driver"); -MODULE_AUTHOR("Shravan Kumar Ramani "); -MODULE_LICENSE("Dual BSD/GPL"); +MODULE_AUTHOR("Mellanox Technologies"); +MODULE_LICENSE("GPL v2"); From patchwork Thu Oct 24 19:22:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Thompson X-Patchwork-Id: 2001911 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ubuntu.com (client-ip=185.125.189.65; helo=lists.ubuntu.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=patchwork.ozlabs.org) Received: from lists.ubuntu.com (lists.ubuntu.com [185.125.189.65]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4XZG5l2pRlz1xw8 for ; Fri, 25 Oct 2024 06:22:51 +1100 (AEDT) Received: from localhost ([127.0.0.1] helo=lists.ubuntu.com) by lists.ubuntu.com with esmtp (Exim 4.86_2) (envelope-from ) id 1t43Pv-0005BS-He; Thu, 24 Oct 2024 19:22:43 +0000 Received: from mail-dm6nam11on2084.outbound.protection.outlook.com ([40.107.223.84] helo=NAM11-DM6-obe.outbound.protection.outlook.com) by lists.ubuntu.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1t43Ps-00057A-Pj for kernel-team@lists.ubuntu.com; Thu, 24 Oct 2024 19:22:41 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=bbj3r/T/pMBSLckhWRC4jVHyloJRmgLUqJP+3AdUNOU1tarFegKCHL2XxJBNVLYtHFkG4fEepUd+8xZfPwRqOXbB18wh10BlhHVpO83odtt3ppvu40EowkCwi5eel++AV8FL/y2Plo/Li49LwTERfO2G4KYRz2yvIxpcUyb3ET7F2wyhbOCTwDsdvVwTLrXyigND2be7NRADCnftP0L0UXcvp8kqybbmNHXUUY/weUf3tCvEoSdGUGRYfZ8QXXbhjGRRW7dCo8pq6VyVYmeNYEdzGzaAWlnhW1ju8YpXPVFV8nawFgK/aGkzWGMm1D36DK9z4fq3gb9N+QT6SipFpA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=D5UXCTBJDQzS4KlhTRmy8wLSZarrBe5Ynf4Ebuk6prU=; b=PRi2RrdXgTIhFRM+noeRubBfAIeRZ4yV1G5t9O/EpSmy4g3lS+mI5wX9n7slpYkAoCM3g5woscdASoHh0WWKLNC6EyfAHqDcGjCbR5VjrnUVkHypCGtjtjv6RtC9wwB12aYyghv411bvP4/aZzgJFORDFd3yl3uEaTTOw6A424lLAsgGkIEKImUu2Do+xtUoKMIfsEKoFQgBmI46OMFLIGtAMDIfKNN/RP6VQ0VulJMPh6KMlh720qZJnp4OaEUDGn+bvQ1q3SCjXryKANY5GaE8hLQY9a5Ig5psPMAugRzy+mHX0n8hW1fREtEDkLhBxFdJtWSPA/zAcKmYm26szg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.118.232) smtp.rcpttodomain=lists.ubuntu.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) Received: from PH7P221CA0051.NAMP221.PROD.OUTLOOK.COM (2603:10b6:510:33c::21) by CH3PR12MB8545.namprd12.prod.outlook.com (2603:10b6:610:163::8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.17; Thu, 24 Oct 2024 19:22:35 +0000 Received: from CY4PEPF0000E9D9.namprd05.prod.outlook.com (2603:10b6:510:33c:cafe::76) by PH7P221CA0051.outlook.office365.com (2603:10b6:510:33c::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.18 via Frontend Transport; Thu, 24 Oct 2024 19:22:35 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.118.232) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.118.232 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.118.232; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.118.232) by CY4PEPF0000E9D9.mail.protection.outlook.com (10.167.241.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.14 via Frontend Transport; Thu, 24 Oct 2024 19:22:34 +0000 Received: from drhqmail202.nvidia.com (10.126.190.181) by mail.nvidia.com (10.127.129.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Thu, 24 Oct 2024 12:22:26 -0700 Received: from drhqmail201.nvidia.com (10.126.190.180) by drhqmail202.nvidia.com (10.126.190.181) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Thu, 24 Oct 2024 12:22:25 -0700 Received: from vdi.nvidia.com (10.127.8.14) by mail.nvidia.com (10.126.190.180) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Thu, 24 Oct 2024 12:22:25 -0700 From: David Thompson To: , Subject: [SRU][J:linux-bluefield][PATCH v2 3/6] Revert "UBUNTU: SAUCE: bluefield_edac: Add SMC support" Date: Thu, 24 Oct 2024 15:22:19 -0400 Message-ID: <2a6f5db7590973aadcd18cc2dcad854451f179a4.1729797209.git.davthompson@nvidia.com> X-Mailer: git-send-email 2.30.1 In-Reply-To: References: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000E9D9:EE_|CH3PR12MB8545:EE_ X-MS-Office365-Filtering-Correlation-Id: dd44c8d0-8c82-41e8-3293-08dcf46136be X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|1800799024|82310400026|376014|36860700013; X-Microsoft-Antispam-Message-Info: kKPkDEa1bV1t8d0/cWcEh4i2xJe4S91bClQrzWuw8hQKn9NRElUzWjoTfMNVFj5FZrNKMtQvLxqJkMcaBgnk6bAFwms8dH6JH8Y0N93KpebS9EIIh+8D4IWfntLwwRyrn1DeJkIUPEt79/ZS2ATVbeTtgBQ8st3cvvmEqjB2DRX05v7onRp8lZTI1Loq6oD9mxcfgBhaUgTmmHEwoBXL5T9LTxg0SG0KzqHOAErFoGHCeTVSN0RM8r+kQqtg5p2F4cfi7abM2X4W1Cyt9wd/v1pBtaR/GN5hiooqCadCLCZdMmEJxxTkdBy4KMrw+ZIT2MLda1CmV2F5u7/JjST3XQV1svw88dII67EtmJw8+L/yIepQjdE6isawLW7n/fTp+hxsns0wN//zRg5B0A4vC2EzIPyI9pWMtgIDbMH7H9Qm4TqC/lENaYjYKlfgU28t+ghFFuLY4KqpcAsVkdl+qBZqe5v9edOwAleiKqfGJb9PKzLCwiBub3DMGHBfOPjDE5wZ4T6lHXAElFHCr/2CFPd1ffqDu8qpzVCrM3KuKtwfw0zIUgi19qk/PAplmnYpVTSXuvXdoZdHeCYUZxAu5RTmH2me/adPmYmojx9RLg9sh1B4/K8BdriZvkiInv23uZi1bloj0uLwrhhZnHSimZEfZNPsfkwHErhFcX2yXcgSvyot10ZDAUYvC5bZa8mF6uh7/wfqY2ecEq+ixtKwkuR1z+/7bxPYDQfzXeXA9F/gG+lJXEOzpT+VjCZ7KsnPe5lf0zPpVMa2Q5zM+R2kdJjdHU9KBXYMGpOb8LKiJWszMfLF+60bVdyoRnAqoLPw9ZKkXMPv/VOoH0S16vlXl0Hlevu1kycrIUDVEzS1Pi3+TUicgK3SQkKRZOmaE8r6ZZVY4Ii6CAL5qDku7xb5gCIFPbgqRwiWdwA3pfwrUJRvb2aUsRq9AOcj52sgVUslKUnEuAdeXzzInWRrWSG0wvYo2sewL0uf3aw/8HNsa3TeT5sx1klz7PmhpXb5psFU3sAxWB2DVgXmVo+m1hj29IRyhbX3dzV1r9ipiO0HhJZPiPNOYYviYX3J9c4JYbrIv8H/Mta8akISSwy//tyH5XBULiboTbF5K4YXoXo37eKBAKL+o9AkoHBR1QWvAs2KcaE94FuudvoNWQBEuvmUyxyc9VDA9tzzgincBzd491EvXKcQJLxwqWEDgG2F+Y55zv3OuPdHHKigdrzcr1kiw87C27ZS+zFmh8l/VGzJ6wFr3UvjO77WKFFW1zkuf2oWkjx8y+pKt/UQ3KZzKmIAiNcKGuARXYTrZPAXEXSorZM35gv0QAz37w6NIfsZH5Moj9yj7ShfbrWQ1OhaZQF0msdtEGn4sO2wwmHd0dsTKVj8VzCt4xMuZtQ3T/hA+i21ck8pOFxJylGkaCpSDL0Klg== X-Forefront-Antispam-Report: CIP:216.228.118.232; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc7edge1.nvidia.com; CAT:NONE; SFS:(13230040)(1800799024)(82310400026)(376014)(36860700013); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Oct 2024 19:22:34.6112 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: dd44c8d0-8c82-41e8-3293-08dcf46136be X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.118.232]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9D9.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB8545 Received-SPF: softfail client-ip=40.107.223.84; envelope-from=davthompson@nvidia.com; helo=NAM11-DM6-obe.outbound.protection.outlook.com X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: shravankr@nvidia.com Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" BugLink: https://bugs.launchpad.net/bugs/2085561 This reverts commit 030e2a51ac6050a5b02ec75d4a84c75235e5e1d9. Signed-off-by: David Thompson --- drivers/edac/bluefield_edac.c | 168 +++------------------------------- 1 file changed, 14 insertions(+), 154 deletions(-) diff --git a/drivers/edac/bluefield_edac.c b/drivers/edac/bluefield_edac.c index 8e1127a5681c..e4736eb37bfb 100644 --- a/drivers/edac/bluefield_edac.c +++ b/drivers/edac/bluefield_edac.c @@ -12,7 +12,6 @@ #include #include #include -#include #include "edac_module.h" @@ -48,18 +47,6 @@ #define MLXBF_EDAC_MAX_DIMM_PER_MC 2 #define MLXBF_EDAC_ERROR_GRAIN 8 -#define MLNX_WRITE_REG_32 (0x82000009) -#define MLNX_READ_REG_32 (0x8200000A) -#define MLNX_WRITE_REG_64 (0x8200000B) -#define MLNX_READ_REG_64 (0x8200000C) -#define MLNX_SIP_SVC_UID (0x8200ff01) -#define MLNX_SIP_SVC_VERSION (0x8200ff03) - -#define SMCCC_ACCESS_VIOLATION (-4) - -#define MLNX_EDAC_SVC_REQ_MAJOR 0 -#define MLNX_EDAC_SVC_MIN_MINOR 3 - /* * Request MLNX_SIP_GET_DIMM_INFO * @@ -85,12 +72,9 @@ #define MLXBF_DIMM_INFO__PACKAGE_X GENMASK_ULL(31, 24) struct bluefield_edac_priv { - struct device *dev; int dimm_ranks[MLXBF_EDAC_MAX_DIMM_PER_MC]; void __iomem *emi_base; int dimm_per_mc; - bool svc_sreg_support; - uint32_t sreg_tbl_edac; }; static u64 smc_call1(u64 smc_op, u64 smc_arg) @@ -102,73 +86,6 @@ static u64 smc_call1(u64 smc_op, u64 smc_arg) return res.a0; } -static int secure_readl(void __iomem *addr, uint32_t *result, uint32_t sreg_tbl) -{ - struct arm_smccc_res res; - int status; - - arm_smccc_smc(MLNX_READ_REG_32, sreg_tbl, (uintptr_t) addr, - 0, 0, 0, 0, 0, &res); - - status = res.a0; - - switch (status) { - case SMCCC_RET_NOT_SUPPORTED: - case SMCCC_ACCESS_VIOLATION: - return -1; - default: - *result = (uint32_t)res.a1; - return 0; - } - -} - -static int secure_writel(void __iomem *addr, uint32_t data, uint32_t sreg_tbl) -{ - struct arm_smccc_res res; - int status; - - arm_smccc_smc(MLNX_WRITE_REG_32, sreg_tbl, data, (uintptr_t) addr, - 0, 0, 0, 0, &res); - - status = res.a0; - - switch (status) { - case SMCCC_RET_NOT_SUPPORTED: - case SMCCC_ACCESS_VIOLATION: - return -1; - default: - return 0; - } - -} - -static int edac_readl(void __iomem *addr, uint32_t *result, - bool sreg_support, uint32_t sreg_tbl) -{ - int err = 0; - - if (sreg_support) - err = secure_readl(addr, result, sreg_tbl); - else - *result = readl(addr); - - return err; -} - -static int edac_writel(void __iomem *addr, uint32_t data, - bool sreg_support, uint32_t sreg_tbl) -{ - int err = 0; - - if (sreg_support) - err = secure_writel(addr, data, sreg_tbl); - else - writel(data, addr); - - return err; -} - /* * Gather the ECC information from the External Memory Interface registers * and report it to the edac handler. @@ -182,7 +99,7 @@ static void bluefield_gather_report_ecc(struct mem_ctl_info *mci, u32 ecc_latch_select, dram_syndrom, serr, derr, syndrom; enum hw_event_mc_err_type ecc_type; u64 ecc_dimm_addr; - int ecc_dimm, err; + int ecc_dimm; ecc_type = is_single_ecc ? HW_EVENT_ERR_CORRECTED : HW_EVENT_ERR_UNCORRECTED; @@ -192,22 +109,14 @@ static void bluefield_gather_report_ecc(struct mem_ctl_info *mci, * registers with information about the last ECC error occurrence. */ ecc_latch_select = MLXBF_ECC_LATCH_SEL__START; - err = edac_writel(priv->emi_base + MLXBF_ECC_LATCH_SEL, - ecc_latch_select, priv->svc_sreg_support, - priv->sreg_tbl_edac); - if (err) - dev_err(priv->dev, "ECC latch select write failed.\n"); + writel(ecc_latch_select, priv->emi_base + MLXBF_ECC_LATCH_SEL); /* * Verify that the ECC reported info in the registers is of the * same type as the one asked to report. If not, just report the * error without the detailed information. */ - err = edac_readl(priv->emi_base + MLXBF_SYNDROM, &dram_syndrom, - priv->svc_sreg_support, priv->sreg_tbl_edac); - if (err) - dev_err(priv->dev, "DRAM syndrom read failed.\n"); - + dram_syndrom = readl(priv->emi_base + MLXBF_SYNDROM); serr = FIELD_GET(MLXBF_SYNDROM__SERR, dram_syndrom); derr = FIELD_GET(MLXBF_SYNDROM__DERR, dram_syndrom); syndrom = FIELD_GET(MLXBF_SYNDROM__SYN, dram_syndrom); @@ -218,24 +127,13 @@ static void bluefield_gather_report_ecc(struct mem_ctl_info *mci, return; } - err = edac_readl(priv->emi_base + MLXBF_ADD_INFO, &dram_additional_info, - priv->svc_sreg_support, priv->sreg_tbl_edac); - if (err) - dev_err(priv->dev, "DRAM additional info read failed.\n"); - + dram_additional_info = readl(priv->emi_base + MLXBF_ADD_INFO); err_prank = FIELD_GET(MLXBF_ADD_INFO__ERR_PRANK, dram_additional_info); ecc_dimm = (err_prank >= 2 && priv->dimm_ranks[0] <= 2) ? 1 : 0; - err = edac_readl(priv->emi_base + MLXBF_ERR_ADDR_0, &edea0, - priv->svc_sreg_support, priv->sreg_tbl_edac); - if (err) - dev_err(priv->dev, "Error addr 0 read failed.\n"); - - err = edac_readl(priv->emi_base + MLXBF_ERR_ADDR_1, &edea1, - priv->svc_sreg_support, priv->sreg_tbl_edac); - if (err) - dev_err(priv->dev, "Error addr 1 read failed.\n"); + edea0 = readl(priv->emi_base + MLXBF_ERR_ADDR_0); + edea1 = readl(priv->emi_base + MLXBF_ERR_ADDR_1); ecc_dimm_addr = ((u64)edea1 << 32) | edea0; @@ -249,7 +147,6 @@ static void bluefield_edac_check(struct mem_ctl_info *mci) { struct bluefield_edac_priv *priv = mci->pvt_info; u32 ecc_count, single_error_count, double_error_count, ecc_error = 0; - int err; /* * The memory controller might not be initialized by the firmware @@ -258,11 +155,7 @@ static void bluefield_edac_check(struct mem_ctl_info *mci) if (mci->edac_cap == EDAC_FLAG_NONE) return; - err = edac_readl(priv->emi_base + MLXBF_ECC_CNT, &ecc_count, - priv->svc_sreg_support, priv->sreg_tbl_edac); - if (err) - dev_err(priv->dev, "ECC count read failed.\n"); - + ecc_count = readl(priv->emi_base + MLXBF_ECC_CNT); single_error_count = FIELD_GET(MLXBF_ECC_CNT__SERR_CNT, ecc_count); double_error_count = FIELD_GET(MLXBF_ECC_CNT__DERR_CNT, ecc_count); @@ -279,12 +172,8 @@ static void bluefield_edac_check(struct mem_ctl_info *mci) } /* Write to clear reported errors. */ - if (ecc_count) { - err = edac_writel(priv->emi_base + MLXBF_ECC_ERR, ecc_error, - priv->svc_sreg_support, priv->sreg_tbl_edac); - if (err) - dev_err(priv->dev, "ECC Error write failed.\n"); - } + if (ecc_count) + writel(ecc_error, priv->emi_base + MLXBF_ECC_ERR); } /* Initialize the DIMMs information for the given memory controller. */ @@ -355,7 +244,6 @@ static int bluefield_edac_mc_probe(struct platform_device *pdev) struct bluefield_edac_priv *priv; struct device *dev = &pdev->dev; struct edac_mc_layer layers[1]; - struct arm_smccc_res res; struct mem_ctl_info *mci; struct resource *emi_res; unsigned int mc_idx, dimm_count; @@ -392,40 +280,12 @@ static int bluefield_edac_mc_probe(struct platform_device *pdev) priv = mci->pvt_info; - /* - * ACPI indicates whether we use SMCs to access registers or not. - * If sreg_tbl_perf is not present, just assume we're not using SMCs. - */ - if (device_property_read_u32(dev, - "sec_reg_block", &priv->sreg_tbl_edac)) { - priv->svc_sreg_support = false; - } else { - /* - * Check service version to see if we actually do support the - * needed SMCs. If we have the calls we need, mark support for - * them in the pmc struct. - */ - arm_smccc_smc(MLNX_SIP_SVC_VERSION, 0, 0, 0, 0, 0, 0, 0, &res); - if (res.a0 == MLNX_EDAC_SVC_REQ_MAJOR && - res.a1 >= MLNX_EDAC_SVC_MIN_MINOR) - priv->svc_sreg_support = true; - else { - dev_err(dev, "Required SMCs are not supported.\n"); - ret = -EINVAL; - goto err; - } - } - priv->dimm_per_mc = dimm_count; - if (!priv->svc_sreg_support) { - priv->emi_base = devm_ioremap_resource(dev, emi_res); - if (IS_ERR(priv->emi_base)) { - dev_err(dev, "failed to map EMI IO resource\n"); - ret = PTR_ERR(priv->emi_base); - goto err; - } - } else { - priv->emi_base = (void __iomem *) emi_res->start; + priv->emi_base = devm_ioremap_resource(dev, emi_res); + if (IS_ERR(priv->emi_base)) { + dev_err(dev, "failed to map EMI IO resource\n"); + ret = PTR_ERR(priv->emi_base); + goto err; } mci->pdev = dev; From patchwork Thu Oct 24 19:22:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: David Thompson X-Patchwork-Id: 2001910 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ubuntu.com (client-ip=185.125.189.65; helo=lists.ubuntu.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=patchwork.ozlabs.org) Received: from lists.ubuntu.com (lists.ubuntu.com [185.125.189.65]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4XZG5j36Y0z1xw8 for ; Fri, 25 Oct 2024 06:22:49 +1100 (AEDT) Received: from localhost ([127.0.0.1] helo=lists.ubuntu.com) by lists.ubuntu.com with esmtp (Exim 4.86_2) (envelope-from ) id 1t43Pu-00059g-7o; Thu, 24 Oct 2024 19:22:42 +0000 Received: from mail-mw2nam10on2074.outbound.protection.outlook.com ([40.107.94.74] helo=NAM10-MW2-obe.outbound.protection.outlook.com) by lists.ubuntu.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1t43Pr-00056M-Pt for kernel-team@lists.ubuntu.com; Thu, 24 Oct 2024 19:22:40 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=FGFJ5J5JvKRPQfC7E9jB2Wr7HYtkNLzaltIEfGCxYm2c21krkXqHveYc/nDZHqk+aDIbjZYQDwejHZvOIzP9WnppNOhhAaaFglDpIgOWA9a6OiEv4KbPv1xhBqSyshpktjvCxf3GUMrSzWx/YxwpTm481z3cfQWixdqcCBoXWLq4lyATj2XQTm/gziIIUNVgTVcq8TIgVn4UHLW/Dyen7PVvo05BgNuZWydo/noHwI7e3UVRZUjx3D2iDFBFd/UDRyncPCBDFikxHQVF7ldXl78i5YrJuAXY6pq6tftNFWAxhJEkvk8HIC/WMJzkLYOHTRNTChrSJRZSL7GpIfNx2Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=7s1VqdKC8/voDmh9dlkEcavaZHC6s7kOYudY9a/amEg=; b=t4iGk6JRBsALIXZnCTUhcWmXO8ENs6Kvi2lQRUbzSvbnNnmih2+lmZW3EeCqK1YL9DU0uI8KUHuTpQECHey8qh/3EVx7/THXRzPVj3q6pFAkMxvZUd9ur+RIUkAvoNaoaDbaqPodYFdzdqn7s56sR8T0ibQeO6WsbKAL3PmkfBcijpSrTLPcdf2l9jTDQIwcG89Xl9uSMVZBmrtw4IclUcz7X76S2eQYtqdTLu2NwUGBU57Sgz1n0+L2ZJXxHHqUd5wSKK9chpz0NyuNS+YXAG0GompZ556dn12PaVzIMoOaFH3Ex/mktnZ+fl6AaayMEQk3MMesGW8woHj3pgN8qg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.118.233) smtp.rcpttodomain=lists.ubuntu.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) Received: from CH2PR18CA0044.namprd18.prod.outlook.com (2603:10b6:610:55::24) by IA1PR12MB7567.namprd12.prod.outlook.com (2603:10b6:208:42d::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8069.28; Thu, 24 Oct 2024 19:22:34 +0000 Received: from CH1PEPF0000AD83.namprd04.prod.outlook.com (2603:10b6:610:55:cafe::82) by CH2PR18CA0044.outlook.office365.com (2603:10b6:610:55::24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.18 via Frontend Transport; Thu, 24 Oct 2024 19:22:34 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.118.233) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.118.233 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.118.233; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.118.233) by CH1PEPF0000AD83.mail.protection.outlook.com (10.167.244.85) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.14 via Frontend Transport; Thu, 24 Oct 2024 19:22:34 +0000 Received: from drhqmail201.nvidia.com (10.126.190.180) by mail.nvidia.com (10.127.129.6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Thu, 24 Oct 2024 12:22:26 -0700 Received: from drhqmail201.nvidia.com (10.126.190.180) by drhqmail201.nvidia.com (10.126.190.180) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Thu, 24 Oct 2024 12:22:26 -0700 Received: from vdi.nvidia.com (10.127.8.14) by mail.nvidia.com (10.126.190.180) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Thu, 24 Oct 2024 12:22:26 -0700 From: David Thompson To: , Subject: [SRU][J:linux-bluefield][PATCH v2 4/6] EDAC/bluefield: Convert to platform remove callback returning void Date: Thu, 24 Oct 2024 15:22:20 -0400 Message-ID: <830edc40fd88cd33228159ca2c4595168f98268f.1729797209.git.davthompson@nvidia.com> X-Mailer: git-send-email 2.30.1 In-Reply-To: References: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000AD83:EE_|IA1PR12MB7567:EE_ X-MS-Office365-Filtering-Correlation-Id: a390c1de-c4ae-4853-7608-08dcf4613698 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|376014|82310400026|36860700013|1800799024; X-Microsoft-Antispam-Message-Info: =?utf-8?q?WWt3hjNsY9IvDLPgkAD+RfUHWK45ulc?= =?utf-8?q?cFVQMuA+mUW90gOLEkiXbqOmDJuMTOCeOczmpUAtFHZD1AdoLhuUkZi5t5xXfMENj?= =?utf-8?q?6EVS5tuW18eVCsoezJ6y44HJLxiyis3Sqx2cMtscYd1f17PZLlwCmY7/tmBlkuYm4?= =?utf-8?q?+OrdwB8FL0iw+xy3K95OPtCdY5gphoiayK1rcA/gHXq5eAXr8JOa8vfcG09FzJLsW?= =?utf-8?q?WPGfT22i8PPEHYKb1fFnGG177ajx84cDrn97G5lt9msLH/23OhwaE5ismgZ6pI/Pf?= =?utf-8?q?fggnXCnIG7k7EUQmSDxeq7lfqm9eSLQ8qhqxlUPbZC7NsnUOIcYlKBg14U6L0reGE?= =?utf-8?q?z4ZWkF2oNiFyWvrN2HNFBkxrXVUDmdrWCWc50/vV7IhTcbVjb+zLS8zWI/7LJzUJB?= =?utf-8?q?3zzhJSaefMA2nTVGvlfYBBfCU1UaYZ5q0jEjsPInFOfC3MIIW5gmEGo5Cvv5u2ILG?= =?utf-8?q?5eowQ0xY+X/e9SVoVCAqfRVIFTbafNbunh+5Gzc+YZnKxuE55cOua8c0r5HkkUjKo?= =?utf-8?q?hz/54yD2wtihKy6kAXgIjv/wlT0WxGigjfB8jUiOz9PM2lJYEpUcc1pW0DCEAjdQy?= =?utf-8?q?wzChW18v8ChztWZ3MqMKGu7o7F6fTmHh9RHgIWzmnro+vdVgyN4TqAa8Q1RhOZ7KI?= =?utf-8?q?oRKFcKZvvkuM2slL+gphwerFkKFaFpoVcal8h5BF9iYZpK3B3UvstMDucw/kD+LZK?= =?utf-8?q?9bf1CN2AWwOlYo+8PqRoEYSR0Kdcn1N127j2fOb/YUmHsPApHAl5v4NIw7V0TwRTu?= =?utf-8?q?c7GwOhD8durO9C964bujPrc4jLcdgJlRV0lGnSLG24iPoea70F3zVeo+4tN2pXZ5F?= =?utf-8?q?nOJ6EJzWZulpu3hwSFukSCiz/PkPgDFCiQJ9YStuS3cEv1phzxoXnATSH6HuKYM5r?= =?utf-8?q?lndi8kq+ozxLTpNj9qYxMr/5yzPOTSuCCqXAW+s7RmdFCPFPkWtrsBV2E/MQIdkxU?= =?utf-8?q?06AfJL/M4YrJz1N74xA/9AOdbWdWkYfznRMAWa/0XNfKzVvLvALr7gdRKHIvb6tvI?= =?utf-8?q?NOae7eksfH3T7Dh0b2STaLLb+Hqu7B1Jo1p2zKwSZpFWtLfrr1Mv7Frz4whUs6mkf?= =?utf-8?q?Ro9SVxeE5B8PwlvSYklWPwfm4f22SZld7dF7G4w62rDmg0bcmmF7+lnAd6hlOvBKK?= =?utf-8?q?g7rHChI+o0UkK80JQYeaeUujostQvRW7AyxqsdRkVBn4oajuPW7jCp6lJFrkKYTKp?= =?utf-8?q?KUX4IqZ+lVymzl4atUEj5mCQrDyPq4A1+Yke59DMdObMp9YDRaRme8xbjcIhXGHHm?= =?utf-8?q?N9UvUZG4Jrz2zGfD2i4hDa6fsHUx+fDqGEJGgV88sJvrmUVY6s2FpETY0hTtF3jOB?= =?utf-8?q?Sv8GYjexHlW56ZKaWJXL4ajWhFr0Fh2F6A=3D=3D?= X-Forefront-Antispam-Report: CIP:216.228.118.233; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc7edge2.nvidia.com; CAT:NONE; SFS:(13230040)(376014)(82310400026)(36860700013)(1800799024); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Oct 2024 19:22:34.3484 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a390c1de-c4ae-4853-7608-08dcf4613698 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.118.233]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD83.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB7567 Received-SPF: softfail client-ip=40.107.94.74; envelope-from=davthompson@nvidia.com; helo=NAM10-MW2-obe.outbound.protection.outlook.com X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: shravankr@nvidia.com Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Uwe Kleine-König BugLink: https://bugs.launchpad.net/bugs/2085561 The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is ignored (apart from emitting a warning) and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new(), which already returns void. Eventually after all drivers are converted, .remove_new() will be renamed to .remove(). Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Signed-off-by: Uwe Kleine-König Signed-off-by: Borislav Petkov (AMD) Link: https://lore.kernel.org/r/20231004131254.2673842-5-u.kleine-koenig@pengutronix.de (cherry picked from commit a5347591eb6fa1263bb0902714c3c8f07dd4748b) Signed-off-by: David Thompson --- drivers/edac/bluefield_edac.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/edac/bluefield_edac.c b/drivers/edac/bluefield_edac.c index e4736eb37bfb..5b3164560648 100644 --- a/drivers/edac/bluefield_edac.c +++ b/drivers/edac/bluefield_edac.c @@ -323,14 +323,12 @@ static int bluefield_edac_mc_probe(struct platform_device *pdev) } -static int bluefield_edac_mc_remove(struct platform_device *pdev) +static void bluefield_edac_mc_remove(struct platform_device *pdev) { struct mem_ctl_info *mci = platform_get_drvdata(pdev); edac_mc_del_mc(&pdev->dev); edac_mc_free(mci); - - return 0; } static const struct acpi_device_id bluefield_mc_acpi_ids[] = { @@ -346,7 +344,7 @@ static struct platform_driver bluefield_edac_mc_driver = { .acpi_match_table = bluefield_mc_acpi_ids, }, .probe = bluefield_edac_mc_probe, - .remove = bluefield_edac_mc_remove, + .remove_new = bluefield_edac_mc_remove, }; module_platform_driver(bluefield_edac_mc_driver); From patchwork Thu Oct 24 19:22:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Thompson X-Patchwork-Id: 2001912 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ubuntu.com (client-ip=185.125.189.65; helo=lists.ubuntu.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=patchwork.ozlabs.org) Received: from lists.ubuntu.com (lists.ubuntu.com [185.125.189.65]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4XZG5m0vglz1xx6 for ; Fri, 25 Oct 2024 06:22:52 +1100 (AEDT) Received: from localhost ([127.0.0.1] helo=lists.ubuntu.com) by lists.ubuntu.com with esmtp (Exim 4.86_2) (envelope-from ) id 1t43Pw-0005E2-RK; Thu, 24 Oct 2024 19:22:44 +0000 Received: from mail-mw2nam12on2047.outbound.protection.outlook.com ([40.107.244.47] helo=NAM12-MW2-obe.outbound.protection.outlook.com) by lists.ubuntu.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1t43Pu-000591-LC for kernel-team@lists.ubuntu.com; Thu, 24 Oct 2024 19:22:42 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=rMGq11msQUR2ZNdSFhnZdfFHbDJFgXTkGuJgnx3cEg61ClJvQFi28Wy2+VpxceSKeWjSGBPYPUeVl0giNTTNpNOoUP1kKKJsxe1qwBVIWxDsxUB6/nEq/7V0dlZ6Cxu1cbvQ6yuOq8JOlUUCrvG7IiiH7G7b5ioRA3OX4tdy2kws2iJPr75eUlTyFNWRXIyari3D3DZdJX8WS8Fx8wVLWnyzIPAoQ+Eyh+o83m82RaUD37cYbgggom8GFCjbmsnVdTmSuklGH1vwTpCY7fQIzOTS0fHquWRBTFqr6xeqAh0aPKrCiYITOwt70/vKO8yXdBnMRcI7u7zZkLjOSob5tw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=UMr67loFIJcWNHyaHiCUFSwYf6zuXUAya8qSVCiJWDw=; b=AkVfqjeEf9PgxiVuUweJOp/Ps2hj9UUTzUDA2haQDK9qaNgNo5Shh4dbkvVLVGVgxFEg4tb+yMo3b1jHi8GivrOFieVXcJuGRquVhQUYLiTcmirCAFocC7CZ4zELyiHY/hwAOgql2Rawo6VdfNpBpKOTnx/EBpBmQut6NQ0XgtCIWFTye2V37Kwr7xAevSG+bgmS8c5U+w896OQEPrCZqJvFuasYj+MSkYwTUtc6EtTfufDMydE3UMtX2uB7A0sPtAwB2WGD3taiWP/stk4/j+pLixzytQ44DduLumYfpnE+hsKt0bf2SDhY5/LItK69ANM8js7r1WBeexn2vFqmhw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.118.232) smtp.rcpttodomain=lists.ubuntu.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) Received: from DS7PR03CA0021.namprd03.prod.outlook.com (2603:10b6:5:3b8::26) by SA3PR12MB8801.namprd12.prod.outlook.com (2603:10b6:806:312::17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8069.28; Thu, 24 Oct 2024 19:22:38 +0000 Received: from CY4PEPF0000E9DC.namprd05.prod.outlook.com (2603:10b6:5:3b8:cafe::80) by DS7PR03CA0021.outlook.office365.com (2603:10b6:5:3b8::26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.18 via Frontend Transport; Thu, 24 Oct 2024 19:22:38 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.118.232) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.118.232 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.118.232; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.118.232) by CY4PEPF0000E9DC.mail.protection.outlook.com (10.167.241.75) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.14 via Frontend Transport; Thu, 24 Oct 2024 19:22:37 +0000 Received: from drhqmail202.nvidia.com (10.126.190.181) by mail.nvidia.com (10.127.129.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Thu, 24 Oct 2024 12:22:27 -0700 Received: from drhqmail201.nvidia.com (10.126.190.180) by drhqmail202.nvidia.com (10.126.190.181) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Thu, 24 Oct 2024 12:22:27 -0700 Received: from vdi.nvidia.com (10.127.8.14) by mail.nvidia.com (10.126.190.180) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Thu, 24 Oct 2024 12:22:27 -0700 From: David Thompson To: , Subject: [SRU][J:linux-bluefield][PATCH v2 5/6] EDAC/bluefield: Fix potential integer overflow Date: Thu, 24 Oct 2024 15:22:21 -0400 Message-ID: X-Mailer: git-send-email 2.30.1 In-Reply-To: References: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000E9DC:EE_|SA3PR12MB8801:EE_ X-MS-Office365-Filtering-Correlation-Id: 5f77527c-ab46-4b5e-31be-08dcf4613895 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|36860700013|376014|1800799024|82310400026; X-Microsoft-Antispam-Message-Info: wPFS2xDIz8IYocTb94aV6CBFtUAWN4/ekNpAOEtTbs8o7Rbk78xuTA/vnhTORCEYuu/fXfVJvwxXFvVJwzwGL4xTFuZN1+qOjWU5gIxqWjv4d5V7HrpcnY798kMFKktqhqKLIRtSxGngq8SotPbhRKBcPmN/MT/H4U3g8fJOqc6FlzCQdX0Z7GdQSOyU620BrrZC8WABSKV9iOTP+jyJaDOWbYrOWrIso6LZYTFWa/1u9ewPOmtEpszzeSiU3kFaK5ZZv1apYBIk4ZR7LJmH6hMNd7zRnWTHfHBzEPQI8DAM/Hfoy2grhD+E4/EETw9ZugcIW1MQo7QZkrfiP5eRDvwUlqDHC9pb0UfC52sTLyLh5toBVzSHLXGcVXvkwDBp3h9z2Wtz0HObEDQIdrGCt3jwKT4BDoBipFRjqgAerYYt80pto1k866rIgF3jsO0QMb6VzamiSiAus7/PQrOKH6Uox0txC8yd5fT7v6pDx6CnFBSlVCrGm1JXfWOEvOwrqR5Nttlb+L7nWFtSM63YxMRfDNQ2hJJJKJ4O5xix7i7xOyRA78WbYFbO/mmG4rc5SJa7XXvnne/JCTRuKHSoMc5DpwNhGdS1iJ+/EVB6cNhYWxJHpExplw9OKI5miPLKK0wzbJQDCnr4UkXvElNM2klPMHkI8r8E5Tvih8DVOoP1qBhzNUTfvqHwt4vJuH9FcdKJTHdOFL80PpWO+RECVPUF3i1we13EW/NQlRDza7raVFWrfAzwNvU5V5qfbz7g/1qBtAaf8MOS38qjcLW1VObIWmlt/ZvwT2jB/pDLGKHXRzexRZJomd6IAb15kZsdBoB5JTygdRZYSiYRRS4aqeE2qSefP0+LGCmOGNXk7aVDEYCIc29QCv5Nsk9D+n660iKiAw7IWl/pRWIK+tHEmy6VOT7MLAmkIszbFdwNk1qylBj2jESC4QwrYEU6vHh1fPcMl8ChLqG9HFEXN9/VtPWJSD7UFO1fzFPXCHlT1Qb/CeuEbVDc0A9JfCP9fNQHZ8Hq5kcsA0FdSitHW0BbiNDjZZIKuuZAhoHE0FIciF0mh7PpYNBItfoZXbMlpuQBWzbMRqm6XFry1voNYtd9Q9KWhG0Pl2jEV+AA52GhBawyjsOgz8zQwWuomucguYrjDD59xzpvvaGWev1P/lisW8nDeVdAAtRlu6GP26c/rtKQDyOenmyqLxdqghZdpJKLZyX6e0N9mbARVX/2Vq0A5mwSG2fNPPiu4p5+9cD8B1xJOlnsXbSDASHPF76D0GXPvrUuDnTRrcaVbHi+6SCanIyJEW0n+RSsztxk18SxuC4He8vcP2+MYW5nFkXca0mmoonMiALW7z1qSu7pPH6QLv69WIizxK5N1Es8RSQLUbE1UVgD2svbdgldYUU2shDm2WDz7dVi5orbkDrKwPwukQ== X-Forefront-Antispam-Report: CIP:216.228.118.232; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc7edge1.nvidia.com; CAT:NONE; SFS:(13230040)(36860700013)(376014)(1800799024)(82310400026); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Oct 2024 19:22:37.7137 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5f77527c-ab46-4b5e-31be-08dcf4613895 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.118.232]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9DC.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA3PR12MB8801 Received-SPF: softfail client-ip=40.107.244.47; envelope-from=davthompson@nvidia.com; helo=NAM12-MW2-obe.outbound.protection.outlook.com X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: shravankr@nvidia.com Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" BugLink: https://bugs.launchpad.net/bugs/2085561 The 64-bit argument for the "get DIMM info" SMC call consists of mem_ctrl_idx left-shifted 16 bits and OR-ed with DIMM index. With mem_ctrl_idx defined as 32-bits wide the left-shift operation truncates the upper 16 bits of information during the calculation of the SMC argument. The mem_ctrl_idx stack variable must be defined as 64-bits wide to prevent any potential integer overflow, i.e. loss of data from upper 16 bits. Fixes: 82413e562ea6 ("EDAC, mellanox: Add ECC support for BlueField DDR4") Signed-off-by: David Thompson Signed-off-by: Borislav Petkov (AMD) Reviewed-by: Shravan Kumar Ramani Link: https://lore.kernel.org/r/20240930151056.10158-1-davthompson@nvidia.com (cherry picked from commit 1fe774a93b46bb029b8f6fa9d1f25affa53f06c6 linux-next) Signed-off-by: David Thompson --- drivers/edac/bluefield_edac.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/edac/bluefield_edac.c b/drivers/edac/bluefield_edac.c index 5b3164560648..0e539c107351 100644 --- a/drivers/edac/bluefield_edac.c +++ b/drivers/edac/bluefield_edac.c @@ -180,7 +180,7 @@ static void bluefield_edac_check(struct mem_ctl_info *mci) static void bluefield_edac_init_dimms(struct mem_ctl_info *mci) { struct bluefield_edac_priv *priv = mci->pvt_info; - int mem_ctrl_idx = mci->mc_idx; + u64 mem_ctrl_idx = mci->mc_idx; struct dimm_info *dimm; u64 smc_info, smc_arg; int is_empty = 1, i; From patchwork Thu Oct 24 19:22:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Thompson X-Patchwork-Id: 2001913 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ubuntu.com (client-ip=185.125.189.65; helo=lists.ubuntu.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=patchwork.ozlabs.org) Received: from lists.ubuntu.com (lists.ubuntu.com [185.125.189.65]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4XZG5p39kMz1xw8 for ; Fri, 25 Oct 2024 06:22:54 +1100 (AEDT) Received: from localhost ([127.0.0.1] helo=lists.ubuntu.com) by lists.ubuntu.com with esmtp (Exim 4.86_2) (envelope-from ) id 1t43Py-0005Hr-Cq; Thu, 24 Oct 2024 19:22:46 +0000 Received: from mail-bn7nam10on2088.outbound.protection.outlook.com ([40.107.92.88] helo=NAM10-BN7-obe.outbound.protection.outlook.com) by lists.ubuntu.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1t43Pv-0005Aj-ME for kernel-team@lists.ubuntu.com; Thu, 24 Oct 2024 19:22:44 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=oDRmKn0zFaCOvmgtpnvslvYs+3bTcQOrpqr95Eu9m1mLC2qjRS5R/KnjTSjevfRAb8K7e855MnRWGfV9xKFqXhCDC7gK2kRTtoN4rVaJk+IwqblfjDljtjp+0caIkTt18CC4VpO9KM0ncgtxOhCU5L1vXh51wlJ3GqdN4nuGIKR7d7TFuoSquXBjB+Po6qtII/oybCCDOMl5XIsC/gIknNuAvkbBKZv24pNnEpilZiSR+ZCynKAWIMZlB3Neo7XcZTMHQtQICA0WxUIbQMHCCaYd0Ybv6VvYYbc8DTXDY5yGTcErFPZhZHUg8frWqRnq5sWMiD/4IVNmFJhGTq3sqw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=9utpd3Up6OqfutXLLy4FPv2T0jfX/pfHnCTcCh+STLE=; b=v244fJqCZchbhs7BJQv0GKA9cvMNwteglcp4EdQYkjGiLqIaW9jG5FbCQpmM+4TQC5dwxD7yj0jqYrq4o3dX84SZVs2qipAyNMDyhIX8ODjEyGl4lfItL6MboW5AlCFBU3x45tp17EZ9BX4/s/gjmrmuM7+BYkr7BGxWstD4wxT8B+6b6gY8jhrS1Bd0Yy0l3r8I+ZGkzIH+maveK7WLWV4RKIfVaSHtn9WvSWq1mpjZiaQjbzr2RJfMlmz2EnKnv641LJnfLVqRil+iohlmLlOwLaMlK/SE4N+FBcqgOj05mzU/hIyHRAoF3n1+X2QCfKyX03E7lnI51L8WG2yFeg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.118.232) smtp.rcpttodomain=lists.ubuntu.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) Received: from DS7PR03CA0028.namprd03.prod.outlook.com (2603:10b6:5:3b8::33) by DS0PR12MB6414.namprd12.prod.outlook.com (2603:10b6:8:cd::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.16; Thu, 24 Oct 2024 19:22:39 +0000 Received: from CY4PEPF0000E9DC.namprd05.prod.outlook.com (2603:10b6:5:3b8:cafe::de) by DS7PR03CA0028.outlook.office365.com (2603:10b6:5:3b8::33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.17 via Frontend Transport; Thu, 24 Oct 2024 19:22:38 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.118.232) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.118.232 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.118.232; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.118.232) by CY4PEPF0000E9DC.mail.protection.outlook.com (10.167.241.75) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.14 via Frontend Transport; Thu, 24 Oct 2024 19:22:38 +0000 Received: from drhqmail203.nvidia.com (10.126.190.182) by mail.nvidia.com (10.127.129.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Thu, 24 Oct 2024 12:22:28 -0700 Received: from drhqmail201.nvidia.com (10.126.190.180) by drhqmail203.nvidia.com (10.126.190.182) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Thu, 24 Oct 2024 12:22:28 -0700 Received: from vdi.nvidia.com (10.127.8.14) by mail.nvidia.com (10.126.190.180) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Thu, 24 Oct 2024 12:22:27 -0700 From: David Thompson To: , Subject: [SRU][J:linux-bluefield][PATCH v2 6/6] EDAC/bluefield: Use Arm SMC for EMI access on BlueField-2 Date: Thu, 24 Oct 2024 15:22:22 -0400 Message-ID: <16a7821d3fb91707937f8c397c3c8d47336a5481.1729797209.git.davthompson@nvidia.com> X-Mailer: git-send-email 2.30.1 In-Reply-To: References: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000E9DC:EE_|DS0PR12MB6414:EE_ X-MS-Office365-Filtering-Correlation-Id: 86958635-84a0-4855-9f73-08dcf4613945 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|1800799024|376014|36860700013|82310400026; X-Microsoft-Antispam-Message-Info: he7FPMnapiKZECJU1Htt4TEVLY2Rhzh+f6n1pjMdhMXLIC/+HyH+QBbJ4ksJ35IqxaRl88gYXivZ0IghgfeLRclF3glmrRU7rvlewebXV6xqohuIHatoHRqxG2AdKPRznZWcNGYbiQsoZfpn4ULbD1ehom5WSfzKUssMv44C0D8eDOEv6cRUodWBi4MbZ6LZss/yg9bInBlJ4xo22DCBpNeMpiCbiT17jH7axWIB09qQcTAErEXydLZe56IMRCbkNfgsGHxIxk8ktILi6BS9fWlC03G+/dr3yNUDIhYr9bby0VBochBTarYabuSbFvMyst7kqp3gGgDzxRZE1/ijt9cTn0JCh3bp2faMhF/rYnH5el5W1Z/eDe/YV/bQTm8uAbzVSg652cdaIbWRHh7OC9URcyXlR8uFw3Cem0Vkl442rOCz9QtPAM4Z1ELESKjaY045pZIg5v+Tvo7Q5WEwdUSDLbXALIW0i6eLVA8EWsmVRKsU9PxxLTv81zyv+1KxF/KoYAz6risa6VLaY7MgXu3R5cEOKdQsNz8GF0pk0Gsyl0dysZ/bR7UAOrCTjRHXK96+WEVoExhdtkxtoTTuevowfBYFnAw6CK0rhNYJI8M2esQyfdIWGbH+9nslRycKyIV7VUeAbNZTsP4h84quzP2tq6+wmIWDlGju1J5v1mxDnB9whNrbH62FLFX00XmWjyYKK1PWlwKe1xlGei7/lm9z/Ctfh+zK6qXX0Y5ISJZnF+eS9M7x+qcTG55Mz5EYgfeIQDPIcnxxKecB6gahlDsXwZ7p/ggMWZ91LwtCNoiebSAPwuMedM3JQCcpt/Nxhtsm09ZWIzQMSwIreNjwmOR9Wxamete8zwSz2K4zZGXDdPbZ4/YHZ4f+WfuNiki3uTK0IU4IphDJU15Hf2/580LQVVsZZ9AlYPZQ5Jd2ZYju4m/GWSUCvhoV8N+iPMA4mD4JRcVHvxHqaOPO+64e1vicTvKk53KZbADjN/AXPaNe1l+81J7y4xDnCzyTL5qY8WW5DFKBEwUL24xaUL9Iq50q9hPNgdP/Q/gG/IXJsSdT62zYUoAb3NpFfAk2we1CcHR808AisDEz2Lypq2qWLLiKzjUdsZ6rp2rqtFXDH+D38/dITk7393BttXY4Ad595jVia8JjlzUoYMNXXnWKdqrJGBxPsQpbiKxECdcCZsGJ+ltPNmo6S/n0ofAFfa6w4+C4z88t8u/NyjcfKybkwxbb+6u3DsNI0kX8YUezA1jI40LrM05eAudj6PzhQpv+sgrMcOTuw6ol+K/5xmrNiDR86hJf+SG/jYkvQJq/lFSmt7ym5XCktfI5vCl3wW0CgmUZiireH9U89WhMY6KaVt5vXQCrTlfbfkStj2PNw/Puk86fRQt5rdTrQ6XtLN/QWvta7U+I8JpBu6mxOw1XvA== X-Forefront-Antispam-Report: CIP:216.228.118.232; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc7edge1.nvidia.com; CAT:NONE; SFS:(13230040)(1800799024)(376014)(36860700013)(82310400026); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Oct 2024 19:22:38.8543 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 86958635-84a0-4855-9f73-08dcf4613945 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.118.232]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9DC.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB6414 Received-SPF: softfail client-ip=40.107.92.88; envelope-from=davthompson@nvidia.com; helo=NAM10-BN7-obe.outbound.protection.outlook.com X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: shravankr@nvidia.com Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" BugLink: https://bugs.launchpad.net/bugs/2085561 The BlueField EDAC driver supports the first generation BlueField-1 SoC, but not the second generation BlueField-2 SoC. The BlueField-2 SoC is different in that only secure accesses are allowed to the External Memory Interface (EMI) register block. On BlueField-2, all read/write accesses from Linux to EMI registers are routed via the Arm Secure Monitor Call (SMC) through Arm Trusted Firmware (ATF), which runs at EL3 privileged state. On BlueField-1, EMI registers are mapped and accessed directly. In order to support BlueField-2, the driver's read and write access methods must be extended with additional logic to include secure access to the EMI registers via SMCs. [ bp: Move struct member comments above them, simplify. ] Signed-off-by: David Thompson Signed-off-by: Borislav Petkov (AMD) Reviewed-by: Shravan Kumar Ramani Link: https://lore.kernel.org/r/20241021233013.18405-1-davthompson@nvidia.com (cherry picked from commit e4196757547444f7c4c156e56ea9d44612e97cbf linux-next) Signed-off-by: David Thompson --- drivers/edac/bluefield_edac.c | 168 ++++++++++++++++++++++++++++++---- 1 file changed, 149 insertions(+), 19 deletions(-) diff --git a/drivers/edac/bluefield_edac.c b/drivers/edac/bluefield_edac.c index 0e539c107351..739132e5ed8a 100644 --- a/drivers/edac/bluefield_edac.c +++ b/drivers/edac/bluefield_edac.c @@ -47,13 +47,22 @@ #define MLXBF_EDAC_MAX_DIMM_PER_MC 2 #define MLXBF_EDAC_ERROR_GRAIN 8 +#define MLXBF_WRITE_REG_32 (0x82000009) +#define MLXBF_READ_REG_32 (0x8200000A) +#define MLXBF_SIP_SVC_VERSION (0x8200ff03) + +#define MLXBF_SMCCC_ACCESS_VIOLATION (-4) + +#define MLXBF_SVC_REQ_MAJOR 0 +#define MLXBF_SVC_REQ_MINOR 3 + /* - * Request MLNX_SIP_GET_DIMM_INFO + * Request MLXBF_SIP_GET_DIMM_INFO * * Retrieve information about DIMM on a certain slot. * * Call register usage: - * a0: MLNX_SIP_GET_DIMM_INFO + * a0: MLXBF_SIP_GET_DIMM_INFO * a1: (Memory controller index) << 16 | (Dimm index in memory controller) * a2-7: not used. * @@ -61,7 +70,7 @@ * a0: MLXBF_DIMM_INFO defined below describing the DIMM. * a1-3: not used. */ -#define MLNX_SIP_GET_DIMM_INFO 0x82000008 +#define MLXBF_SIP_GET_DIMM_INFO 0x82000008 /* Format for the SMC response about the memory information */ #define MLXBF_DIMM_INFO__SIZE_GB GENMASK_ULL(15, 0) @@ -72,9 +81,15 @@ #define MLXBF_DIMM_INFO__PACKAGE_X GENMASK_ULL(31, 24) struct bluefield_edac_priv { + /* pointer to device structure */ + struct device *dev; int dimm_ranks[MLXBF_EDAC_MAX_DIMM_PER_MC]; void __iomem *emi_base; int dimm_per_mc; + /* access to secure regs supported */ + bool svc_sreg_support; + /* SMC table# for secure regs access */ + u32 sreg_tbl; }; static u64 smc_call1(u64 smc_op, u64 smc_arg) @@ -86,6 +101,71 @@ static u64 smc_call1(u64 smc_op, u64 smc_arg) return res.a0; } +static int secure_readl(void __iomem *addr, u32 *result, u32 sreg_tbl) +{ + struct arm_smccc_res res; + int status; + + arm_smccc_smc(MLXBF_READ_REG_32, sreg_tbl, (uintptr_t)addr, + 0, 0, 0, 0, 0, &res); + + status = res.a0; + + if (status == SMCCC_RET_NOT_SUPPORTED || + status == MLXBF_SMCCC_ACCESS_VIOLATION) + return -1; + + *result = (u32)res.a1; + return 0; +} + +static int secure_writel(void __iomem *addr, u32 data, u32 sreg_tbl) +{ + struct arm_smccc_res res; + int status; + + arm_smccc_smc(MLXBF_WRITE_REG_32, sreg_tbl, data, (uintptr_t)addr, + 0, 0, 0, 0, &res); + + status = res.a0; + + if (status == SMCCC_RET_NOT_SUPPORTED || + status == MLXBF_SMCCC_ACCESS_VIOLATION) + return -1; + else + return 0; +} + +static int bluefield_edac_readl(struct bluefield_edac_priv *priv, u32 offset, u32 *result) +{ + void __iomem *addr; + int err = 0; + + addr = priv->emi_base + offset; + + if (priv->svc_sreg_support) + err = secure_readl(addr, result, priv->sreg_tbl); + else + *result = readl(addr); + + return err; +} + +static int bluefield_edac_writel(struct bluefield_edac_priv *priv, u32 offset, u32 data) +{ + void __iomem *addr; + int err = 0; + + addr = priv->emi_base + offset; + + if (priv->svc_sreg_support) + err = secure_writel(addr, data, priv->sreg_tbl); + else + writel(data, addr); + + return err; +} + /* * Gather the ECC information from the External Memory Interface registers * and report it to the edac handler. @@ -99,7 +179,7 @@ static void bluefield_gather_report_ecc(struct mem_ctl_info *mci, u32 ecc_latch_select, dram_syndrom, serr, derr, syndrom; enum hw_event_mc_err_type ecc_type; u64 ecc_dimm_addr; - int ecc_dimm; + int ecc_dimm, err; ecc_type = is_single_ecc ? HW_EVENT_ERR_CORRECTED : HW_EVENT_ERR_UNCORRECTED; @@ -109,14 +189,19 @@ static void bluefield_gather_report_ecc(struct mem_ctl_info *mci, * registers with information about the last ECC error occurrence. */ ecc_latch_select = MLXBF_ECC_LATCH_SEL__START; - writel(ecc_latch_select, priv->emi_base + MLXBF_ECC_LATCH_SEL); + err = bluefield_edac_writel(priv, MLXBF_ECC_LATCH_SEL, ecc_latch_select); + if (err) + dev_err(priv->dev, "ECC latch select write failed.\n"); /* * Verify that the ECC reported info in the registers is of the * same type as the one asked to report. If not, just report the * error without the detailed information. */ - dram_syndrom = readl(priv->emi_base + MLXBF_SYNDROM); + err = bluefield_edac_readl(priv, MLXBF_SYNDROM, &dram_syndrom); + if (err) + dev_err(priv->dev, "DRAM syndrom read failed.\n"); + serr = FIELD_GET(MLXBF_SYNDROM__SERR, dram_syndrom); derr = FIELD_GET(MLXBF_SYNDROM__DERR, dram_syndrom); syndrom = FIELD_GET(MLXBF_SYNDROM__SYN, dram_syndrom); @@ -127,13 +212,21 @@ static void bluefield_gather_report_ecc(struct mem_ctl_info *mci, return; } - dram_additional_info = readl(priv->emi_base + MLXBF_ADD_INFO); + err = bluefield_edac_readl(priv, MLXBF_ADD_INFO, &dram_additional_info); + if (err) + dev_err(priv->dev, "DRAM additional info read failed.\n"); + err_prank = FIELD_GET(MLXBF_ADD_INFO__ERR_PRANK, dram_additional_info); ecc_dimm = (err_prank >= 2 && priv->dimm_ranks[0] <= 2) ? 1 : 0; - edea0 = readl(priv->emi_base + MLXBF_ERR_ADDR_0); - edea1 = readl(priv->emi_base + MLXBF_ERR_ADDR_1); + err = bluefield_edac_readl(priv, MLXBF_ERR_ADDR_0, &edea0); + if (err) + dev_err(priv->dev, "Error addr 0 read failed.\n"); + + err = bluefield_edac_readl(priv, MLXBF_ERR_ADDR_1, &edea1); + if (err) + dev_err(priv->dev, "Error addr 1 read failed.\n"); ecc_dimm_addr = ((u64)edea1 << 32) | edea0; @@ -147,6 +240,7 @@ static void bluefield_edac_check(struct mem_ctl_info *mci) { struct bluefield_edac_priv *priv = mci->pvt_info; u32 ecc_count, single_error_count, double_error_count, ecc_error = 0; + int err; /* * The memory controller might not be initialized by the firmware @@ -155,7 +249,10 @@ static void bluefield_edac_check(struct mem_ctl_info *mci) if (mci->edac_cap == EDAC_FLAG_NONE) return; - ecc_count = readl(priv->emi_base + MLXBF_ECC_CNT); + err = bluefield_edac_readl(priv, MLXBF_ECC_CNT, &ecc_count); + if (err) + dev_err(priv->dev, "ECC count read failed.\n"); + single_error_count = FIELD_GET(MLXBF_ECC_CNT__SERR_CNT, ecc_count); double_error_count = FIELD_GET(MLXBF_ECC_CNT__DERR_CNT, ecc_count); @@ -172,8 +269,11 @@ static void bluefield_edac_check(struct mem_ctl_info *mci) } /* Write to clear reported errors. */ - if (ecc_count) - writel(ecc_error, priv->emi_base + MLXBF_ECC_ERR); + if (ecc_count) { + err = bluefield_edac_writel(priv, MLXBF_ECC_ERR, ecc_error); + if (err) + dev_err(priv->dev, "ECC Error write failed.\n"); + } } /* Initialize the DIMMs information for the given memory controller. */ @@ -189,7 +289,7 @@ static void bluefield_edac_init_dimms(struct mem_ctl_info *mci) dimm = mci->dimms[i]; smc_arg = mem_ctrl_idx << 16 | i; - smc_info = smc_call1(MLNX_SIP_GET_DIMM_INFO, smc_arg); + smc_info = smc_call1(MLXBF_SIP_GET_DIMM_INFO, smc_arg); if (!FIELD_GET(MLXBF_DIMM_INFO__SIZE_GB, smc_info)) { dimm->mtype = MEM_EMPTY; @@ -244,6 +344,7 @@ static int bluefield_edac_mc_probe(struct platform_device *pdev) struct bluefield_edac_priv *priv; struct device *dev = &pdev->dev; struct edac_mc_layer layers[1]; + struct arm_smccc_res res; struct mem_ctl_info *mci; struct resource *emi_res; unsigned int mc_idx, dimm_count; @@ -279,13 +380,43 @@ static int bluefield_edac_mc_probe(struct platform_device *pdev) return -ENOMEM; priv = mci->pvt_info; + priv->dev = dev; + + /* + * The "sec_reg_block" property in the ACPI table determines the method + * the driver uses to access the EMI registers: + * a) property is not present - directly access registers via readl/writel + * b) property is present - indirectly access registers via SMC calls + * (assuming required Silicon Provider service version found) + */ + if (device_property_read_u32(dev, "sec_reg_block", &priv->sreg_tbl)) { + priv->svc_sreg_support = false; + } else { + /* + * Check for minimum required Arm Silicon Provider (SiP) service + * version, ensuring support of required SMC function IDs. + */ + arm_smccc_smc(MLXBF_SIP_SVC_VERSION, 0, 0, 0, 0, 0, 0, 0, &res); + if (res.a0 == MLXBF_SVC_REQ_MAJOR && + res.a1 >= MLXBF_SVC_REQ_MINOR) { + priv->svc_sreg_support = true; + } else { + dev_err(dev, "Required SMCs are not supported.\n"); + ret = -EINVAL; + goto err; + } + } priv->dimm_per_mc = dimm_count; - priv->emi_base = devm_ioremap_resource(dev, emi_res); - if (IS_ERR(priv->emi_base)) { - dev_err(dev, "failed to map EMI IO resource\n"); - ret = PTR_ERR(priv->emi_base); - goto err; + if (!priv->svc_sreg_support) { + priv->emi_base = devm_ioremap_resource(dev, emi_res); + if (IS_ERR(priv->emi_base)) { + dev_err(dev, "failed to map EMI IO resource\n"); + ret = PTR_ERR(priv->emi_base); + goto err; + } + } else { + priv->emi_base = (void __iomem *)emi_res->start; } mci->pdev = dev; @@ -320,7 +451,6 @@ static int bluefield_edac_mc_probe(struct platform_device *pdev) edac_mc_free(mci); return ret; - } static void bluefield_edac_mc_remove(struct platform_device *pdev)