From patchwork Mon Oct 21 04:23:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: You-Sheng Yang X-Patchwork-Id: 1999746 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ubuntu.com (client-ip=185.125.189.65; helo=lists.ubuntu.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=patchwork.ozlabs.org) Received: from lists.ubuntu.com (lists.ubuntu.com [185.125.189.65]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4XX2Jq3W14z1xtp for ; Mon, 21 Oct 2024 15:24:42 +1100 (AEDT) Received: from localhost ([127.0.0.1] helo=lists.ubuntu.com) by lists.ubuntu.com with esmtp (Exim 4.86_2) (envelope-from ) id 1t2jy8-0004HC-92; Mon, 21 Oct 2024 04:24:36 +0000 Received: from mail-pl1-f170.google.com ([209.85.214.170]) by lists.ubuntu.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1t2jy6-0004GM-Dw for kernel-team@lists.ubuntu.com; Mon, 21 Oct 2024 04:24:34 +0000 Received: by mail-pl1-f170.google.com with SMTP id d9443c01a7336-20c693b68f5so42236795ad.1 for ; Sun, 20 Oct 2024 21:24:34 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1729484672; x=1730089472; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=wFB83K8SXsIwgzBoZsoiTPGoExRhJ7mAznexdh+DgXA=; b=fWzboSDF9SFqXlVplcYZf+BNNqndNwPnKsQa0ePWCL8gOyIERsAUQNDEp8N7fqSgQ3 IzW1DIbOrn4a1kJdUAN0DX3hTGtzW5YPCfI6qwdM1Xj8d/gFIqp3ZFSQR9qMZEzNkMdu NJQJTSNoMSnDZWsKyibG1aRncBY8FXz8nXWGISatVsBDxddvpispAEkXvb/IngQ48MWr ulU0WxiMGWBWVvak9LrdN1CsQ6Fv9l1E0zBtu6/MQGXJHxrq0t0jR2FIIQlBwEsb/N7F Hqq/16kRCAaQ3HKl5Ne0mWzOheFuUVCrtTzF0cdLbbesVvLhBR0cNGOZs1pHkBNywOib GwYA== X-Gm-Message-State: AOJu0Yyp4na1lCT4iVKXT4sImenfnQeOEF+aGwneqtgkNbGJ4PFeX5Wc lAa/oS9pVWXZ4ESsyn8s+gZwbeer6mz4Ww380J77VHrJLECrl9laEGLJ1g== X-Google-Smtp-Source: AGHT+IESjlzDj/oZH6C3nlBFQ4dGhaBSUq69AwQbHA6vb5hHlURdsDaqcLOyM05n0CKYXHp3qEhMlg== X-Received: by 2002:a17:903:2292:b0:20c:f6df:6afb with SMTP id d9443c01a7336-20e5a927e2amr146662395ad.51.1729484671795; Sun, 20 Oct 2024 21:24:31 -0700 (PDT) Received: from localhost.localdomain (125-229-129-140.hinet-ip.hinet.net. [125.229.129.140]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-20e7f0de4b2sm17009615ad.217.2024.10.20.21.24.30 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 20 Oct 2024 21:24:31 -0700 (PDT) From: You-Sheng Yang To: kernel-team@lists.ubuntu.com Subject: [PATCH 1/3][SRU][Oracular] platform/x86: intel/pmc: Ignore all LTRs during suspend Date: Mon, 21 Oct 2024 12:23:56 +0800 Message-ID: <20241021042358.2200586-2-vicamo.yang@canonical.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241021042358.2200586-1-vicamo.yang@canonical.com> References: <20241021042358.2200586-1-vicamo.yang@canonical.com> MIME-Version: 1.0 Received-SPF: pass client-ip=209.85.214.170; envelope-from=vicamo@gmail.com; helo=mail-pl1-f170.google.com X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Xi Pardee BugLink: https://bugs.launchpad.net/bugs/2081130 Add support to ignore all LTRs before suspend and restore the previous LTR values after suspend. This feature could be turned off with module parameter ltr_ignore_all_suspend. LTR value is a mechanism for a device to indicate tolerance to access the corresponding resource. When system suspends, the resource is not available and therefore the LTR value could be ignored. Ignoring all LTR values prevents problematic device from blocking the system to get to the deepest package state during suspend. Suggested-by: Rafael J. Wysocki Signed-off-by: Xi Pardee Reviewed-by: Ilpo Järvinen Link: https://lore.kernel.org/r/20240906184016.268153-1-xi.pardee@linux.intel.com Signed-off-by: Hans de Goede (cherry picked from commit cedf233530cc375343c5a0b612fe94392f246c99) Signed-off-by: You-Sheng Yang --- drivers/platform/x86/intel/pmc/core.c | 53 +++++++++++++++++++++++++++ drivers/platform/x86/intel/pmc/core.h | 2 + 2 files changed, 55 insertions(+) diff --git a/drivers/platform/x86/intel/pmc/core.c b/drivers/platform/x86/intel/pmc/core.c index 01ae71c6df59d..0ec703af16a4b 100644 --- a/drivers/platform/x86/intel/pmc/core.c +++ b/drivers/platform/x86/intel/pmc/core.c @@ -714,6 +714,49 @@ static int pmc_core_s0ix_blocker_show(struct seq_file *s, void *unused) } DEFINE_SHOW_ATTRIBUTE(pmc_core_s0ix_blocker); +static void pmc_core_ltr_ignore_all(struct pmc_dev *pmcdev) +{ + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(pmcdev->pmcs); i++) { + struct pmc *pmc; + u32 ltr_ign; + + pmc = pmcdev->pmcs[i]; + if (!pmc) + continue; + + guard(mutex)(&pmcdev->lock); + pmc->ltr_ign = pmc_core_reg_read(pmc, pmc->map->ltr_ignore_offset); + + /* ltr_ignore_max is the max index value for LTR ignore register */ + ltr_ign = pmc->ltr_ign | GENMASK(pmc->map->ltr_ignore_max, 0); + pmc_core_reg_write(pmc, pmc->map->ltr_ignore_offset, ltr_ign); + } + + /* + * Ignoring ME during suspend is blocking platforms with ADL PCH to get to + * deeper S0ix substate. + */ + pmc_core_send_ltr_ignore(pmcdev, 6, 0); +} + +static void pmc_core_ltr_restore_all(struct pmc_dev *pmcdev) +{ + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(pmcdev->pmcs); i++) { + struct pmc *pmc; + + pmc = pmcdev->pmcs[i]; + if (!pmc) + continue; + + guard(mutex)(&pmcdev->lock); + pmc_core_reg_write(pmc, pmc->map->ltr_ignore_offset, pmc->ltr_ign); + } +} + static inline u64 adjust_lpm_residency(struct pmc *pmc, u32 offset, const int lpm_adj_x2) { @@ -1479,6 +1522,10 @@ static bool warn_on_s0ix_failures; module_param(warn_on_s0ix_failures, bool, 0644); MODULE_PARM_DESC(warn_on_s0ix_failures, "Check and warn for S0ix failures"); +static bool ltr_ignore_all_suspend = true; +module_param(ltr_ignore_all_suspend, bool, 0644); +MODULE_PARM_DESC(ltr_ignore_all_suspend, "Ignore all LTRs during suspend"); + static __maybe_unused int pmc_core_suspend(struct device *dev) { struct pmc_dev *pmcdev = dev_get_drvdata(dev); @@ -1488,6 +1535,9 @@ static __maybe_unused int pmc_core_suspend(struct device *dev) if (pmcdev->suspend) pmcdev->suspend(pmcdev); + if (ltr_ignore_all_suspend) + pmc_core_ltr_ignore_all(pmcdev); + /* Check if the syspend will actually use S0ix */ if (pm_suspend_via_firmware()) return 0; @@ -1594,6 +1644,9 @@ static __maybe_unused int pmc_core_resume(struct device *dev) { struct pmc_dev *pmcdev = dev_get_drvdata(dev); + if (ltr_ignore_all_suspend) + pmc_core_ltr_restore_all(pmcdev); + if (pmcdev->resume) return pmcdev->resume(pmcdev); diff --git a/drivers/platform/x86/intel/pmc/core.h b/drivers/platform/x86/intel/pmc/core.h index ea04de7eb9e84..e862ea88b816e 100644 --- a/drivers/platform/x86/intel/pmc/core.h +++ b/drivers/platform/x86/intel/pmc/core.h @@ -372,6 +372,7 @@ struct pmc_info { * @map: pointer to pmc_reg_map struct that contains platform * specific attributes * @lpm_req_regs: List of substate requirements + * @ltr_ign: Holds LTR ignore data while suspended * * pmc contains info about one power management controller device. */ @@ -380,6 +381,7 @@ struct pmc { void __iomem *regbase; const struct pmc_reg_map *map; u32 *lpm_req_regs; + u32 ltr_ign; }; /** From patchwork Mon Oct 21 04:23:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: You-Sheng Yang X-Patchwork-Id: 1999748 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ubuntu.com (client-ip=185.125.189.65; helo=lists.ubuntu.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=patchwork.ozlabs.org) Received: from lists.ubuntu.com (lists.ubuntu.com [185.125.189.65]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4XX2Jq5Q0Gz1xwf for ; Mon, 21 Oct 2024 15:24:43 +1100 (AEDT) Received: from localhost ([127.0.0.1] helo=lists.ubuntu.com) by lists.ubuntu.com with esmtp (Exim 4.86_2) (envelope-from ) id 1t2jyA-0004Ig-Eq; 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[125.229.129.140]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-20e7f0de4b2sm17009615ad.217.2024.10.20.21.24.32 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 20 Oct 2024 21:24:32 -0700 (PDT) From: You-Sheng Yang To: kernel-team@lists.ubuntu.com Subject: [PATCH 2/3][SRU][Oracular] e1000e: change I219 (19) devices to ADP Date: Mon, 21 Oct 2024 12:23:57 +0800 Message-ID: <20241021042358.2200586-3-vicamo.yang@canonical.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241021042358.2200586-1-vicamo.yang@canonical.com> References: <20241021042358.2200586-1-vicamo.yang@canonical.com> MIME-Version: 1.0 Received-SPF: pass client-ip=209.85.214.169; envelope-from=vicamo@gmail.com; helo=mail-pl1-f169.google.com X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Vitaly Lifshits BugLink: https://bugs.launchpad.net/bugs/2081130 Sporadic issues, such as PHY access loss, have been observed on I219 (19) devices. It was found that these devices have hardware more closely related to ADP than MTP and the issues were caused by taking MTP-specific flows. Change the MAC and board types of these devices from MTP to ADP to correctly reflect the LAN hardware, and flows, of these devices. Fixes: db2d737d63c5 ("e1000e: Separate MTP board type from ADP") Signed-off-by: Vitaly Lifshits Tested-by: Mor Bar-Gabay Signed-off-by: Tony Nguyen (cherry picked from commit 9d9e5347b035412daa844f884b94a05bac94f864) Signed-off-by: You-Sheng Yang --- drivers/net/ethernet/intel/e1000e/hw.h | 4 ++-- drivers/net/ethernet/intel/e1000e/netdev.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/net/ethernet/intel/e1000e/hw.h b/drivers/net/ethernet/intel/e1000e/hw.h index 4b6e7536170ab..fc8ed38aa0955 100644 --- a/drivers/net/ethernet/intel/e1000e/hw.h +++ b/drivers/net/ethernet/intel/e1000e/hw.h @@ -108,8 +108,8 @@ struct e1000_hw; #define E1000_DEV_ID_PCH_RPL_I219_V22 0x0DC8 #define E1000_DEV_ID_PCH_MTP_I219_LM18 0x550A #define E1000_DEV_ID_PCH_MTP_I219_V18 0x550B -#define E1000_DEV_ID_PCH_MTP_I219_LM19 0x550C -#define E1000_DEV_ID_PCH_MTP_I219_V19 0x550D +#define E1000_DEV_ID_PCH_ADP_I219_LM19 0x550C +#define E1000_DEV_ID_PCH_ADP_I219_V19 0x550D #define E1000_DEV_ID_PCH_LNP_I219_LM20 0x550E #define E1000_DEV_ID_PCH_LNP_I219_V20 0x550F #define E1000_DEV_ID_PCH_LNP_I219_LM21 0x5510 diff --git a/drivers/net/ethernet/intel/e1000e/netdev.c b/drivers/net/ethernet/intel/e1000e/netdev.c index 360ee26557f77..80f8e23bc4f52 100644 --- a/drivers/net/ethernet/intel/e1000e/netdev.c +++ b/drivers/net/ethernet/intel/e1000e/netdev.c @@ -7896,10 +7896,10 @@ static const struct pci_device_id e1000_pci_tbl[] = { { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_V17), board_pch_adp }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_RPL_I219_LM22), board_pch_adp }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_RPL_I219_V22), board_pch_adp }, + { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_LM19), board_pch_adp }, + { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_V19), board_pch_adp }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_LM18), board_pch_mtp }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_V18), board_pch_mtp }, - { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_LM19), board_pch_mtp }, - { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_V19), board_pch_mtp }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_LM20), board_pch_mtp }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_V20), board_pch_mtp }, { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_LM21), board_pch_mtp }, From patchwork Mon Oct 21 04:23:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: You-Sheng Yang X-Patchwork-Id: 1999749 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ubuntu.com (client-ip=185.125.189.65; helo=lists.ubuntu.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=patchwork.ozlabs.org) Received: from lists.ubuntu.com (lists.ubuntu.com [185.125.189.65]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4XX2Js2GBhz1xtp for ; Mon, 21 Oct 2024 15:24:45 +1100 (AEDT) Received: from localhost ([127.0.0.1] helo=lists.ubuntu.com) by lists.ubuntu.com with esmtp (Exim 4.86_2) (envelope-from ) id 1t2jyB-0004KA-O6; Mon, 21 Oct 2024 04:24:39 +0000 Received: from mail-pl1-f176.google.com ([209.85.214.176]) by lists.ubuntu.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1t2jy9-0004Hw-LN for kernel-team@lists.ubuntu.com; Mon, 21 Oct 2024 04:24:37 +0000 Received: by mail-pl1-f176.google.com with SMTP id d9443c01a7336-20cb47387ceso34059895ad.1 for ; Sun, 20 Oct 2024 21:24:37 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1729484675; x=1730089475; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=yelHQG6McWSWymMnD1DL5PJ20ofigbQLgaBMCIXgcUc=; b=GOxvA+SjWPmpUHpLf0QBoJwsnwP5imtZ6OtVKnDr5zbHzQlqFkSWMLnmH30rsFVSc6 IfDOmKQWdkKL7l8/pnZ/m84wK+6J7bCe0Po01YJ+CoHT3hBKLaz98wNsp5D1utygTM/F CNadXvyx3zHnOo+ikHCfQqHL1OpRDaFi1kqiN0/VnFetyQaX1KhVYcZx1niQMnuJMSzQ BZg0HbGpSnrCG5TQK4yLCSuB30rGynyega+EO4S788zU53zhEsqY2eH4GXau24hgCN1e MJWZnFpVGXviluoJ1k70Wh0tu5MMEFN2dLaeVrmhJu+gDi6xFu6klitBDzi3KTONtT2X Ji7A== X-Gm-Message-State: AOJu0YxhgS4YtaeWq7FzmvThMXqyMQTWHGnWbHiw5lr4f3WOGJqQla9Y VFoGbAcnMw5Th7ZqJNuVbj0HclEEh1EAR5MPOPeOFwP4wD/Y1xIp5O9jOQ== X-Google-Smtp-Source: AGHT+IHca/6i6SptjQbhrMGXZDviPhLSloSJV1sjFbhEytX8o2i4i1rFGFmO44AxzW28yQRZIQe8IA== X-Received: by 2002:a17:902:d2cd:b0:20c:7485:892c with SMTP id d9443c01a7336-20e5a91f16dmr147124195ad.45.1729484675404; Sun, 20 Oct 2024 21:24:35 -0700 (PDT) Received: from localhost.localdomain (125-229-129-140.hinet-ip.hinet.net. [125.229.129.140]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-20e7f0de4b2sm17009615ad.217.2024.10.20.21.24.33 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 20 Oct 2024 21:24:34 -0700 (PDT) From: You-Sheng Yang To: kernel-team@lists.ubuntu.com Subject: [PATCH 3/3][SRU][Oracular] UBUNTU: SAUCE: x86/apic: Always explicitly disarm TSC-deadline timer Date: Mon, 21 Oct 2024 12:23:58 +0800 Message-ID: <20241021042358.2200586-4-vicamo.yang@canonical.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241021042358.2200586-1-vicamo.yang@canonical.com> References: <20241021042358.2200586-1-vicamo.yang@canonical.com> MIME-Version: 1.0 Received-SPF: pass client-ip=209.85.214.176; envelope-from=vicamo@gmail.com; helo=mail-pl1-f176.google.com X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Zhang Rui BugLink: https://bugs.launchpad.net/bugs/2081130 New processors have become pickier about the local APIC timer state before entering low power modes. These low power modes are used (for example) when you close your laptop lid and suspend. If you put your laptop in a bag and it is not in this low power mode, it is likely to get quite toasty while it quickly sucks the battery dry. The problem boils down to some CPUs' inability to power down until the CPU recognizes that the local APIC timer is shut down. The current kernel code works in one-shot and periodic modes but does not work for deadline mode. Deadline mode has been the supported and preferred mode on Intel CPUs for over a decade and uses an MSR to drive the timer instead of an APIC register. Disable the TSC Deadline timer in lapic_timer_shutdown() by writing to MSR_IA32_TSC_DEADLINE when in TSC-deadline mode. Also avoid writing to the initial-count register (APIC_TMICT) which is ignored in TSC-deadline mode. Note: The APIC_LVTT|=APIC_LVT_MASKED operation should theoretically be enough to tell the hardware that the timer will not fire in any of the timer modes. But mitigating AMD erratum 411[1] also requires clearing out APIC_TMICT. Solely setting APIC_LVT_MASKED is also ineffective in practice on Intel Lunar Lake systems, which is the motivation for this change. 1. 411 Processor May Exit Message-Triggered C1E State Without an Interrupt if Local APIC Timer Reaches Zero - https://www.amd.com/content/dam/amd/en/documents/archived-tech-docs/revision-guides/41322_10h_Rev_Gd.pdf Fixes: 279f1461432c ("x86: apic: Use tsc deadline for oneshot when available") Suggested-by: Dave Hansen Signed-off-by: Zhang Rui Signed-off-by: Dave Hansen Reviewed-by: Rafael J. Wysocki Tested-by: Srinivas Pandruvada Tested-by: Todd Brandt Cc: stable@vger.kernel.org Link: https://lore.kernel.org/all/20241015061522.25288-1-rui.zhang%40intel.com (cherry picked from https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git/commit/?h=x86/urgent&id=ffd95846c6ec6cf1f93da411ea10d504036cab42) Signed-off-by: You-Sheng Yang --- arch/x86/kernel/apic/apic.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c index 373638691cd48..3244ab43fff99 100644 --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -440,7 +440,19 @@ static int lapic_timer_shutdown(struct clock_event_device *evt) v = apic_read(APIC_LVTT); v |= (APIC_LVT_MASKED | LOCAL_TIMER_VECTOR); apic_write(APIC_LVTT, v); - apic_write(APIC_TMICT, 0); + + /* + * Setting APIC_LVT_MASKED (above) should be enough to tell + * the hardware that this timer will never fire. But AMD + * erratum 411 and some Intel CPU behavior circa 2024 say + * otherwise. Time for belt and suspenders programming: mask + * the timer _and_ zero the counter registers: + */ + if (v & APIC_LVT_TIMER_TSCDEADLINE) + wrmsrl(MSR_IA32_TSC_DEADLINE, 0); + else + apic_write(APIC_TMICT, 0); + return 0; }