From patchwork Fri Oct 18 15:53:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Andre Vieira (lists)" X-Patchwork-Id: 1999272 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4XVTlk1jkdz1xvV for ; Sat, 19 Oct 2024 02:54:10 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 72A7E385840C for ; Fri, 18 Oct 2024 15:54:08 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 1B33A3858D37 for ; Fri, 18 Oct 2024 15:53:43 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 1B33A3858D37 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=arm.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 1B33A3858D37 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1729266830; cv=none; b=lc9FaS+JxSTVZMHMGMRTT+FqCy3u9Rq+3DH99e2pn1C0phHb+Fs0dS8543EN2tQVZGUHc2BG6ybfsbYdOR2oJbwlfHdXdqkBUw3coRdKWVGdT6bjVuMP8YUAoAoonJRJ2tOJtPfmN6pW2AiK9BB1fWehRn7jXx9lC9n8/d3hKKE= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1729266830; c=relaxed/simple; bh=mgHedLWpYBRZWrYtyHD9nikZ+SUc2RbBbbvRsNc1zAk=; h=Message-ID:Date:MIME-Version:Subject:To:From; b=jcCdSXuZzb8KvtJGWJz1lBKV0LJSV0Zs01A++qvWwA72JF+uUbvJ2IXYn02QHkJOrjLFb3dXdvnDl26UgfZNxx//r4UPsGu2+H0X46rL9yGFepZXHvECvmTI6hWFD4Ui9wEfj/2B/55wpYMh6G5nKf+tkTcvAEcxc85764Z9gxU= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 497F5FEC; Fri, 18 Oct 2024 08:54:12 -0700 (PDT) Received: from [10.57.23.73] (unknown [10.57.23.73]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id ECDD23F528; Fri, 18 Oct 2024 08:53:41 -0700 (PDT) Message-ID: <1a80bfb1-6c86-44f7-a149-28f924e967ff@arm.com> Date: Fri, 18 Oct 2024 16:53:40 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: arm: Improvements to arm_noce_conversion_profitable_p call [PR 116444] To: Ramana Radhakrishnan Cc: Ramana Radhakrishnan , "gcc-patches@gcc.gnu.org" , "richard.earnshaw@arm.com" References: <58c24c28-0af8-4f0a-b884-a482c84e707e@arm.com> <7180255A-5FC8-4BDC-BA79-0626389DDBCF@nvidia.com> <5a32a026-f74c-45b7-a2d0-bc0656e72236@arm.com> Content-Language: en-US From: "Andre Vieira (lists)" In-Reply-To: X-Spam-Status: No, score=-12.4 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_NONE, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org Sorry for the delay, some other work popped up in between and this had some latent issues. They should all be addressed now in this new patch. When not dealing with the special armv8.1-m.main conditional instructions case make sure it uses the default_noce_conversion_profitable_p call to determine whether the sequence is cost effective. Also make sure arm_noce_conversion_profitable_p accepts vsel patterns for Armv8.1-M Mainline targets. gcc/ChangeLog: * config/arm/arm.cc (arm_noce_conversion_profitable_p): Call default_noce_conversion_profitable_p when not dealing with the armv8.1-m.main special case. (arm_is_vsel_fp_insn): New function. Regression tested on arm-none-eabi with -mcpu=cortex-m3 and -mcpu=cortex-m55/-mfloat-abi=hard. OK for trunk? diff --git a/gcc/config/arm/arm.cc b/gcc/config/arm/arm.cc index 5c11621327e15b7212b2290769cc0a922347ce2d..41f70154381bcfee3489841c05e4233310f2acee 100644 --- a/gcc/config/arm/arm.cc +++ b/gcc/config/arm/arm.cc @@ -36092,6 +36092,51 @@ arm_get_mask_mode (machine_mode mode) return default_get_mask_mode (mode); } +/* Helper function to determine whether SEQ represents a sequence of + instructions representing the vsel floating point instructions. */ + +static bool +arm_is_vsel_fp_insn (rtx_insn *seq) +{ + rtx_insn *curr_insn = seq; + rtx set = NULL_RTX; + /* The pattern may start with a simple set with register operands. Skip + through any of those. */ + while (curr_insn) + { + set = single_set (curr_insn); + if (!set + || !REG_P (SET_DEST (set))) + return false; + + if (!REG_P (SET_SRC (set))) + break; + curr_insn = NEXT_INSN (curr_insn); + } + + if (!set) + return false; + + /* The next instruction should be a compare. */ + if (!REG_P (SET_DEST (set)) + || GET_CODE (SET_SRC (set)) != COMPARE) + return false; + + curr_insn = NEXT_INSN (curr_insn); + if (!curr_insn) + return false; + + /* And the last instruction should be an IF_THEN_ELSE. */ + set = single_set (curr_insn); + if (!set + || !REG_P (SET_DEST (set)) + || GET_CODE (SET_SRC (set)) != IF_THEN_ELSE) + return false; + + return !NEXT_INSN (curr_insn); +} + + /* Helper function to determine whether SEQ represents a sequence of instructions representing the Armv8.1-M Mainline conditional arithmetic instructions: csinc, csneg and csinv. The cinc instruction is generated @@ -36164,15 +36209,20 @@ arm_is_v81m_cond_insn (rtx_insn *seq) hook to only allow "noce" to generate the patterns that are profitable. */ bool -arm_noce_conversion_profitable_p (rtx_insn *seq, struct noce_if_info *) +arm_noce_conversion_profitable_p (rtx_insn *seq, struct noce_if_info *if_info) { if (!TARGET_COND_ARITH || reload_completed) - return true; + return default_noce_conversion_profitable_p (seq, if_info); if (arm_is_v81m_cond_insn (seq)) return true; + /* Look for vsel opportunities as we still want to codegen these for + Armv8.1-M Mainline targets. */ + if (arm_is_vsel_fp_insn (seq)) + return true; + return false; }