From patchwork Fri Oct 18 02:56:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Jiang, Haochen" X-Patchwork-Id: 1998888 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=Vp5ydbCe; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4XV8W52khLz1xvc for ; Fri, 18 Oct 2024 13:57:02 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 01DBE3858C2B for ; Fri, 18 Oct 2024 02:56:59 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by sourceware.org (Postfix) with ESMTPS id B57F93858D20 for ; Fri, 18 Oct 2024 02:56:22 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org B57F93858D20 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org B57F93858D20 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=198.175.65.9 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1729220193; cv=none; b=YDsqjcKTsyUf1gFoA7yvzI5KIJ9iIeK0V2BUHyJ9u2tuHUYBaRw7IY2+FOdR9tIqc0rKmjZU0EbVVL5UvMEHD4EZqtwXxRhaFWTDXLDvTctQYjV7N8DJAy1wJnEN7aM978Zwbl9ZngEOKCq19bBlMK1hRT0XJscL6b3QGpRF/3Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1729220193; c=relaxed/simple; bh=YqNEZcqwJ4jDpowqE84pphdhhEFuJDTLJc5IJAujKqE=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=a8p92KVjNekbmP4OeFeXIaIedXqrx4hbH5BZLl7YvWtO9ubaGZDQqJ/xHeXMheEsMRIOx2Nim7FVgn0de8SDTZQWKSTQ3ZbrzfdZ6aa0FXDt1kIwaVNHoYj/2Y0qPvvPVCgUAfQ/G+uPdphXjoBhDJhYX1Vt9Y8mfGrcNLuU0WU= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1729220183; x=1760756183; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=YqNEZcqwJ4jDpowqE84pphdhhEFuJDTLJc5IJAujKqE=; b=Vp5ydbCeekrPDzR7aTuxdraJCaDP3ouyeQCcowX7VcbofNFVmwgExsNJ VzL9qWewGSPu2FT8R+Og0EqFveglvh7eeW6Vd0age89SrBTv1idkD2dpc UfkXVW7bp3E0Q2pohC73JS4OAA1SJwjqxZG1AXm60Tn6/+2QR8AinmHAz x7R7ENV7HVd4wNJd8rS7txDwDcqFRBf9pjmcn8YmlV1xaUSk9a9oRu/Es wOp4Jxj7+wSXVf30Wvm2n/27ArXdiPP6dQlnhZqRIb9nqWGhySHDuYb3W juLpelg1h2BnLD8TlhNA0FJYJHBFKQj1MZDtMB9Zn3LeisCohhFbA0vr9 g==; X-CSE-ConnectionGUID: rDaVloZ+TECTh4q8m0ANPA== X-CSE-MsgGUID: Hjcy2Fn5R4e6TFTafn1l3g== X-IronPort-AV: E=McAfee;i="6700,10204,11222"; a="51281895" X-IronPort-AV: E=Sophos;i="6.11,199,1725346800"; d="scan'208";a="51281895" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Oct 2024 19:56:22 -0700 X-CSE-ConnectionGUID: qnck1+iAS6aJIeUR42lRWQ== X-CSE-MsgGUID: 4ddvuP4uQtSNUCzE+55xGQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,212,1725346800"; d="scan'208";a="78782147" Received: from shliclel4217.sh.intel.com ([10.239.240.127]) by fmviesa008.fm.intel.com with ESMTP; 17 Oct 2024 19:56:19 -0700 From: Haochen Jiang To: gcc-patches@gcc.gnu.org Cc: hongtao.liu@intel.com, ubizjak@gmail.com Subject: [PATCH] i386: Refactor get_intel_cpu Date: Fri, 18 Oct 2024 10:56:19 +0800 Message-Id: <20241018025619.782310-1-haochen.jiang@intel.com> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 X-Spam-Status: No, score=-10.6 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org Hi all, ISE054 has just been disclosed and you can find doc from here: https://cdrdv2.intel.com/v1/dl/getContent/671368 From ISE, it shows that we will have family 0x13 for Diamond Rapids. Therefore, we need to refactor the get_intel_cpu to accept new families. Also I did some reorder in the switch for clearness by putting earlier added products on top for search convenience. Bootstraped and tested on x86_64-pc-linux-gnu. Ok for trunk? Thx, Haochen gcc/ChangeLog: * common/config/i386/cpuinfo.h (get_intel_cpu): Refactor the function for future expansion on different family. --- gcc/common/config/i386/cpuinfo.h | 587 +++++++++++++++---------------- 1 file changed, 292 insertions(+), 295 deletions(-) diff --git a/gcc/common/config/i386/cpuinfo.h b/gcc/common/config/i386/cpuinfo.h index 2ae383eb6ab..e3eb6e9d250 100644 --- a/gcc/common/config/i386/cpuinfo.h +++ b/gcc/common/config/i386/cpuinfo.h @@ -343,301 +343,298 @@ get_intel_cpu (struct __processor_model *cpu_model, { const char *cpu = NULL; - /* Parse family and model only for model 6. */ - if (cpu_model2->__cpu_family != 0x6) - return cpu; - - switch (cpu_model2->__cpu_model) - { - case 0x1c: - case 0x26: - /* Bonnell. */ - cpu = "bonnell"; - CHECK___builtin_cpu_is ("atom"); - cpu_model->__cpu_type = INTEL_BONNELL; - break; - case 0x37: - case 0x4a: - case 0x4d: - case 0x5d: - /* Silvermont. */ - case 0x4c: - case 0x5a: - case 0x75: - /* Airmont. */ - cpu = "silvermont"; - CHECK___builtin_cpu_is ("silvermont"); - cpu_model->__cpu_type = INTEL_SILVERMONT; - break; - case 0x5c: - case 0x5f: - /* Goldmont. */ - cpu = "goldmont"; - CHECK___builtin_cpu_is ("goldmont"); - cpu_model->__cpu_type = INTEL_GOLDMONT; - break; - case 0x7a: - /* Goldmont Plus. */ - cpu = "goldmont-plus"; - CHECK___builtin_cpu_is ("goldmont-plus"); - cpu_model->__cpu_type = INTEL_GOLDMONT_PLUS; - break; - case 0x86: - case 0x96: - case 0x9c: - /* Tremont. */ - cpu = "tremont"; - CHECK___builtin_cpu_is ("tremont"); - cpu_model->__cpu_type = INTEL_TREMONT; - break; - case 0x1a: - case 0x1e: - case 0x1f: - case 0x2e: - /* Nehalem. */ - cpu = "nehalem"; - CHECK___builtin_cpu_is ("corei7"); - CHECK___builtin_cpu_is ("nehalem"); - cpu_model->__cpu_type = INTEL_COREI7; - cpu_model->__cpu_subtype = INTEL_COREI7_NEHALEM; - break; - case 0x25: - case 0x2c: - case 0x2f: - /* Westmere. */ - cpu = "westmere"; - CHECK___builtin_cpu_is ("corei7"); - CHECK___builtin_cpu_is ("westmere"); - cpu_model->__cpu_type = INTEL_COREI7; - cpu_model->__cpu_subtype = INTEL_COREI7_WESTMERE; - break; - case 0x2a: - case 0x2d: - /* Sandy Bridge. */ - cpu = "sandybridge"; - CHECK___builtin_cpu_is ("corei7"); - CHECK___builtin_cpu_is ("sandybridge"); - cpu_model->__cpu_type = INTEL_COREI7; - cpu_model->__cpu_subtype = INTEL_COREI7_SANDYBRIDGE; - break; - case 0x3a: - case 0x3e: - /* Ivy Bridge. */ - cpu = "ivybridge"; - CHECK___builtin_cpu_is ("corei7"); - CHECK___builtin_cpu_is ("ivybridge"); - cpu_model->__cpu_type = INTEL_COREI7; - cpu_model->__cpu_subtype = INTEL_COREI7_IVYBRIDGE; - break; - case 0x3c: - case 0x3f: - case 0x45: - case 0x46: - /* Haswell. */ - cpu = "haswell"; - CHECK___builtin_cpu_is ("corei7"); - CHECK___builtin_cpu_is ("haswell"); - cpu_model->__cpu_type = INTEL_COREI7; - cpu_model->__cpu_subtype = INTEL_COREI7_HASWELL; - break; - case 0x3d: - case 0x47: - case 0x4f: - case 0x56: - /* Broadwell. */ - cpu = "broadwell"; - CHECK___builtin_cpu_is ("corei7"); - CHECK___builtin_cpu_is ("broadwell"); - cpu_model->__cpu_type = INTEL_COREI7; - cpu_model->__cpu_subtype = INTEL_COREI7_BROADWELL; - break; - case 0x4e: - case 0x5e: - /* Skylake. */ - case 0x8e: - case 0x9e: - /* Kaby Lake. */ - case 0xa5: - case 0xa6: - /* Comet Lake. */ - cpu = "skylake"; - CHECK___builtin_cpu_is ("corei7"); - CHECK___builtin_cpu_is ("skylake"); - cpu_model->__cpu_type = INTEL_COREI7; - cpu_model->__cpu_subtype = INTEL_COREI7_SKYLAKE; - break; - case 0xa7: - /* Rocket Lake. */ - cpu = "rocketlake"; - CHECK___builtin_cpu_is ("corei7"); - CHECK___builtin_cpu_is ("rocketlake"); - cpu_model->__cpu_type = INTEL_COREI7; - cpu_model->__cpu_subtype = INTEL_COREI7_ROCKETLAKE; - break; - case 0x55: - CHECK___builtin_cpu_is ("corei7"); - cpu_model->__cpu_type = INTEL_COREI7; - if (has_cpu_feature (cpu_model, cpu_features2, - FEATURE_AVX512BF16)) - { - /* Cooper Lake. */ - cpu = "cooperlake"; - CHECK___builtin_cpu_is ("cooperlake"); - cpu_model->__cpu_subtype = INTEL_COREI7_COOPERLAKE; - } - else if (has_cpu_feature (cpu_model, cpu_features2, - FEATURE_AVX512VNNI)) - { - /* Cascade Lake. */ - cpu = "cascadelake"; - CHECK___builtin_cpu_is ("cascadelake"); - cpu_model->__cpu_subtype = INTEL_COREI7_CASCADELAKE; - } - else - { - /* Skylake with AVX-512 support. */ - cpu = "skylake-avx512"; - CHECK___builtin_cpu_is ("skylake-avx512"); - cpu_model->__cpu_subtype = INTEL_COREI7_SKYLAKE_AVX512; - } - break; - case 0x66: - /* Cannon Lake. */ - cpu = "cannonlake"; - CHECK___builtin_cpu_is ("corei7"); - CHECK___builtin_cpu_is ("cannonlake"); - cpu_model->__cpu_type = INTEL_COREI7; - cpu_model->__cpu_subtype = INTEL_COREI7_CANNONLAKE; - break; - case 0x6a: - case 0x6c: - /* Ice Lake server. */ - cpu = "icelake-server"; - CHECK___builtin_cpu_is ("corei7"); - CHECK___builtin_cpu_is ("icelake-server"); - cpu_model->__cpu_type = INTEL_COREI7; - cpu_model->__cpu_subtype = INTEL_COREI7_ICELAKE_SERVER; - break; - case 0x7e: - case 0x7d: - case 0x9d: - /* Ice Lake client. */ - cpu = "icelake-client"; - CHECK___builtin_cpu_is ("corei7"); - CHECK___builtin_cpu_is ("icelake-client"); - cpu_model->__cpu_type = INTEL_COREI7; - cpu_model->__cpu_subtype = INTEL_COREI7_ICELAKE_CLIENT; - break; - case 0x8c: - case 0x8d: - /* Tiger Lake. */ - cpu = "tigerlake"; - CHECK___builtin_cpu_is ("corei7"); - CHECK___builtin_cpu_is ("tigerlake"); - cpu_model->__cpu_type = INTEL_COREI7; - cpu_model->__cpu_subtype = INTEL_COREI7_TIGERLAKE; - break; - - case 0xbe: - /* Alder Lake N, E-core only. */ - case 0x97: - case 0x9a: - /* Alder Lake. */ - case 0xb7: - case 0xba: - case 0xbf: - /* Raptor Lake. */ - case 0xaa: - case 0xac: - /* Meteor Lake. */ - cpu = "alderlake"; - CHECK___builtin_cpu_is ("corei7"); - CHECK___builtin_cpu_is ("alderlake"); - cpu_model->__cpu_type = INTEL_COREI7; - cpu_model->__cpu_subtype = INTEL_COREI7_ALDERLAKE; - break; - case 0x8f: - /* Sapphire Rapids. */ - case 0xcf: - /* Emerald Rapids. */ - cpu = "sapphirerapids"; - CHECK___builtin_cpu_is ("corei7"); - CHECK___builtin_cpu_is ("sapphirerapids"); - cpu_model->__cpu_type = INTEL_COREI7; - cpu_model->__cpu_subtype = INTEL_COREI7_SAPPHIRERAPIDS; - break; - case 0xaf: - /* Sierra Forest. */ - cpu = "sierraforest"; - CHECK___builtin_cpu_is ("sierraforest"); - cpu_model->__cpu_type = INTEL_SIERRAFOREST; - break; - case 0xad: - /* Granite Rapids. */ - cpu = "graniterapids"; - CHECK___builtin_cpu_is ("corei7"); - CHECK___builtin_cpu_is ("graniterapids"); - cpu_model->__cpu_type = INTEL_COREI7; - cpu_model->__cpu_subtype = INTEL_COREI7_GRANITERAPIDS; - break; - case 0xae: - /* Granite Rapids D. */ - cpu = "graniterapids-d"; - CHECK___builtin_cpu_is ("corei7"); - CHECK___builtin_cpu_is ("graniterapids-d"); - cpu_model->__cpu_type = INTEL_COREI7; - cpu_model->__cpu_subtype = INTEL_COREI7_GRANITERAPIDS_D; - break; - case 0xb6: - /* Grand Ridge. */ - cpu = "grandridge"; - CHECK___builtin_cpu_is ("grandridge"); - cpu_model->__cpu_type = INTEL_GRANDRIDGE; - break; - case 0xc5: - /* Arrow Lake. */ - cpu = "arrowlake"; - CHECK___builtin_cpu_is ("corei7"); - CHECK___builtin_cpu_is ("arrowlake"); - cpu_model->__cpu_type = INTEL_COREI7; - cpu_model->__cpu_subtype = INTEL_COREI7_ARROWLAKE; - break; - case 0xc6: - /* Arrow Lake S. */ - case 0xbd: - /* Lunar Lake. */ - cpu = "arrowlake-s"; - CHECK___builtin_cpu_is ("corei7"); - CHECK___builtin_cpu_is ("arrowlake-s"); - cpu_model->__cpu_type = INTEL_COREI7; - cpu_model->__cpu_subtype = INTEL_COREI7_ARROWLAKE_S; - break; - case 0xdd: - /* Clearwater Forest. */ - cpu = "clearwaterforest"; - CHECK___builtin_cpu_is ("clearwaterforest"); - cpu_model->__cpu_type = INTEL_CLEARWATERFOREST; - break; - case 0xcc: - /* Panther Lake. */ - cpu = "pantherlake"; - CHECK___builtin_cpu_is ("corei7"); - CHECK___builtin_cpu_is ("pantherlake"); - cpu_model->__cpu_type = INTEL_COREI7; - cpu_model->__cpu_subtype = INTEL_COREI7_PANTHERLAKE; - break; - case 0x17: - case 0x1d: - /* Penryn. */ - case 0x0f: - /* Merom. */ - cpu = "core2"; - CHECK___builtin_cpu_is ("core2"); - cpu_model->__cpu_type = INTEL_CORE2; - break; - default: - break; - } + /* Parse family and model for family 0x6. */ + if (cpu_model2->__cpu_family == 0x6) + switch (cpu_model2->__cpu_model) + { + case 0x1c: + case 0x26: + /* Bonnell. */ + cpu = "bonnell"; + CHECK___builtin_cpu_is ("atom"); + cpu_model->__cpu_type = INTEL_BONNELL; + break; + case 0x37: + case 0x4a: + case 0x4d: + case 0x5d: + /* Silvermont. */ + case 0x4c: + case 0x5a: + case 0x75: + /* Airmont. */ + cpu = "silvermont"; + CHECK___builtin_cpu_is ("silvermont"); + cpu_model->__cpu_type = INTEL_SILVERMONT; + break; + case 0x5c: + case 0x5f: + /* Goldmont. */ + cpu = "goldmont"; + CHECK___builtin_cpu_is ("goldmont"); + cpu_model->__cpu_type = INTEL_GOLDMONT; + break; + case 0x7a: + /* Goldmont Plus. */ + cpu = "goldmont-plus"; + CHECK___builtin_cpu_is ("goldmont-plus"); + cpu_model->__cpu_type = INTEL_GOLDMONT_PLUS; + break; + case 0x86: + case 0x96: + case 0x9c: + /* Tremont. */ + cpu = "tremont"; + CHECK___builtin_cpu_is ("tremont"); + cpu_model->__cpu_type = INTEL_TREMONT; + break; + case 0x17: + case 0x1d: + /* Penryn. */ + case 0x0f: + /* Merom. */ + cpu = "core2"; + CHECK___builtin_cpu_is ("core2"); + cpu_model->__cpu_type = INTEL_CORE2; + break; + case 0x1a: + case 0x1e: + case 0x1f: + case 0x2e: + /* Nehalem. */ + cpu = "nehalem"; + CHECK___builtin_cpu_is ("corei7"); + CHECK___builtin_cpu_is ("nehalem"); + cpu_model->__cpu_type = INTEL_COREI7; + cpu_model->__cpu_subtype = INTEL_COREI7_NEHALEM; + break; + case 0x25: + case 0x2c: + case 0x2f: + /* Westmere. */ + cpu = "westmere"; + CHECK___builtin_cpu_is ("corei7"); + CHECK___builtin_cpu_is ("westmere"); + cpu_model->__cpu_type = INTEL_COREI7; + cpu_model->__cpu_subtype = INTEL_COREI7_WESTMERE; + break; + case 0x2a: + case 0x2d: + /* Sandy Bridge. */ + cpu = "sandybridge"; + CHECK___builtin_cpu_is ("corei7"); + CHECK___builtin_cpu_is ("sandybridge"); + cpu_model->__cpu_type = INTEL_COREI7; + cpu_model->__cpu_subtype = INTEL_COREI7_SANDYBRIDGE; + break; + case 0x3a: + case 0x3e: + /* Ivy Bridge. */ + cpu = "ivybridge"; + CHECK___builtin_cpu_is ("corei7"); + CHECK___builtin_cpu_is ("ivybridge"); + cpu_model->__cpu_type = INTEL_COREI7; + cpu_model->__cpu_subtype = INTEL_COREI7_IVYBRIDGE; + break; + case 0x3c: + case 0x3f: + case 0x45: + case 0x46: + /* Haswell. */ + cpu = "haswell"; + CHECK___builtin_cpu_is ("corei7"); + CHECK___builtin_cpu_is ("haswell"); + cpu_model->__cpu_type = INTEL_COREI7; + cpu_model->__cpu_subtype = INTEL_COREI7_HASWELL; + break; + case 0x3d: + case 0x47: + case 0x4f: + case 0x56: + /* Broadwell. */ + cpu = "broadwell"; + CHECK___builtin_cpu_is ("corei7"); + CHECK___builtin_cpu_is ("broadwell"); + cpu_model->__cpu_type = INTEL_COREI7; + cpu_model->__cpu_subtype = INTEL_COREI7_BROADWELL; + break; + case 0x4e: + case 0x5e: + /* Skylake. */ + case 0x8e: + case 0x9e: + /* Kaby Lake. */ + case 0xa5: + case 0xa6: + /* Comet Lake. */ + cpu = "skylake"; + CHECK___builtin_cpu_is ("corei7"); + CHECK___builtin_cpu_is ("skylake"); + cpu_model->__cpu_type = INTEL_COREI7; + cpu_model->__cpu_subtype = INTEL_COREI7_SKYLAKE; + break; + case 0x55: + CHECK___builtin_cpu_is ("corei7"); + cpu_model->__cpu_type = INTEL_COREI7; + if (has_cpu_feature (cpu_model, cpu_features2, + FEATURE_AVX512BF16)) + { + /* Cooper Lake. */ + cpu = "cooperlake"; + CHECK___builtin_cpu_is ("cooperlake"); + cpu_model->__cpu_subtype = INTEL_COREI7_COOPERLAKE; + } + else if (has_cpu_feature (cpu_model, cpu_features2, + FEATURE_AVX512VNNI)) + { + /* Cascade Lake. */ + cpu = "cascadelake"; + CHECK___builtin_cpu_is ("cascadelake"); + cpu_model->__cpu_subtype = INTEL_COREI7_CASCADELAKE; + } + else + { + /* Skylake with AVX-512 support. */ + cpu = "skylake-avx512"; + CHECK___builtin_cpu_is ("skylake-avx512"); + cpu_model->__cpu_subtype = INTEL_COREI7_SKYLAKE_AVX512; + } + break; + case 0x66: + /* Cannon Lake. */ + cpu = "cannonlake"; + CHECK___builtin_cpu_is ("corei7"); + CHECK___builtin_cpu_is ("cannonlake"); + cpu_model->__cpu_type = INTEL_COREI7; + cpu_model->__cpu_subtype = INTEL_COREI7_CANNONLAKE; + break; + case 0x7e: + case 0x7d: + case 0x9d: + /* Ice Lake client. */ + cpu = "icelake-client"; + CHECK___builtin_cpu_is ("corei7"); + CHECK___builtin_cpu_is ("icelake-client"); + cpu_model->__cpu_type = INTEL_COREI7; + cpu_model->__cpu_subtype = INTEL_COREI7_ICELAKE_CLIENT; + break; + case 0x6a: + case 0x6c: + /* Ice Lake server. */ + cpu = "icelake-server"; + CHECK___builtin_cpu_is ("corei7"); + CHECK___builtin_cpu_is ("icelake-server"); + cpu_model->__cpu_type = INTEL_COREI7; + cpu_model->__cpu_subtype = INTEL_COREI7_ICELAKE_SERVER; + break; + case 0xa7: + /* Rocket Lake. */ + cpu = "rocketlake"; + CHECK___builtin_cpu_is ("corei7"); + CHECK___builtin_cpu_is ("rocketlake"); + cpu_model->__cpu_type = INTEL_COREI7; + cpu_model->__cpu_subtype = INTEL_COREI7_ROCKETLAKE; + break; + case 0x8c: + case 0x8d: + /* Tiger Lake. */ + cpu = "tigerlake"; + CHECK___builtin_cpu_is ("corei7"); + CHECK___builtin_cpu_is ("tigerlake"); + cpu_model->__cpu_type = INTEL_COREI7; + cpu_model->__cpu_subtype = INTEL_COREI7_TIGERLAKE; + break; + case 0xbe: + /* Alder Lake N, E-core only. */ + case 0x97: + case 0x9a: + /* Alder Lake. */ + case 0xb7: + case 0xba: + case 0xbf: + /* Raptor Lake. */ + case 0xaa: + case 0xac: + /* Meteor Lake. */ + cpu = "alderlake"; + CHECK___builtin_cpu_is ("corei7"); + CHECK___builtin_cpu_is ("alderlake"); + cpu_model->__cpu_type = INTEL_COREI7; + cpu_model->__cpu_subtype = INTEL_COREI7_ALDERLAKE; + break; + case 0x8f: + /* Sapphire Rapids. */ + case 0xcf: + /* Emerald Rapids. */ + cpu = "sapphirerapids"; + CHECK___builtin_cpu_is ("corei7"); + CHECK___builtin_cpu_is ("sapphirerapids"); + cpu_model->__cpu_type = INTEL_COREI7; + cpu_model->__cpu_subtype = INTEL_COREI7_SAPPHIRERAPIDS; + break; + case 0xaf: + /* Sierra Forest. */ + cpu = "sierraforest"; + CHECK___builtin_cpu_is ("sierraforest"); + cpu_model->__cpu_type = INTEL_SIERRAFOREST; + break; + case 0xad: + /* Granite Rapids. */ + cpu = "graniterapids"; + CHECK___builtin_cpu_is ("corei7"); + CHECK___builtin_cpu_is ("graniterapids"); + cpu_model->__cpu_type = INTEL_COREI7; + cpu_model->__cpu_subtype = INTEL_COREI7_GRANITERAPIDS; + break; + case 0xae: + /* Granite Rapids D. */ + cpu = "graniterapids-d"; + CHECK___builtin_cpu_is ("corei7"); + CHECK___builtin_cpu_is ("graniterapids-d"); + cpu_model->__cpu_type = INTEL_COREI7; + cpu_model->__cpu_subtype = INTEL_COREI7_GRANITERAPIDS_D; + break; + case 0xb6: + /* Grand Ridge. */ + cpu = "grandridge"; + CHECK___builtin_cpu_is ("grandridge"); + cpu_model->__cpu_type = INTEL_GRANDRIDGE; + break; + case 0xc5: + /* Arrow Lake. */ + cpu = "arrowlake"; + CHECK___builtin_cpu_is ("corei7"); + CHECK___builtin_cpu_is ("arrowlake"); + cpu_model->__cpu_type = INTEL_COREI7; + cpu_model->__cpu_subtype = INTEL_COREI7_ARROWLAKE; + break; + case 0xc6: + /* Arrow Lake S. */ + case 0xbd: + /* Lunar Lake. */ + cpu = "arrowlake-s"; + CHECK___builtin_cpu_is ("corei7"); + CHECK___builtin_cpu_is ("arrowlake-s"); + cpu_model->__cpu_type = INTEL_COREI7; + cpu_model->__cpu_subtype = INTEL_COREI7_ARROWLAKE_S; + break; + case 0xdd: + /* Clearwater Forest. */ + cpu = "clearwaterforest"; + CHECK___builtin_cpu_is ("clearwaterforest"); + cpu_model->__cpu_type = INTEL_CLEARWATERFOREST; + break; + case 0xcc: + /* Panther Lake. */ + cpu = "pantherlake"; + CHECK___builtin_cpu_is ("corei7"); + CHECK___builtin_cpu_is ("pantherlake"); + cpu_model->__cpu_type = INTEL_COREI7; + cpu_model->__cpu_subtype = INTEL_COREI7_PANTHERLAKE; + break; + default: + break; + } return cpu; }