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Date: Mon, 14 Oct 2024 18:31:06 +0800 Message-ID: <20241014103106.2805721-1-chenyangyu@isrc.iscas.ac.cn> X-Mailer: git-send-email 2.45.2 MIME-Version: 1.0 X-CM-TRANSID: zQCowAC3nmXs8gxnx+deBw--.27582S2 X-Coremail-Antispam: 1UD129KBjvJXoW7WFWxAF17Kryftr4kAF1rXrb_yoW8Ar17pF saq34jkr1kJrn3ua93tryrXw4rAr9Yya1fJr4qkw15AFZxAryfXrnxCw1fZr1DX3yrZr43 ur4jkr1UZw47ZaDanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUkG14x267AKxVWUJVW8JwAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK02 1l84ACjcxK6xIIjxv20xvE14v26r1j6r1xM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26r4j 6F4UM28EF7xvwVC2z280aVAFwI0_Gr0_Cr1l84ACjcxK6I8E87Iv6xkF7I0E14v26r4j6r 4UJwAS0I0E0xvYzxvE52x082IY62kv0487Mc02F40EFcxC0VAKzVAqx4xG6I80ewAv7VC0 I7IYx2IY67AKxVWUGVWUXwAv7VC2z280aVAFwI0_Jr0_Gr1lOx8S6xCaFVCjc4AY6r1j6r 4UM4x0Y48IcxkI7VAKI48JM4x0x7Aq67IIx4CEVc8vx2IErcIFxwCY1x0262kKe7AKxVWU AVWUtwCF04k20xvY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14 v26r1j6r18MI8I3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_JF0_Jw1lIxkG c2Ij64vIr41lIxAIcVC0I7IYx2IY67AKxVWUJVWUCwCI42IY6xIIjxv20xvEc7CjxVAFwI 0_Gr0_Cr1lIxAIcVCF04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r1j6r4U MIIF0xvEx4A2jsIEc7CjxVAFwI0_Gr0_Gr1UYxBIdaVFxhVjvjDU0xZFpf9x0JUBmhwUUU UU= X-Originating-IP: [120.41.211.70] X-CM-SenderInfo: xfkh055dqj53w6lv2u4olvutnvoduhdfq/ X-Spam-Status: No, score=-12.3 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, RCVD_IN_DNSWL_NONE, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org In some cases, we don't need to handle implied extensions. Add detailed comments to help developers understand what implied ISAs should be considered. libgcc/ChangeLog: * config/riscv/feature_bits.c (__init_riscv_features_bits_linux): Add detailed comments on processing implied extensions. Signed-off-by: Yangyu Chen --- libgcc/config/riscv/feature_bits.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/libgcc/config/riscv/feature_bits.c b/libgcc/config/riscv/feature_bits.c index 9bdbc466fee..a90e553b83d 100644 --- a/libgcc/config/riscv/feature_bits.c +++ b/libgcc/config/riscv/feature_bits.c @@ -290,9 +290,12 @@ static void __init_riscv_features_bits_linux () } const struct riscv_hwprobe hwprobe_ima_ext = hwprobes[4]; - /* Every time we add new extensions, we should check if previous extensions - imply the new extension and set the corresponding bit. */ + imply the new extension and set the corresponding bit. + We don't need to handle cases where: + 1. The new extension implies a previous extension (e.g., Zve32f -> F). + 2. The extensions imply some other extensions appear in the same release + version of Linux Kernel (e.g., Zbc - > Zbkc). */ if (hwprobe_ima_ext.value & RISCV_HWPROBE_IMA_FD) { @@ -397,7 +400,7 @@ __init_riscv_feature_bits () #ifdef __linux __init_riscv_features_bits_linux (); #else - /* Unsupported, just initlizaed that into all zeros. */ + /* Unsupported, just initialize that into all zeros. */ __riscv_feature_bits.length = 0; __riscv_vendor_feature_bits.length = 0; __riscv_cpu_model.mvendorid = 0;