From patchwork Tue Oct 1 20:44:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mikhail Kshevetskiy X-Patchwork-Id: 1991715 X-Patchwork-Delegate: dario.binacchi@amarulasolutions.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=iopsys.eu header.i=@iopsys.eu header.a=rsa-sha256 header.s=selector2 header.b=P9oHi0x2; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4XJ91Q2KcQz1xt1 for ; Wed, 2 Oct 2024 06:45:14 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id F2CB2892C1; Tue, 1 Oct 2024 22:44:58 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=reject dis=none) header.from=iopsys.eu Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=iopsys.eu header.i=@iopsys.eu header.b="P9oHi0x2"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id AC122892B1; Tue, 1 Oct 2024 22:44:57 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_PASS,SPF_PASS autolearn=no autolearn_force=no version=3.4.2 Received: from EUR05-AM6-obe.outbound.protection.outlook.com (mail-am6eur05on20709.outbound.protection.outlook.com [IPv6:2a01:111:f403:2612::709]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 8EBF089253 for ; Tue, 1 Oct 2024 22:44:55 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=reject dis=none) header.from=iopsys.eu Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=mikhail.kshevetskiy@genexis.eu ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=CFjRU2TRvJr2JIxdiYqm1DnoULdH0jbvWLIZq4eaflm/UGfajbzaULRpIv8ZbdneIrm9rfXNBZrI825xFd92J8Q/reKId6vfuiJu6dE4DKTcyq4B6Nrb/xqQ39qjhjRFMGBQmeeY9Ntg70FsnMVPDDPZn/kj1xFY5O80UQ4s8KdP91yikMinuQ3T6rdLBiaRSUwsfre4bScOT2spgJVgfb3rN7fo2Y+UsJ11L34hMc3J4wjWV9tz2vsUmgv6mbHMSI21Bim1O/M4gliQl6mtQ7ybXvQ7nzkb6WvtHjJrxS4a7f/mfZDXkLDD5iF2sNoZAhvMDSWybU1PSw70DXWplw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=gc3PGIU49z6TqucUdkvmYhM0WGxnEKiaTwANKLpDjP4=; b=LU62rTzsFu976gpDBH/fmRYW+s50r2XrP+w+NyrEF9tDzDMgdRvRYKzTsUTSnem0nTRAjcN6Yd03Jo0tLmAEYq1/DytjVCH3tcv0t3Hz04AazBQL0wFbikLV449lefq0/n8pm4fm/qdESJm3IvdP3K3F+4eXUlNIJ9JFDeHdlVpbdxATUYveWlIi3o+BDtF9Kr1182p//ZxU8s9IEdfE0Pm9xlzqwgUiWijSAtiiEc5aoIu1yzK2y5Fks4AXSfd+ghsyrPuAo8lDVkjnoX2cyVn20G3Nc3KklJvyBApXqTm8KufuB2yaXlU6uOuRC5/6cGxGRQYDstNtgjH/PpSH+A== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=genexis.eu; dmarc=pass action=none header.from=iopsys.eu; dkim=pass header.d=iopsys.eu; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=iopsys.eu; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=gc3PGIU49z6TqucUdkvmYhM0WGxnEKiaTwANKLpDjP4=; b=P9oHi0x2cEAFGYwC5b/DVuAGJVtbMG4McLAVsHtH2T1Kowff5m1CZwnqop9EvQi7vQyBzkqez3y8hZYWhmBbsaMy+JEoLiSfovGJcsurOqK+kFMIu9J+Y6VGkUw5pRud5l5BKdVoB2FQmvlGW74dthQi33DP42Xkl3ej+5DuXzpgL48Q4LZ+dCPbt/lThBeZre7N/kp+dnimmNuE31dROracUNtgkoFSEXC7FYElWYBgTAf9sduJbSAOa/y+Z2IOPEnX7K3kWSELBPcuC6MWdI8EGcvF5PwtlrJmv/cL1qda/29JStwTcCc9bFKHXfGs+WgbThC6/d96XlPox6mAJw== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=iopsys.eu; Received: from GV2PR08MB8121.eurprd08.prod.outlook.com (2603:10a6:150:7d::22) by DB9PR08MB6539.eurprd08.prod.outlook.com (2603:10a6:10:23f::17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8026.15; Tue, 1 Oct 2024 20:44:53 +0000 Received: from GV2PR08MB8121.eurprd08.prod.outlook.com ([fe80::4cd3:da80:2532:daa0]) by GV2PR08MB8121.eurprd08.prod.outlook.com ([fe80::4cd3:da80:2532:daa0%2]) with mapi id 15.20.8026.014; Tue, 1 Oct 2024 20:44:53 +0000 From: Mikhail Kshevetskiy To: Tom Rini , Dario Binacchi , Michael Trimarchi , Frieder Schrempf , Jagan Teki , Mikhail Kshevetskiy , William Zhang , Dmitry Rokosov , Igor Prusov , Bruce Suen , Alexey Romanov , Chuanhong Guo , Martin Kurbanov , Miquel Raynal , Max Krummenacher , Francesco Dolcini , u-boot@lists.denx.de Subject: [RESEND PATCH v4 01/10] mtd: spinand: Use the spi-mem dirmap API Date: Tue, 1 Oct 2024 23:44:33 +0300 Message-ID: <20241001204444.917238-2-mikhail.kshevetskiy@iopsys.eu> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241001204444.917238-1-mikhail.kshevetskiy@iopsys.eu> References: <20241001204444.917238-1-mikhail.kshevetskiy@iopsys.eu> X-ClientProxiedBy: GVX0EPF00011B5E.SWEP280.PROD.OUTLOOK.COM (2603:10a6:144:1:0:8:0:16) To GV2PR08MB8121.eurprd08.prod.outlook.com (2603:10a6:150:7d::22) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: GV2PR08MB8121:EE_|DB9PR08MB6539:EE_ X-MS-Office365-Filtering-Correlation-Id: 1ae135c0-8497-4ddb-9d30-08dce259e6d2 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|376014|366016|7416014|52116014|1800799024|921020|38350700014; X-Microsoft-Antispam-Message-Info: +gzbGTa+BKNKL3t5APHyeLtEZv9a7hyHqiIrk2qhj86dd/XERvpEx87BHKRI4FfuYsTrtPlPM+a24G+XEOcd9dfd/+H0TfRoiqRykjhbXgV0O3tUW0RyqD3muMOnJc8jtJY+AFelOu/E3+JuLFCRzr4Q34FMMtdnIiNiL7SqNgEFdAy0UErZuA8ZaLuLdnl26s1XPEb0czMAaT6cG7uoLatUczJ8cSsXLgz3TH3MmfKyeFsbGU81ia7Rs2UCNYCW9M0BaoGBkr9ehyIq5W/U+JmK0YBeOUbtPiWtrlUpRE0+uTTkMpnofEhRPgfu/hWKxok5Gx4XSnJFxD8dGSkJnCquY2bK6Bw8Uw4EL9ABK065phmAKTEVijoORdgXGgBPsztEdn5yblDanJ6G6wtC98eKy9zdFKYnbGNX+i8RZdyvRV24rs2WRYuf5T6JEehRoRhy4WhN34BE70JYbNCMqJmtRg+DOIIFgC3A65rBdSdN2wzZyqbZjlVl9ni2ZS3qx2ynR8eKCtFwpzkJyc2mDkbX1qKqjwPy8ebQkn7PAFhjBpGT3+gywzn7onqRC4cr0ie5DmAGM/EDEs+EvmUIvOg5xLfF+OAf12w2uBfP3iRtLA/r2llMfpilEFWuL2rkz/YZ2qyhCd2aUn3X36olEakuqGqjKuz79GAdBU5l0bjCzDgcC6fr0EcHDNCo7vcSelYUcENPI3CTkf16a57kfY5yqzr3aBCO8gIyDS3Beq91uO5bVghTtuY4fmuNa5Q25CO2oLxCq84YxbRLFVdPZ4WxdxCBVO4vJqNX+edjNGzHnvBU/5LbWh4a8ZmQeo0mrzY2VnN/oMyGYRrHZdndj2KxhC5pf7+hNsRR0ZURDn4J3eqc/X+M58nMvLo6TU2ADnROI0UY5l2NEGG7kWJOfA0C793F6OxajV277KUuwksbQ5Y0DaOoP3psHwWyY74VMV/YGsRyy5V93Y2RiWfxAiQfy0CmvY6IMS1wZFUv9I24kPjWD2Y86a10EOZeNkc7MX1pu+qhI/sOWpuK0LhEahJoZuNjJKLJ1/BMRYkn9FI066OFdeDt3Ve2AnxpwPaJoabuFddZZWes/snTy8DTHUw+C1L02BPeXbQM0QFyD8dCyItB3RCKPbXQ6gItmY1HbLy282CgF0vaZkzUGgqBDiQ0O7m1R6UrE9Z+ik+7quenipcDUZVLRhTxzK/tcvHhOhVFrhrcRph2LkcMoHyMhefiG/Hq163bv1KPVNzOSPe7Ymzb+O+HFTNW7ats5fQnTu/2c84udQ5fM+xPar5LiGAyFqYHEFkVQOKXO5uzPWXEDkrWIEmVDrEYmXbF7gwesmm2qyL0Yyk+TMWECzsxdr1XRJT9sWZ9uc0AyIDBrXM= X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:GV2PR08MB8121.eurprd08.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230040)(376014)(366016)(7416014)(52116014)(1800799024)(921020)(38350700014); DIR:OUT; SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: whK5q0QRAY0LEuiTR2JZpxTGTkpZHeKiOUc0TPMAD+EEuSwz5RPLSSmrsX80L3gN/juymgzxvUrf1vl/H9UASp//FsCE0dmLNrj+ZOHY/7Xv0WwN1OXZdVB7hk6DssmlQQtoFZKkrdtTuinzhaxzHIAl0JgLB2bE4+w3g2q9BwgtmJYXCk/RPh6mHFfmV2xQqXEpsgls8TyTSpJOB4ezr38M4K3FqnQKjmeIiW9+9bt5I//6wNvYVI50X4JhC1+jQfj/M+BMhNTYsPsLPq7khXVn3DfUOpg/RhT8OIWxLIytIGhECt8sqjZIULPDS0dxwa2la+IFFYezRnuE7NaosMq5ab02qWjUSXFfun/cF9c5P6oTQR0RhjvC/mRBMSZNCggsq4moKYiV67eHS5056PFsYnFLi1sJz/Q+gBClVXVS/UGwbpF6Da92x1aGNuY7Wur6tLDfVd6z/1T9uKRjXvkNWWu0fynYgFjKsiXoF014NCAgeYm8GS629EBIOoavJtZVjXW9/H5JuL/Y8pB+TWkd6++83dhCu/xgpjPdWCEH8Cxzeo5wubmyaMOOs8iw+b+O+rPuE99TNtI2BjMhvJpQ/e3zpCzsPJpU05YPaglnSMyUWIIfPOpumKEmBAcKOomB8cwWdH+WAHXQS3fxYOM2Ivmy3icBKhwdt8O8Tpr3zfPEhzq4Gp5QNI/7pMM6CT86yU9WGP/f3Dt2rFL3stabkrO474J6t07nVVrxx2a6NrcD4II3wH96O8oUb8EN6cQZMVZWQTm3uxFfCwmNITCJbX7BzYVwx363wFMOEAHWSxVXqGwaXOVJ4chpLZgugHifim/TlSZNp2gbCpG+RpWW0RI3x0/EM3PKqJr9DK8qpRW8UbOTeA2ppUIksplNyxdvOtG10PY7dNTXR3cV7fSB2i2BH1zTYximjxTBcGv+2ZypiIAdlDd8DRQ8dTZJ4gMr7i/OvUTc54+S3AxFB2HX6Y3nqq4dIAFF1QIoUJHLE5U+nyk1+Ld4hJB3gugDomqEX0oLUYtB0HOag1EVccJAEAg+wGNze1aNuVXMP5aBO+GWvZzyoA0xzrFP3UkaT4UdAN8wrsBXj7/i/+zC1guEDpa68yF80b2QS8hw+F6agqxS4YiktI6AV7ChJIBwteEeyE9wG7rZObVbJ30Po2mJq0o6tIwOq4aWW64QV7peHALr/Bt7p1qjyJBNJsWvbr9mJE9Wz6QqWqu7i1JtAkVnPBBla8Y8anF6MUoGKCSPayiA+rEfjTv7ZUh7/SfSww30XYSHi6ShHfPlPEEV41whSKeDoqBjliiEmtu0Bo+vMARoQaMxJtIRhPoxSjvmbpJGZUDT3ROWH6sA1sce6OSVrISJrJ0qkS7SU/8AVnp4IhtsW0UNPy5mHGWyzdwZfRF5I26BX2m2G1bInkXxMiBwLaGv8fkyfxUOY1RzKf5ad0Ls0elj0kuBe0mAaMxg92UgLrH7tCYjDtUvMqRaYlOEEP3WIJTX6OJj3KGXZs1Ctkse0NgZxVeN32InIBn/9xqYvU2EoBoYW3me+kpI00fhYGTeg1Vx3x/Zel3EQ4EvtURk88E66cE0A0Y7GuK7wxRJ16uE4UfEoV5syIBjT6jXAjJB2wauBK7LSYgcLZ0= X-OriginatorOrg: iopsys.eu X-MS-Exchange-CrossTenant-Network-Message-Id: 1ae135c0-8497-4ddb-9d30-08dce259e6d2 X-MS-Exchange-CrossTenant-AuthSource: GV2PR08MB8121.eurprd08.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Oct 2024 20:44:53.4039 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 8d891be1-7bce-4216-9a99-bee9de02ba58 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: zAUER+lTtEqO/MeLMDfm7e5WiPE3bqgDWigDvUejlXdJsNHtqbCpP8HZS/Umy1l2M7XuhKNB6bPsNWPvfuGj8xF88M8pW7xUAN5QtrGha94= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR08MB6539 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Make use of the spi-mem direct mapping API to let advanced controllers optimize read/write operations when they support direct mapping. This is a port of linux patch 981d1aa0697ce1393e00933f154d181e965703d0 created by Boris Brezillon . Signed-off-by: Mikhail Kshevetskiy --- drivers/mtd/nand/spi/core.c | 185 +++++++++++++++++------------------- include/linux/mtd/spinand.h | 7 ++ 2 files changed, 95 insertions(+), 97 deletions(-) diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c index f5ddfbf4b83..ea00cd7dcf0 100644 --- a/drivers/mtd/nand/spi/core.c +++ b/drivers/mtd/nand/spi/core.c @@ -41,21 +41,6 @@ struct spinand_plat { /* SPI NAND index visible in MTD names */ static int spi_nand_idx; -static void spinand_cache_op_adjust_colum(struct spinand_device *spinand, - const struct nand_page_io_req *req, - u16 *column) -{ - struct nand_device *nand = spinand_to_nand(spinand); - unsigned int shift; - - if (nand->memorg.planes_per_lun < 2) - return; - - /* The plane number is passed in MSB just above the column address */ - shift = fls(nand->memorg.pagesize); - *column |= req->pos.plane << shift; -} - static int spinand_read_reg_op(struct spinand_device *spinand, u8 reg, u8 *val) { struct spi_mem_op op = SPINAND_GET_FEATURE_OP(reg, @@ -249,27 +234,21 @@ static int spinand_load_page_op(struct spinand_device *spinand, static int spinand_read_from_cache_op(struct spinand_device *spinand, const struct nand_page_io_req *req) { - struct spi_mem_op op = *spinand->op_templates.read_cache; struct nand_device *nand = spinand_to_nand(spinand); struct mtd_info *mtd = nanddev_to_mtd(nand); - struct nand_page_io_req adjreq = *req; + struct spi_mem_dirmap_desc *rdesc; unsigned int nbytes = 0; void *buf = NULL; u16 column = 0; - int ret; + ssize_t ret; if (req->datalen) { - adjreq.datalen = nanddev_page_size(nand); - adjreq.dataoffs = 0; - adjreq.databuf.in = spinand->databuf; buf = spinand->databuf; - nbytes = adjreq.datalen; + nbytes = nanddev_page_size(nand); + column = 0; } if (req->ooblen) { - adjreq.ooblen = nanddev_per_page_oobsize(nand); - adjreq.ooboffs = 0; - adjreq.oobbuf.in = spinand->oobbuf; nbytes += nanddev_per_page_oobsize(nand); if (!buf) { buf = spinand->oobbuf; @@ -277,28 +256,19 @@ static int spinand_read_from_cache_op(struct spinand_device *spinand, } } - spinand_cache_op_adjust_colum(spinand, &adjreq, &column); - op.addr.val = column; + rdesc = spinand->dirmaps[req->pos.plane].rdesc; - /* - * Some controllers are limited in term of max RX data size. In this - * case, just repeat the READ_CACHE operation after updating the - * column. - */ while (nbytes) { - op.data.buf.in = buf; - op.data.nbytes = nbytes; - ret = spi_mem_adjust_op_size(spinand->slave, &op); - if (ret) + ret = spi_mem_dirmap_read(rdesc, column, nbytes, buf); + if (ret < 0) return ret; - ret = spi_mem_exec_op(spinand->slave, &op); - if (ret) - return ret; + if (!ret || ret > nbytes) + return -EIO; - buf += op.data.nbytes; - nbytes -= op.data.nbytes; - op.addr.val += op.data.nbytes; + nbytes -= ret; + column += ret; + buf += ret; } if (req->datalen) @@ -322,14 +292,12 @@ static int spinand_read_from_cache_op(struct spinand_device *spinand, static int spinand_write_to_cache_op(struct spinand_device *spinand, const struct nand_page_io_req *req) { - struct spi_mem_op op = *spinand->op_templates.write_cache; struct nand_device *nand = spinand_to_nand(spinand); struct mtd_info *mtd = nanddev_to_mtd(nand); - struct nand_page_io_req adjreq = *req; - unsigned int nbytes = 0; - void *buf = NULL; - u16 column = 0; - int ret; + struct spi_mem_dirmap_desc *wdesc; + unsigned int nbytes, column = 0; + void *buf = spinand->databuf; + ssize_t ret; /* * Looks like PROGRAM LOAD (AKA write cache) does not necessarily reset @@ -338,19 +306,12 @@ static int spinand_write_to_cache_op(struct spinand_device *spinand, * the data portion of the page, otherwise we might corrupt the BBM or * user data previously programmed in OOB area. */ - memset(spinand->databuf, 0xff, - nanddev_page_size(nand) + - nanddev_per_page_oobsize(nand)); + nbytes = nanddev_page_size(nand) + nanddev_per_page_oobsize(nand); + memset(spinand->databuf, 0xff, nbytes); - if (req->datalen) { + if (req->datalen) memcpy(spinand->databuf + req->dataoffs, req->databuf.out, req->datalen); - adjreq.dataoffs = 0; - adjreq.datalen = nanddev_page_size(nand); - adjreq.databuf.out = spinand->databuf; - nbytes = adjreq.datalen; - buf = spinand->databuf; - } if (req->ooblen) { if (req->mode == MTD_OPS_AUTO_OOB) @@ -361,52 +322,21 @@ static int spinand_write_to_cache_op(struct spinand_device *spinand, else memcpy(spinand->oobbuf + req->ooboffs, req->oobbuf.out, req->ooblen); - - adjreq.ooblen = nanddev_per_page_oobsize(nand); - adjreq.ooboffs = 0; - nbytes += nanddev_per_page_oobsize(nand); - if (!buf) { - buf = spinand->oobbuf; - column = nanddev_page_size(nand); - } } - spinand_cache_op_adjust_colum(spinand, &adjreq, &column); - - op = *spinand->op_templates.write_cache; - op.addr.val = column; + wdesc = spinand->dirmaps[req->pos.plane].wdesc; - /* - * Some controllers are limited in term of max TX data size. In this - * case, split the operation into one LOAD CACHE and one or more - * LOAD RANDOM CACHE. - */ while (nbytes) { - op.data.buf.out = buf; - op.data.nbytes = nbytes; - - ret = spi_mem_adjust_op_size(spinand->slave, &op); - if (ret) - return ret; - - ret = spi_mem_exec_op(spinand->slave, &op); - if (ret) + ret = spi_mem_dirmap_write(wdesc, column, nbytes, buf); + if (ret < 0) return ret; - buf += op.data.nbytes; - nbytes -= op.data.nbytes; - op.addr.val += op.data.nbytes; + if (!ret || ret > nbytes) + return -EIO; - /* - * We need to use the RANDOM LOAD CACHE operation if there's - * more than one iteration, because the LOAD operation resets - * the cache to 0xff. - */ - if (nbytes) { - column = op.addr.val; - op = *spinand->op_templates.update_cache; - op.addr.val = column; - } + nbytes -= ret; + column += ret; + buf += ret; } return 0; @@ -819,6 +749,59 @@ static int spinand_mtd_block_isreserved(struct mtd_info *mtd, loff_t offs) return ret; } +static int spinand_create_dirmap(struct spinand_device *spinand, + unsigned int plane) +{ + struct nand_device *nand = spinand_to_nand(spinand); + struct spi_mem_dirmap_info info = { + .length = nanddev_page_size(nand) + + nanddev_per_page_oobsize(nand), + }; + struct spi_mem_dirmap_desc *desc; + + /* The plane number is passed in MSB just above the column address */ + info.offset = plane << fls(nand->memorg.pagesize); + + info.op_tmpl = *spinand->op_templates.update_cache; + desc = spi_mem_dirmap_create(spinand->slave, &info); + if (IS_ERR(desc)) + return PTR_ERR(desc); + + spinand->dirmaps[plane].wdesc = desc; + + info.op_tmpl = *spinand->op_templates.read_cache; + desc = spi_mem_dirmap_create(spinand->slave, &info); + if (IS_ERR(desc)) { + spi_mem_dirmap_destroy(spinand->dirmaps[plane].wdesc); + return PTR_ERR(desc); + } + + spinand->dirmaps[plane].rdesc = desc; + + return 0; +} + +static int spinand_create_dirmaps(struct spinand_device *spinand) +{ + struct nand_device *nand = spinand_to_nand(spinand); + int i, ret; + + spinand->dirmaps = devm_kzalloc(spinand->slave->dev, + sizeof(*spinand->dirmaps) * + nand->memorg.planes_per_lun, + GFP_KERNEL); + if (!spinand->dirmaps) + return -ENOMEM; + + for (i = 0; i < nand->memorg.planes_per_lun; i++) { + ret = spinand_create_dirmap(spinand, i); + if (ret) + return ret; + } + + return 0; +} + static const struct nand_ops spinand_ops = { .erase = spinand_erase, .markbad = spinand_markbad, @@ -1116,6 +1099,14 @@ static int spinand_init(struct spinand_device *spinand) goto err_free_bufs; } + ret = spinand_create_dirmaps(spinand); + if (ret) { + dev_err(spinand->slave->dev, + "Failed to create direct mappings for read/write operations (err = %d)\n", + ret); + goto err_manuf_cleanup; + } + /* After power up, all blocks are locked, so unlock them here. */ for (i = 0; i < nand->memorg.ntargets; i++) { ret = spinand_select_target(spinand, i); diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h index 13b5a52f8b9..5934b7604cc 100644 --- a/include/linux/mtd/spinand.h +++ b/include/linux/mtd/spinand.h @@ -363,6 +363,11 @@ struct spinand_info { __VA_ARGS__ \ } +struct spinand_dirmap { + struct spi_mem_dirmap_desc *wdesc; + struct spi_mem_dirmap_desc *rdesc; +}; + /** * struct spinand_device - SPI NAND device instance * @base: NAND device instance @@ -406,6 +411,8 @@ struct spinand_device { const struct spi_mem_op *update_cache; } op_templates; + struct spinand_dirmap *dirmaps; + int (*select_target)(struct spinand_device *spinand, unsigned int target); unsigned int cur_target; From patchwork Tue Oct 1 20:44:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mikhail Kshevetskiy X-Patchwork-Id: 1991717 X-Patchwork-Delegate: dario.binacchi@amarulasolutions.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=iopsys.eu header.i=@iopsys.eu header.a=rsa-sha256 header.s=selector2 header.b=cWaFaoKw; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4XJ91s1ZkDz1xt1 for ; Wed, 2 Oct 2024 06:45:37 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id C80EA892CE; Tue, 1 Oct 2024 22:45:00 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=reject dis=none) header.from=iopsys.eu Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=iopsys.eu header.i=@iopsys.eu header.b="cWaFaoKw"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 7884389221; Tue, 1 Oct 2024 22:44:59 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.2 Received: from EUR03-DBA-obe.outbound.protection.outlook.com (mail-dbaeur03on20712.outbound.protection.outlook.com [IPv6:2a01:111:f403:260d::712]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 592CC8928E for ; Tue, 1 Oct 2024 22:44:56 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=reject dis=none) header.from=iopsys.eu Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=mikhail.kshevetskiy@genexis.eu ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=lbC+QyfJHR6xPpt2wxEqxRmnBWwbGlVpDCVwu8LVXhqsi8uQuOJIbmPETq+mwqc5Ntr9kvnUnaHxgDwciR4E1ZTesgRjjOVdswnHGkjsJr1Pzcd37TU4P0nxkjkrafHPH2/mNFXmzcm+xUJlMgEYZzsy6VkQYR7GU0HoBwwd/TwXd6ZdTjILHrwBDbIethtj1OnITvD9zCrddvHGWAI6y4Oohyu+cn0AW7KjwuH0R4zPW2GuWK2GyjgFlnEXeP6zoL9fj1Qiw0YNoYzFqF8G0tjjuvfHsaOF9InF52npCKGFxXN7hAb8QZa99x2QMWl+MKo8Msiphjgds7BqClDofg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=RhnO1yTnFxziEMejN/Hd504ElHxiEG6WbNOmy1FbNTI=; b=skFQH/JDLy/zjOY5su0v3BG31fNNyzaz9cqgCe679sxChf85QEDBfyh6YvJMVAXb3yMjq5SMATSQZuN5qXkwsxrRq3oYwBGlUhVuvC09NzDsYoQddq4A52jgQg4vJHk9uPVHF0p23XRxP7eR/vZD7pNZKniEqVTy/Zdkx/I6NdzsytiXFwZeK7j9IF/6/k6XqypbIAZ2KL+5mo3TSVdHpqoBTC2GtyPxcJ0wfXmRFrv2RCB2mzPJ2yVMn0r0YwWzvSlYMoOuCRaodGM8xJ+bGgXjBcJ9SyIIzzIMf9nx7N6h+/g4rM7xtcbpoT4lkTC2UALnTULmVR6pjdpRPTPaaQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=genexis.eu; dmarc=pass action=none header.from=iopsys.eu; dkim=pass header.d=iopsys.eu; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=iopsys.eu; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=RhnO1yTnFxziEMejN/Hd504ElHxiEG6WbNOmy1FbNTI=; b=cWaFaoKwdQ5L7KotHIbsk/zQ3QK1MCPkkobI8t6kwypdsIPXXIANfQHom27YbSzVgZ+HhlwZlrVTEXo6B8pRMB3CHIRrdPDv06764pj3ZidEcp8eNWVUto8bQSX16Lbf6Ualn/6NqcXrhvdHYnGs38vFaW4Nn1aGKyscINuGJhbTHTzF+cHC8aWnwsu2IZZJ3FYEJoQVxFhe7TqeTi59y3j4Iq6mbuU6XM/q2tEI822eTgNexlSUwKni5v8jGB0lsybjmNaagQEBDaIosUBUp8Mvf11VLmGI6ntb/4rlrV1Lj5HILy+uxD8r5MulQeubbph/WUms+883J1GAfZadQg== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=iopsys.eu; Received: from GV2PR08MB8121.eurprd08.prod.outlook.com (2603:10a6:150:7d::22) by DB9PR08MB6539.eurprd08.prod.outlook.com (2603:10a6:10:23f::17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8026.15; Tue, 1 Oct 2024 20:44:54 +0000 Received: from GV2PR08MB8121.eurprd08.prod.outlook.com ([fe80::4cd3:da80:2532:daa0]) by GV2PR08MB8121.eurprd08.prod.outlook.com ([fe80::4cd3:da80:2532:daa0%2]) with mapi id 15.20.8026.014; Tue, 1 Oct 2024 20:44:54 +0000 From: Mikhail Kshevetskiy To: Tom Rini , Dario Binacchi , Michael Trimarchi , Frieder Schrempf , Jagan Teki , Mikhail Kshevetskiy , William Zhang , Dmitry Rokosov , Igor Prusov , Bruce Suen , Alexey Romanov , Chuanhong Guo , Martin Kurbanov , Miquel Raynal , Max Krummenacher , Francesco Dolcini , u-boot@lists.denx.de Subject: [RESEND PATCH v4 02/10] mtd: spinand: Add a NAND page I/O request type Date: Tue, 1 Oct 2024 23:44:34 +0300 Message-ID: <20241001204444.917238-3-mikhail.kshevetskiy@iopsys.eu> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241001204444.917238-1-mikhail.kshevetskiy@iopsys.eu> References: <20241001204444.917238-1-mikhail.kshevetskiy@iopsys.eu> X-ClientProxiedBy: GVX0EPF00011B5E.SWEP280.PROD.OUTLOOK.COM (2603:10a6:144:1:0:8:0:16) To GV2PR08MB8121.eurprd08.prod.outlook.com (2603:10a6:150:7d::22) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: GV2PR08MB8121:EE_|DB9PR08MB6539:EE_ X-MS-Office365-Filtering-Correlation-Id: 6f086802-aa2e-47aa-2841-08dce259e7a2 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|376014|366016|7416014|52116014|1800799024|921020|38350700014; X-Microsoft-Antispam-Message-Info: lfivIfjhwFVLFhlO4rxhvHzaBy5Fk+iKjOJ46X4CSQvqOTiJDIdCx+ztvxlXIyz5bpTiNYZPuhhzygbA0kv55knXH6HSgq/iRbMyKE3qNmbe7Ld8OQ1tAb11QW+d4pZfdog2zlBt+QLO+E0EYNYoRwX688U0Ne1o+CuuoHWmDoqYPvRn6QeLmKHkmSjZbo5LL6DoURoRBbbs2NPeWMyPnihwdHrlBOKrk0Q8jHyKNt7sHfrTIcbV+ir+95/Eodgi98DB3iNbSJ30LkS4Eicyg/K+yZvJJuKvH0VFqUvxoyH9gr0cKT8Hp9xHNcDmLoUP1JEZfTAsgEHxYaiVoXZm5DhP/KwL7bzILudiealjyutyUHGdhx1LSjn1BNgIe1xsyWPuwGn6BVZTtsJp+Mi9Rmy+1Ixc1ttbuaLSFSCs1q1cS/rhkMWhGrSUxZVeAnRatnWE76KXapIglLjm5+wmRJ8kZax91U1MINISnsJ8ncwsKjkAsI/QD+xe1AliTpE2XKuQyZNBQYlvXS57BT227H/P9spMXgZ/+B0RIrB2RDAp4BxSj6/Pq6Zy1slX1mCOf9CCr6Ued7I9PcQoc9jNqOFtAxQLr0WvOKH0HMa1MAtouSedAD0E0dtVMBzeKaoKJfot0YGMKEfxjKoS7Y+qlNVir/oMp8lVRfNL0w5AtaP/5nE/e3gGptKM/qHS4ud+UTeOvqMhe2WaVypRUzNKTYoJwwTLJjR/+WZbEj2p2+HA7H8s1joohrshdF1lrTESRNtkG6v1KWcBUH96QfMXgAkSUtFl+0gGV53ZWBwsC91HaCnIOb0P+KmvKRgiL9ecMKMg6CClT7u7hDmHYtZXmJejZMupEjvQ+wOuu38pOmJ4VZ3KCx5PKpzWiKKZTtaKuDTPVhNTU0O66ScdChLGM/FN3oI+onOdT4zoO/aGFE74p3/dfMoLqTFPkgRn/H/pVEOU41qpaPBsvMJmh7Qxu8oSRnoiQN4RChiGaT/xSGwe8W0FvGejLYTmAezNllDUWoskAEnbaYDiRHn3iGMVcNNPa6psapCfXT1rNU9dezndwrelSRqUMAm2Ddz8tA5nCiZXumXKJ2iYvE14yAYOIJbp5lB1nwszxZWCNPLaaLxLcauUi2smMjPfFnhHYNWH2LtGDNgYF8B1he76hNAMrn9/IrwEdFBFN8IQluwTBJxBFUB8oCRyM0D1sJmo63y3tQ7fzTIv18z9Z1sA2vSkPbxxeTnVeMGXra/blyw3FyPZbqSbiwvKz0XpM5OpdaJfG+jKGqzEfv1YLL+rWomnZO9VcsCWzqqxPeQQhQZnxrtQDe4nZSybuN3Ic3Zz5SJi1AJ40X7q+mQUgg/sJtxQylznERtrz8djNVt9rkSaT0s= X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:GV2PR08MB8121.eurprd08.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230040)(376014)(366016)(7416014)(52116014)(1800799024)(921020)(38350700014); DIR:OUT; SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: qAYmw/NkbqS6WmjpzAhlBv/+ziS2gXhkex5aUa/VQfItLsxh6I4zmeB9hmmnNr2rrU24ls81f0PyZP4dGmW3cRqv6nj/WH7lqcaups+CJZqJb710rQvRD81oFr8eFAdDmFgzEE1m71Lt1BnNzMt4mUc6gMR4cMxGWboWDIKVcPyeTn00DpvBRkKEx0njoep8ftwhD6UJ+IN9BdEdaUxNQwPyFucjW+wT+PnjnL1o/8r4RkzQ2jhhrFbMx9Pl2KSVL3xRraliwGadCg/On+HSWWnRbgLlsQVo0XjOb2NqTiF3bGkjKChJzLpepc8FzeLqr4Z9EKeRHrw7TkrrA+X+b6BKtuwRiASemy3aZHQA8z66BWLlHb8ucyBQ1SZu5ViDDxeJilUUyAJWeLJOL2HERgsXpnuxffbbcODYTgH44JN4xfE1AImUDHfXmRPnHwO4uzc+1jnEWtO4u63QccUTwk6TKTP3S7lC5pbRvexN3usTdd/5p85dBss0ucWzFlsillG5I4N0G467ZnsLf/TB+69lK7g/eQyAN2576c4dhFVbucYhpxvj2Kd2y4EXCvv7PLsDAjVCKCh7vjPuldztqH1uEI+5XiO4Pls9aNYHxLUBTGCpNVhdILaK7wBO2BZkWJBxrFVm6pp8xYHlxPwAv4j/WTaAEGVnvGoIIzZalO9aarhI0Y3Axywxd0Aubptnw5yjrz19u3uq8wnt+Pk7Wr52NHS+rv8U3Gx2A37YlS67+OGftokhiy1YaLliqSdPjhFX2ERszJaFMLYz/XxMaCBL/rEh0Y3ODWscLi/P+BCo2+v/yTs823uojHvmxEKUDQn6rsFWMRaxXiwsqeoZNWm5++RJWNaF4bAFnGmvPabvT1GRPCLTd1vEZISDUK9dz9GIXenQLqhH3ZbDAvDc4vKY7m2AciYWkJUR/9OtrkTcNZiepExHC9rBaGmGZ/tPKgDchEw3M+A0dGhjjyumOeidluB5sLmolKY/CiN+S32wuZP3a3lePirTrbt3VkWsgw09HMvBiAx9Y684vhzlV06La/ogFGbMD5Iw2CwEWKSPko40PeULRKOdwnBDX7YNGnM2b0IUjiaMvn3RAZHtaw9slpY0JCsVn+jaoOP4yqO35UGZCF7c59GokYPd94d1HN9Se3URNWhQi/I4IXx7g1WJAHfCIkyOX3suaOWBT9MUAW4uvdhFS7HoKQ94lLzZOmJ4xE660kMG/AFGYI0HQX6eflyWzKglfTMWCtoWtxqcpob3zNPOWeJqoET3gLPPVH1HyaIZ1hdAK+SmtxBdYZDN6mWsDlDOUcJpeZ/kdA1I3HfgATknNrf7d0bvfrviRSv3+BJnQpLAlD8xqWLjGyjccpsgR1FkgdwDZ2h8eRbVCWvyElvxcHXDrhH2s9sIudhazHw2jLQuNQOf+UjHK/yHFqkFCUOadC3grJkdkK0Rs2bgzKt9Nx04DdlIm6e/wvzy2znOjYLUFyYQ4kKeJ/pXq+EPiOLgwUi4K3Qd6oUoC1jF4KUVl6Ok0sPPdHmpaTp1giPV5a8ZxER/NDvUTkfo4gjLa4f5Sw73yDJC1HTGJTLeYhs7V2dNg1HFJ+EnrA3fBitbsWOmPeEjcDMFbLsiViIhkiyl7kc4qZ9DV/U= X-OriginatorOrg: iopsys.eu X-MS-Exchange-CrossTenant-Network-Message-Id: 6f086802-aa2e-47aa-2841-08dce259e7a2 X-MS-Exchange-CrossTenant-AuthSource: GV2PR08MB8121.eurprd08.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Oct 2024 20:44:54.7304 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 8d891be1-7bce-4216-9a99-bee9de02ba58 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: NfeQo1BqcvWbjadQL1PhZBAkStx9yxcu4eo7RpfSoZLjo2ZZKN1WMpQHlxhD9ib+DmmENjDqqvNRZZZrzah2NBJD89qvv+I2TSvFEO+1JXk= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR08MB6539 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Use an enum to differentiate the type of I/O (reading or writing a page). Also update the request iterator. This is a port of linux patch 701981cab01696584a12e5f0e7c2ad931a326059 created by Miquel Raynal Signed-off-by: Mikhail Kshevetskiy --- drivers/mtd/nand/spi/core.c | 4 ++-- include/linux/mtd/nand.h | 18 ++++++++++++++++-- 2 files changed, 18 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c index ea00cd7dcf0..8f227ce81fa 100644 --- a/drivers/mtd/nand/spi/core.c +++ b/drivers/mtd/nand/spi/core.c @@ -523,7 +523,7 @@ static int spinand_mtd_read(struct mtd_info *mtd, loff_t from, mutex_lock(&spinand->lock); #endif - nanddev_io_for_each_page(nand, from, ops, &iter) { + nanddev_io_for_each_page(nand, NAND_PAGE_READ, from, ops, &iter) { schedule(); ret = spinand_select_target(spinand, iter.req.pos.target); if (ret) @@ -575,7 +575,7 @@ static int spinand_mtd_write(struct mtd_info *mtd, loff_t to, mutex_lock(&spinand->lock); #endif - nanddev_io_for_each_page(nand, to, ops, &iter) { + nanddev_io_for_each_page(nand, NAND_PAGE_WRITE, to, ops, &iter) { schedule(); ret = spinand_select_target(spinand, iter.req.pos.target); if (ret) diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index 651f8706df5..0afdaed5715 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -80,8 +80,19 @@ struct nand_pos { unsigned int page; }; +/** + * enum nand_page_io_req_type - Direction of an I/O request + * @NAND_PAGE_READ: from the chip, to the controller + * @NAND_PAGE_WRITE: from the controller, to the chip + */ +enum nand_page_io_req_type { + NAND_PAGE_READ = 0, + NAND_PAGE_WRITE, +}; + /** * struct nand_page_io_req - NAND I/O request object + * @type: the type of page I/O: read or write * @pos: the position this I/O request is targeting * @dataoffs: the offset within the page * @datalen: number of data bytes to read from/write to this page @@ -97,6 +108,7 @@ struct nand_pos { * specific commands/operations. */ struct nand_page_io_req { + enum nand_page_io_req_type type; struct nand_pos pos; unsigned int dataoffs; unsigned int datalen; @@ -613,11 +625,13 @@ static inline void nanddev_pos_next_page(struct nand_device *nand, * layer. */ static inline void nanddev_io_iter_init(struct nand_device *nand, + enum nand_page_io_req_type reqtype, loff_t offs, struct mtd_oob_ops *req, struct nand_io_iter *iter) { struct mtd_info *mtd = nanddev_to_mtd(nand); + iter->req.type = reqtype; iter->req.mode = req->mode; iter->req.dataoffs = nanddev_offs_to_pos(nand, offs, &iter->req.pos); iter->req.ooboffs = req->ooboffs; @@ -687,8 +701,8 @@ static inline bool nanddev_io_iter_end(struct nand_device *nand, * * Should be used for iterate over pages that are contained in an MTD request. */ -#define nanddev_io_for_each_page(nand, start, req, iter) \ - for (nanddev_io_iter_init(nand, start, req, iter); \ +#define nanddev_io_for_each_page(nand, type, start, req, iter) \ + for (nanddev_io_iter_init(nand, type, start, req, iter); \ !nanddev_io_iter_end(nand, iter); \ nanddev_io_iter_next_page(nand, iter)) From patchwork Tue Oct 1 20:44:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mikhail Kshevetskiy X-Patchwork-Id: 1991716 X-Patchwork-Delegate: dario.binacchi@amarulasolutions.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=iopsys.eu header.i=@iopsys.eu header.a=rsa-sha256 header.s=selector2 header.b=gAVpkzfq; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4XJ91f3VDcz1xt1 for ; Wed, 2 Oct 2024 06:45:26 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 6091E892A1; Tue, 1 Oct 2024 22:45:00 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=reject dis=none) header.from=iopsys.eu Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=iopsys.eu header.i=@iopsys.eu header.b="gAVpkzfq"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 65703892C6; Tue, 1 Oct 2024 22:44:59 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_PASS,SPF_PASS autolearn=no autolearn_force=no version=3.4.2 Received: from EUR05-AM6-obe.outbound.protection.outlook.com (mail-am6eur05on20704.outbound.protection.outlook.com [IPv6:2a01:111:f403:2612::704]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 72D51892A6 for ; Tue, 1 Oct 2024 22:44:57 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=reject dis=none) header.from=iopsys.eu Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=mikhail.kshevetskiy@genexis.eu ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=MxlTQTrFaNNguCbP9aHek9d2uY8F1YWINA3oMQyw0e5O8bSu9tIqSGCVBx8uj70T7a26laNS/nz/27CKdq74njovn/rlNCtqdD++JQ9YAarBn8gOUB8V9MhZp2KLV2DwjutzkMWm5R4hTOD96n259/qtpKMLcsVvqR3X3Sdb7fK4K0wfCuVw+lZ17rEZmLMtL6StbceJ2Y6d6hgOlE6Ii4IXMrmo/obD80HEGqh84G9jsWTDH2yG2lvSdTvnvUri8rl2AyPqlBebAhq9+krPU2MaDs7L1/HvX59WAoiFJKZK6AWgm12IOd/AH0atvKq5dRErE0aC/z3hmIwVe2DfSA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=TzsgTtBBhFwFichKnMzvvJMvJjAegPEkOJ1Xx+b0T80=; b=TfaYGbIDf6IG/5cqlzzyzU5vYML6CWsdYv/kgoeKHJCl0tI9nr/PVdzQkbbjAA99NnL3K4bx3dSg3Gc0FKMvlwJwiq26eoy4g8uEk/yIGwBlc3b1LwBsfcGwuc1FRGTjs0qBtTY8aKQqyKh+9pR6BZS14pjg4Y00TNSMh+HPg0aRxwFyASbuHpJDXHNj9PDpFreJpTu1FheuJWu4GdJeGfMnyaqMer96hyVfZfKP+SUfPIRxXR2GcmtSkqEuVfPjXzCN5/EtIoEPJ7rrc50i+q0fSjHXtGK/FRjkevs01x/+0rdi74g/ij2BXx2n1fGmtor/AEefoUJJ6IuJvS7Egw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=genexis.eu; dmarc=pass action=none header.from=iopsys.eu; dkim=pass header.d=iopsys.eu; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=iopsys.eu; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=TzsgTtBBhFwFichKnMzvvJMvJjAegPEkOJ1Xx+b0T80=; b=gAVpkzfqm6DtaZ7r6bokUT3DVTXCpOyqNl7znhcOB/aIgcsZ8/qtQkI0IR4C1aYPgOUYqpGekvPJWNqPM38rjBgiVB61gMWMchWC4hU/JeRjFIzHzhbz/G0lNtVC7hMcuq2rT1Xf01PTCOu/MmcgtZtllZM2WUkDkS2BXQNwETw0fpm9lTjtMXWNl4+r93iVCcZTlKMWGmRclWoNG0c+AMt1EvLYGiyff+lk8kV9Ickli+ZxQOgI8hcIE7lyNFvX3bMEoXPu7GS4VxLae6mkXBlDixSpNH5GXdusft2D3J1vAaC/eWJ98cOOjsz6YKbvA8Km3C75fX3drHSpI9Fp2g== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=iopsys.eu; Received: from GV2PR08MB8121.eurprd08.prod.outlook.com (2603:10a6:150:7d::22) by DB9PR08MB6539.eurprd08.prod.outlook.com (2603:10a6:10:23f::17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8026.15; Tue, 1 Oct 2024 20:44:56 +0000 Received: from GV2PR08MB8121.eurprd08.prod.outlook.com ([fe80::4cd3:da80:2532:daa0]) by GV2PR08MB8121.eurprd08.prod.outlook.com ([fe80::4cd3:da80:2532:daa0%2]) with mapi id 15.20.8026.014; Tue, 1 Oct 2024 20:44:56 +0000 From: Mikhail Kshevetskiy To: Tom Rini , Dario Binacchi , Michael Trimarchi , Frieder Schrempf , Jagan Teki , Mikhail Kshevetskiy , William Zhang , Dmitry Rokosov , Igor Prusov , Bruce Suen , Alexey Romanov , Chuanhong Guo , Martin Kurbanov , Miquel Raynal , Max Krummenacher , Francesco Dolcini , u-boot@lists.denx.de Subject: [RESEND PATCH v4 03/10] mtd: spinand: add missed add missed MODULE_DEVICE_TABLE() Date: Tue, 1 Oct 2024 23:44:35 +0300 Message-ID: <20241001204444.917238-4-mikhail.kshevetskiy@iopsys.eu> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241001204444.917238-1-mikhail.kshevetskiy@iopsys.eu> References: <20241001204444.917238-1-mikhail.kshevetskiy@iopsys.eu> X-ClientProxiedBy: GVX0EPF00011B5E.SWEP280.PROD.OUTLOOK.COM (2603:10a6:144:1:0:8:0:16) To GV2PR08MB8121.eurprd08.prod.outlook.com (2603:10a6:150:7d::22) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: GV2PR08MB8121:EE_|DB9PR08MB6539:EE_ X-MS-Office365-Filtering-Correlation-Id: 1a3905a2-d229-49f9-3a31-08dce259e86d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|376014|366016|7416014|52116014|1800799024|921020|38350700014; X-Microsoft-Antispam-Message-Info: 3SkW8r+MfcPVuO5OIRPgh9M/fVjVwiT+HgofCeRlftdI98SwdRl5b7hk0ddzVjXDPnz15fKAcFKV7VyIbl/30M7b/2na+pfADuCQBIwyiLJRchzTv05uASZt+9C+gp40TBFvURPYiTP2whbFDhz3W7KvXtWMv01t2hUsyNkdi1ycO/cp80ObDuFEcNoisZ7XPnNVWFerDezcOy4ToNxsB12guSBMV7zFaFmlPrGF1zHm32qcQbNlSRLKIKJ8TqlFG/RKTKvBUB+fIIruDugzLxkqGQr88UJgyXbuLXkZS7doff7JcOULpp21wad+LtM5w6NNGBZkBHyWMTHFyDsc69wb40M8OVLxz2lcyOmF553Oz2h5pRopc5PrPlVrUrW6E0W3es5xc2KVkS80Y6UsnsFBxGJZktGgx8zJZlfyJz0pcOKGyi8RX+CjBPGFOI/u56QWlCLn4/i80KdzVA8p4MV0uDGs6wdfZalISY4MppEj/0lA/i37pZzNnUhsZdTEr2NDJ4lTlrpK6eJMYZ5mFsbCGcxOA/ZBvHrEwtSYkVtQESWwgLWLU4YU3691Zx+9NHnuhHn80TrhO4BFz4OQzAibVLBETUHMsZefR7pmPsVJK4kYxF1pejQZGd2w/s2JdhEi7vQN4a+U7XyVPb2p2Wa00/2sMdwhmBfcyWPE4aU/hKWnp1Fy+QaQpvMdmrmUejquvZKfTw2plWc5jb89QDpLiI4svAgIR8ZLpD1YabdP+lkL6giO8qPD0xtaIaXcfQTnoNnIVUSucqoMwovTe+ZNtu1xC9jXQRqRJc5uyxzQl5Tea9BYiJ3ZRW0LRsFrCsrOaX53MsQLrcbp4T1a4UpnA8u0X6lxcsP1dw4u6tC+NVV50DRU+GNm+uCoFYgmAHbGiK2JJH3Hkhixsa6tJw8n4DGX9H2bc4sGyKDX2+46HZyX0R785yOK34Q2AIioBBXhh4FtiP+r7UZPoDrC0TttoPaVDKYXLSJr1ev62UWgQWrGaKKv9y93nOYsnK/8uW0hPtfi5D86wc/2RQYTcc3E/WCwC+kBKPoVoxeT4E3u8w9bV/2uxxYzZNubbdJ7LShIbkaQ+HE7Giv2baIOEWMduxAjDHhEJ/JDLHU2ewQOqk/XNrTuBAJke3YYrG6X/ebWBEUYeiYiBWOelIV/nTyAQmQqgAIPB6/gVumnrxbxitJfJo4JoI/xemzE97DSKCv8A90lTwUN8D388THSyXNtcBciKuXsvZkfyK5CCN6ikT12DDParJ8NLRXRRUOuwqOXu9LOHSWTpNWJjI+KNca0OutJPkojUGleMJo8bvF4Zv7rWepLTit/PzMrnZPSy51r6rS2EpQ+CaSSUm4ljtui/BWWfleUm3XvwWuOIeg= X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:GV2PR08MB8121.eurprd08.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230040)(376014)(366016)(7416014)(52116014)(1800799024)(921020)(38350700014); DIR:OUT; SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: NCqjY3b6gb1DkbzPhYRL44g0lc4mKnmnXRoqRv0NDc07DafXknxImGKzrZ4O2ZeSYDm/UaCD/Ks5GCCBnJWpMcHuzBDceR9K5jPaXuNe32OQ2qyW6e43DFB0bK52HzcQaAa2Gkx5UvZ0RpvEtyxq/T21O0K13Wu/1zxBrPTfcFkzvqsks5HZu0ziqYr3veewtZI/wU7NmdvsvVylPWFCICYoxAUvradO2Lo2UMSsl7pInOh1tuHUq+krUMobZn5H2JG+tFHwdwj0baWPqPMQOTN7IbVKvnP7HiR/6IT5WMoDk+rKpv57z6e4dR0q7PX+x0uCUnTUHwFShDZoMx7p387K6NxEAv6Gn9YBFCsJ/aVIGZ4W45K27fp6wpxoO3hAu9jDAbFjnkqFIdjHBs+89/l0wiz+IurfpYM5DjGU87iXDyaekF2IikwI5UppEPHeV0cdqGnO4sg+byfyQ4RaOPGUgiQAVi832vhMbjQX5jDPUrVPYW5LEzOp2Nz+Y2cZURuNZIGHYO2dHX2xALpxr+TRD9f4fYd5yey8sCE9hRYhXZtjNQMZc9+56M1GbCNVZlm2dl379vZu/wd6OJZRFAjpcSgHP68McMWhogCnZpplCs2gDxZp8TPBmxMx6UxxZCMDKW+do3WyPBO49QZ4oZ+GEbefzWmHjkWGQoYeY10eemfwK+NOuIPI4cgYJgQ/1w9/en3HlqgutBCkKG0C4ZowcB9LURnVcMNRe3Oxt6uCxowWUk8PoP02WM2fnFxCIrHLOtj2sqDnMSsayfbAWlxqNiJc/0EAwGpysucgfGzsGIu4o16TVTaZ3eDBn/7JC2blc4SzKqiSDjBjKQjzItuhH/uRYWmB3rPyh5TfLskVfgWGdC6gvcVMOVfZB7PkxPXpF5enBJXg0VtSofwSit4l3atlf8jga1DxugeVoZA80DVB3thX6fGoOpX5Lh6wDw7scqfOA8NvBrUQBMOT7KpCtvj3CLp3daKMLGAVIo+9iOno+EjYdYXEgfjx5Eh/MrEpwJ/XlpgwVpSEPyzLMwIYWAJOS+HIR510/HDw64oaa22a1eA8Ehuax8xHhdHsQGNneLMOX5NTqlSLoaHmf2jHDP5ShzVkCB2JNdIdW7VdI8MN5uW30kXgrvXgxu1zhfbojHby7vl8lwEfr9/EdVFJk+VhHYDp4puUc2Gjamp+fendg0AUnUMwLoAyciPwLjwc8vjQp0JpSvEQ/sSRLuTkBrjwhGNRcxsCpe5v9DsLgMn2jlTMo4LWo3lZ34IC2OPjOzDxAzt7ne8UVFXTl92dMsBibQqEEI/NoH4264btlCJ8KVr79LebeK68+F8Efl2+M84vG/NMXwNvgvVaRnfyHb92NlHL07hV+UGvHvhLFhBgdmv73PBPDOKK2uM9hEB+4ehigFVHgmJrY3YFgN030EYtoLnIJVSbmhmkZj0j7LMFubwG+3udYH35a9ICz9WBtbiBbb/+422PX+8H3v2Sy8nU+UJ8cGq2FUTkW6vSPgF6o6XtM872/xDuO7amRmEM4U/nzpyOG8Tf3FV5sS29bPibJNsbkIPmML78FyKdvtFVlGTEPZ96cwW/CChoPYmX1tkgdcMoGuSHf2kcJITfAhWLGfh2avaqxd3sNnQ= X-OriginatorOrg: iopsys.eu X-MS-Exchange-CrossTenant-Network-Message-Id: 1a3905a2-d229-49f9-3a31-08dce259e86d X-MS-Exchange-CrossTenant-AuthSource: GV2PR08MB8121.eurprd08.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Oct 2024 20:44:56.1106 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 8d891be1-7bce-4216-9a99-bee9de02ba58 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: W3Z5N2MJrv0ul4zbbReOPRh9OKghICIL9Ln5htw9B91IKwNuAIlnJXAklz27S7yXGE9E5XLiwKrMtFMgGSvn3NfrqV1PbdbZAW2DJoXBDig= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR08MB6539 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Signed-off-by: Mikhail Kshevetskiy --- drivers/mtd/nand/spi/core.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c index 8f227ce81fa..62779dd3e51 100644 --- a/drivers/mtd/nand/spi/core.c +++ b/drivers/mtd/nand/spi/core.c @@ -1267,12 +1267,14 @@ static const struct spi_device_id spinand_ids[] = { { .name = "spi-nand" }, { /* sentinel */ }, }; +MODULE_DEVICE_TABLE(spi, spinand_ids); #ifdef CONFIG_OF static const struct of_device_id spinand_of_ids[] = { { .compatible = "spi-nand" }, { /* sentinel */ }, }; +MODULE_DEVICE_TABLE(of, spinand_of_ids); #endif static struct spi_mem_driver spinand_drv = { From patchwork Tue Oct 1 20:44:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mikhail Kshevetskiy X-Patchwork-Id: 1991719 X-Patchwork-Delegate: dario.binacchi@amarulasolutions.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=iopsys.eu header.i=@iopsys.eu header.a=rsa-sha256 header.s=selector2 header.b=Lk9FpIqw; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4XJ92H5VNMz1xt1 for ; Wed, 2 Oct 2024 06:45:59 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id D3FEB892D0; Tue, 1 Oct 2024 22:45:02 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=reject dis=none) header.from=iopsys.eu Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=iopsys.eu header.i=@iopsys.eu header.b="Lk9FpIqw"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id F3F4F892CF; Tue, 1 Oct 2024 22:45:01 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_PASS,SPF_PASS autolearn=no autolearn_force=no version=3.4.2 Received: from EUR05-DB8-obe.outbound.protection.outlook.com (mail-db8eur05on20700.outbound.protection.outlook.com [IPv6:2a01:111:f403:2614::700]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 0539189221 for ; Tue, 1 Oct 2024 22:45:00 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=reject dis=none) header.from=iopsys.eu Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=mikhail.kshevetskiy@genexis.eu ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=TlHLGZOOginKBdtSHwls31ilcEI8Ot/AdaBLJ8m3hiP1Y8az83ndJg3WkxYq/nehbcsRLRQg9PHvtSLrESv2YoP2Hi5VMtEOMXEgC4LfLbuOCFjdkJsw+1VU+dMjs4ntm4izuUW8ybZ+4ccN6Pf1xrHGV0/Igit2jP2X3DQUFEqS0af/0h66XI5himRYcTIaPoWo5VMWrCUQY+vHaA0QsxKTgTW7AiPOZgkwTproT4SLMCWWielCQpNawlXkFgaqnUnABOpGkpWeef/uUMcybJscOIvMG8EZrvzrKGw0Jga1Qvx3wZGym++Uycx6IlJ6hWGnmAsqJbmC0iCRckjaWg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=mIpKMrgieRd0uiFaGsLMiQL9c4w2nS6s4iimFPcCk4U=; b=UGkPo7Or6UxxR/zIGF3kTMocEQMtrd056H0aMOtdpqizRohX9g4wrzOBe0r96/c4V3/TJn986Qny8Cfw3GreO29g6bnTQfJrRUwW/6cYPr1WZ8VKokq2nQp3XON9p+UjRzKfVwdlCuZeFDH3HV72h1PpNh0RlmX5BCGJMETyZnrsYV7CMVi6TFkP91b+00FWWHoxTJ+9pf/UWRvhC+YuAsao4+pVcDL5pQHGklvuhv++T8i+YRCRYjZpB0hSPQASLX/jHo1830YrOBuN+a0PrmxafHSaM7KkRkaQEmtwU5dDBFqNhBv312ZdhRA5e/ZOKiORl7kTxdvRcihsqgIxnw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=genexis.eu; dmarc=pass action=none header.from=iopsys.eu; dkim=pass header.d=iopsys.eu; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=iopsys.eu; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=mIpKMrgieRd0uiFaGsLMiQL9c4w2nS6s4iimFPcCk4U=; b=Lk9FpIqwIPh/NGCaZFl6P1pnP7hwNzrKblxX/S7mkhMLKlCm7RvGJ4lPO6GCFMheP4DjarRc+P8iMZqp/040eVqjDcLkRogFp8FyNHtLUfwWmsI8cXTK8Ewj0jKA5/wm5WjiGUWTf8yhovXL5wzapZurWGWIm0H7sSsT3YDlbyScB3Uf1K7fClXki0Mpz40rGGUsrsWEdawQN2mBB+Xco/i+tS32DpYX/Zh15TPdJYHgS7IbcglVmM8fB9twzkL5HPA6swS78H9lr6Bm+10KKSWUFoaKTG79jAy6nozFMCIruSQyfm4m1XDLtgD0DuK0T+8B5mPquRL1Q1mjdsIfDQ== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=iopsys.eu; Received: from GV2PR08MB8121.eurprd08.prod.outlook.com (2603:10a6:150:7d::22) by DU0PR08MB7812.eurprd08.prod.outlook.com (2603:10a6:10:3b4::8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8026.15; Tue, 1 Oct 2024 20:44:57 +0000 Received: from GV2PR08MB8121.eurprd08.prod.outlook.com ([fe80::4cd3:da80:2532:daa0]) by GV2PR08MB8121.eurprd08.prod.outlook.com ([fe80::4cd3:da80:2532:daa0%2]) with mapi id 15.20.8026.014; Tue, 1 Oct 2024 20:44:57 +0000 From: Mikhail Kshevetskiy To: Tom Rini , Dario Binacchi , Michael Trimarchi , Frieder Schrempf , Jagan Teki , Mikhail Kshevetskiy , William Zhang , Dmitry Rokosov , Igor Prusov , Bruce Suen , Alexey Romanov , Chuanhong Guo , Martin Kurbanov , Miquel Raynal , Max Krummenacher , Francesco Dolcini , u-boot@lists.denx.de Subject: [RESEND PATCH v4 04/10] mtd: spinand: simulate behavior of linux's function spinand_wait() Date: Tue, 1 Oct 2024 23:44:36 +0300 Message-ID: <20241001204444.917238-5-mikhail.kshevetskiy@iopsys.eu> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241001204444.917238-1-mikhail.kshevetskiy@iopsys.eu> References: <20241001204444.917238-1-mikhail.kshevetskiy@iopsys.eu> X-ClientProxiedBy: GVX0EPF00011B5E.SWEP280.PROD.OUTLOOK.COM (2603:10a6:144:1:0:8:0:16) To GV2PR08MB8121.eurprd08.prod.outlook.com (2603:10a6:150:7d::22) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: GV2PR08MB8121:EE_|DU0PR08MB7812:EE_ X-MS-Office365-Filtering-Correlation-Id: a45ebf1a-8c6e-49b0-10c4-08dce259e93e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|7416014|376014|52116014|366016|1800799024|921020|38350700014; X-Microsoft-Antispam-Message-Info: nBfX3Qo6KHfHhS0lJEMeFu6FpuKjHNtcgYeTsIBcwirVtf6XDZ5zj9K/tG+MEJhcdKrFVFi88+QFFGH74ecO9TY02Kak7yccMZH0i7oIW8RhmeGBqmb/lxJFtnc8KpVQrulo7C+75Tr2ze5muYRtwqUXLSvWWG7r0ZL81UIHHEZtd8OzHjzf7kc/zkJ1QqkXHXVP8/wkuabHOoKqccabbwlqObNAMj+F2brF8hcyNItFr6uFYB7ecelp2RpvgTDzr3fyCHnk9Iu5sUMv+SACEQNZZb+67ksOi7TKJEz+GGtnIsOqt8hDMZYgLUbJx9RQLK8Woy8Xr5j2C/GSA8Lk7OwsaIhgL2QQSRWD4SG3nuckxROeYYsa9Xfb6asEHUKlvK4wbbQwh4nIqTtViblIWf9THuLf2FqvMbatOvvYzicOxCs54aq4bRlf+RLS9+41CBtCRx+Yybst/zYeiHO5HD5ZOf8fxi5JCj40CXTIDJ8SBeMJNzIp0kMARHltsbELtJTDRQCxgBkVu/rM81LSkCB0oq+Z73POn1MV3U+oawZ1LMU8JslKWy798gtxaBxTO5sa8FMJvG+Jb7w8NNOn7Wfv28FDTwpy6twNVwTEGkZ62Py04Wg+xjGucXjMV1dVcgjMxAlbdd8lFRvC45lCaL3mpKe/yzXBrFgH4LRYl8/ODYCJTXN+ZDYD4kpUPB0RlyETyMdIGYBA/X0rCeILAeIXGaHFFLG4SJpN/ZRO8whcZA6IIn6AM29vvdIgGiD/bpR/C/0T7eTqTlENQ5YvqZfMX/pzAWZU2a2vSa/XHH4WJP8uDs9szqIAXabd2UkcIbiIkC/uQYZk3VYgDc56KKpAju4VRcrPdpVBNhcgImeNklSG4CcIV+ESGHkJcD0gS1Z3rGcjF9vPjVJ+61FloQUcQjNuEwsjLWqDC/EPuiKwE+w0FyszYN3ntahtH99N/3taxjSxSAHw+Ruy7lpMSEO0r7neju3wAhTulHHVPp2kcspknmakge2GpgjtIZvaoexY8glad0GERImVhnEUAxW1x3Au2slZ5hsDXOtcrUf6tlNkx/KhxIziFpMYLUYFC1BSjB7hldUsaHc+fKJ4UwcbGTumARCjHX0A9ZTkynmsGfg3xo0+RKT4jGqm3nl2fi5KMxmGeYqI53kknqGAo6ogvqF3YnaZKUevSrHcHUuYAK6uwZMclTf38Sxg7Jlt5wPgVl80IcqNJ6Sow+Q1iOxEHhkngZ8ZOlu0r80LsFDMtImXTaz5kP7FAKqTx1aq8lo/IeqRqh4ZZR7D/2IwKS+JrcpuB0Mfqe/7N5UUxLq6poGMalGoiqut4QWbgNJR+2T5m/RpDU2d/hecvTHYpMxOFgVZ2gzCCTcvCRW4ijk= X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:GV2PR08MB8121.eurprd08.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230040)(7416014)(376014)(52116014)(366016)(1800799024)(921020)(38350700014); DIR:OUT; SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: Ur04r4Mtl91MM9NJr1RHYcvJxL+SYFZ0unif4PC2QAVZcxp4n9g+21Mgh3wqBmlLuVl7gED3nJUVk56D/HhgdQuTI7pZuGEAzH+Mg/Rj8I0WYtJwf6tTDCRVlLuM+YytVj/nPB8k+aRNJf0/fS3qC29nmBUEzhBxuIb12AU1vw0Sw1wlPUrJN5jn0dO+uD9GFawbIqDhH6gWhTGqWScSPDXdYAo9jcxlKGt6HV1jl0TFs9xj9jqKqLATKd6Z7OCmt6dL9s1qcYj6q9lNSycWLjTcwin3vOX/4z0ai6DIbcbDFL5dYJk/zVkBKH6EvVi9NUgczL8VuC80CQ9ShievmdGE/x5T1zvO0wME1mWDalpGgumNkAODuubhWizpnMUtfhWxs3r1B8xSQPN7FkAlbO7kA2QigSAGYFDAOu9L6IoZF+NT9rd6o5zB+0ofTIQIDdL3ohsX/kdw+gIS7qMhYbhoY3wsVmeCzddYnmiAfRwdXfzyy17R5BIyoJlalYU0zxNh1Cgxtly5cpByiMbMtv5/6yaNhL5ZdTjiyVGdsNZnWUXNgQZRImwtPmv/W9xQfSUu7C19LdPeoMetPalgzC9fW/hqWV+GOqN3BsN6kSORy7m9cobGF0APi6/XHMsr7WtD5t6dA147Wjz07n9AIleRNHuh/wewdpIxDTknGFdqkRed4OTbqC3Plq8Odv1Qg8cEP/BX76nWVM9pL2hS1rR0P+TTxeE5A8EUmFqLvxMS5gGgNHP00LNC5P+AZhzFOkIcfYvDqKf5EDmAF1Tat4vdm9I7ChPtkAN5lgBtM4bYaTzpkFI0Wz94Ae2s95UUWPu4/j5YtPpWvOzaTpyFVL7N9s1bDpc3XrDpLhpDhmrTVFs9q1JBThrF3mWGJvRpnLpv9nzamKtnpz7N+1H3jlxy9FfhTdlTHZNAKOC7gLaCCekV6YOXW6lYfOAdd7f9Tf+NqZ93ki/jxf0h1fQFF2vXGOiKNKQJHtEIfygNbXjJlt5dnlnsAMojM+M+vK6VcBYjuMpkS2+1LTzaI+/zUjDwUwT1Dthky4L6TcENk+YFVsHT0z4zlsDqZrl8vxrg4zdH/neT8k15FSobBQbIVjyDCMoifJ+3RPuULqiDneIHrnheUr8F520D09MPQdxuNRSch/SNQ1HAFwcFyfE45qqMbu80LLAtDYpQndWkZfihRhh/N09Nr/+qFYXehBzUb+q4es5lnh0d0znLuMk5tOeHhrIUSRbo7+sll9wMUP4fy0rQ+Ck96RamN4PGebQxzo2DFGfmYMKksYT2LrGUqyMKo3hGhnGKEwv2EMQZ1eei7e5K5dgHvgNcom7vTni4Oxav9pZ8WMOSLJVNshCEbPlWdtdsNXQkXwaHm09YEUJUwy8UqY0A0I3DsM6E4+jqBCyY4JS4vuNN5YVaFEJR1K815+7YNiG44iBZghSdS/iugNZlTrJrHaiCmi/FWsszxKbl6qRUttyGlNArnKsfDvC/ggfC1ItKcyAX+LRNrgfLjmC10byP0k7BhDcx3cxGdklDX+scxpoN5Z8+lJgOWBsAwspxWgx+6O0sPTgvRikqQhWBol1mp6x50AAB/0dbv4GziUF2aihyiLP/RSvQH5bfyRa0Mwc7LopXYzWyVCA= X-OriginatorOrg: iopsys.eu X-MS-Exchange-CrossTenant-Network-Message-Id: a45ebf1a-8c6e-49b0-10c4-08dce259e93e X-MS-Exchange-CrossTenant-AuthSource: GV2PR08MB8121.eurprd08.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Oct 2024 20:44:57.4348 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 8d891be1-7bce-4216-9a99-bee9de02ba58 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: YXqu7ZS/Dae3ICkT7xoHybOFSygDS7vGKlsJ0NMmDUG71jPJXluplWYbKeDS57r5HUezCoHKEdZuayKtzPDlwVjc6/hEVYiIcqJozi4JWVI= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU0PR08MB7812 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean also call schedule() to allow periodic actions Signed-off-by: Mikhail Kshevetskiy --- drivers/mtd/nand/spi/core.c | 35 ++++++++++++++++++++++++++++------- include/linux/mtd/spinand.h | 22 ++++++++++++++++++++++ 2 files changed, 50 insertions(+), 7 deletions(-) diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c index 62779dd3e51..a10605487f3 100644 --- a/drivers/mtd/nand/spi/core.c +++ b/drivers/mtd/nand/spi/core.c @@ -32,6 +32,7 @@ #include #include #include +#include #endif struct spinand_plat { @@ -362,21 +363,29 @@ static int spinand_erase_op(struct spinand_device *spinand, return spi_mem_exec_op(spinand->slave, &op); } -static int spinand_wait(struct spinand_device *spinand, u8 *s) +static int spinand_wait(struct spinand_device *spinand, + unsigned long initial_delay_us, + unsigned long poll_delay_us, + u8 *s) { unsigned long start, stop; u8 status; int ret; + udelay(initial_delay_us); start = get_timer(0); - stop = 400; + stop = SPINAND_WAITRDY_TIMEOUT_MS; do { + schedule(); + ret = spinand_read_status(spinand, &status); if (ret) return ret; if (!(status & STATUS_BUSY)) goto out; + + udelay(poll_delay_us); } while (get_timer(start) < stop); /* @@ -418,7 +427,10 @@ static int spinand_reset_op(struct spinand_device *spinand) if (ret) return ret; - return spinand_wait(spinand, NULL); + return spinand_wait(spinand, + SPINAND_RESET_INITIAL_DELAY_US, + SPINAND_RESET_POLL_DELAY_US, + NULL); } static int spinand_lock_block(struct spinand_device *spinand, u8 lock) @@ -466,7 +478,10 @@ static int spinand_read_page(struct spinand_device *spinand, if (ret) return ret; - ret = spinand_wait(spinand, &status); + ret = spinand_wait(spinand, + SPINAND_READ_INITIAL_DELAY_US, + SPINAND_READ_POLL_DELAY_US, + &status); if (ret < 0) return ret; @@ -498,9 +513,12 @@ static int spinand_write_page(struct spinand_device *spinand, if (ret) return ret; - ret = spinand_wait(spinand, &status); + ret = spinand_wait(spinand, + SPINAND_WRITE_INITIAL_DELAY_US, + SPINAND_WRITE_POLL_DELAY_US, + &status); if (!ret && (status & STATUS_PROG_FAILED)) - ret = -EIO; + return -EIO; return ret; } @@ -702,7 +720,10 @@ static int spinand_erase(struct nand_device *nand, const struct nand_pos *pos) if (ret) return ret; - ret = spinand_wait(spinand, &status); + ret = spinand_wait(spinand, + SPINAND_ERASE_INITIAL_DELAY_US, + SPINAND_ERASE_POLL_DELAY_US, + &status); if (!ret && (status & STATUS_ERASE_FAILED)) ret = -EIO; diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h index 5934b7604cc..b701d25f73d 100644 --- a/include/linux/mtd/spinand.h +++ b/include/linux/mtd/spinand.h @@ -176,6 +176,28 @@ struct spinand_op; struct spinand_device; #define SPINAND_MAX_ID_LEN 4 +/* + * For erase, write and read operation, we got the following timings : + * tBERS (erase) 1ms to 4ms + * tPROG 300us to 400us + * tREAD 25us to 100us + * In order to minimize latency, the min value is divided by 4 for the + * initial delay, and dividing by 20 for the poll delay. + * For reset, 5us/10us/500us if the device is respectively + * reading/programming/erasing when the RESET occurs. Since we always + * issue a RESET when the device is IDLE, 5us is selected for both initial + * and poll delay. + */ +#define SPINAND_READ_INITIAL_DELAY_US 6 +#define SPINAND_READ_POLL_DELAY_US 5 +#define SPINAND_RESET_INITIAL_DELAY_US 5 +#define SPINAND_RESET_POLL_DELAY_US 5 +#define SPINAND_WRITE_INITIAL_DELAY_US 75 +#define SPINAND_WRITE_POLL_DELAY_US 15 +#define SPINAND_ERASE_INITIAL_DELAY_US 250 +#define SPINAND_ERASE_POLL_DELAY_US 50 + +#define SPINAND_WAITRDY_TIMEOUT_MS 400 /** * struct spinand_id - SPI NAND id structure From patchwork Tue Oct 1 20:44:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mikhail Kshevetskiy X-Patchwork-Id: 1991718 X-Patchwork-Delegate: dario.binacchi@amarulasolutions.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=iopsys.eu header.i=@iopsys.eu header.a=rsa-sha256 header.s=selector2 header.b=H/mV0xXV; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4XJ92461Xqz1xt1 for ; Wed, 2 Oct 2024 06:45:48 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 5406989251; Tue, 1 Oct 2024 22:45:02 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=reject dis=none) header.from=iopsys.eu Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=iopsys.eu header.i=@iopsys.eu header.b="H/mV0xXV"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 0B20989221; Tue, 1 Oct 2024 22:45:02 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_PASS,SPF_PASS autolearn=no autolearn_force=no version=3.4.2 Received: from EUR05-DB8-obe.outbound.protection.outlook.com (mail-db8eur05on20700.outbound.protection.outlook.com [IPv6:2a01:111:f403:2614::700]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 20C8E89265 for ; Tue, 1 Oct 2024 22:45:00 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=reject dis=none) header.from=iopsys.eu Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=mikhail.kshevetskiy@genexis.eu ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=dXGLMB6zru7VrOMZO+nAcoFFopu+Ba0gfpRtgNwgbTwL0FMhZT3li7BUnU0irYfk0nBGTtiT3Hi20SWpsjnTJm4RBrzSRnvdGErj1Cv8V+fW52J/ejP0XBlKmy4Dr5cP/eDqfI0YDp70QYxISPvy6wPCINEFvBvun7aNSweyKB4k48ex/1izQN5/XT1ty/0Ca4NfMJhSwBUqivP04sudZTLNQ7eHdX6dOVDQsrCDi+YPW/mj9S214jogGB42lgAIp41D0W0lmVen1H/KuTSYKw4uaYudA5mHjutcrLlRuaQC6iSwfpdAOIxdB2/0SWC0ODLn1PlzI/n2NM3upIVr7A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=Whm5sgNFRFvN7odaDp55Iwpw2RT4l+3JBeJgI/Ct/8w=; b=CQYxi4UCytVI4WHeDzql3VMaGWzy6U2W92TctqkSu6RiSDnkDOLRjBCCQZDhTWYvLcJAyKy8Aib8y8ilxz0YZrpybotWN6gVUXXetWa7iCo/PFaH4oasMD/Ygi8m/o0gwq1JD7UFb+Uvnczm3HYz3Oqatc3EOgTPbm2YfLcDwhFs1X77rK08Kbp389m1dHQL1bFFHfQLW3rbblBje2QevfHaW+HTjOUFNxOm+4hR+R1Sdp7PmkjeiKEmTbXPwcMyIq9tyokiw9iD6QtmUyrQmd+RSEw3JLHCXgOHdeTwMoFvsB/u6wUz8CA9KWhq0QI6cbL2VAlpOxC7LqO2t+A4IQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=genexis.eu; dmarc=pass action=none header.from=iopsys.eu; dkim=pass header.d=iopsys.eu; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=iopsys.eu; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=Whm5sgNFRFvN7odaDp55Iwpw2RT4l+3JBeJgI/Ct/8w=; b=H/mV0xXVGHfl58qA+5mGz3R/rC7qA6OerA1nydDhmJD9XhiMy9hlCPV53x4qrMUC3u5jx0lxFHXfgOo2lbskp8G80VYzjeVq6gg6Ql2YOjzPzFetOZf5nEDW+Hq1cuxOY+D6rsS+fZHw+7tOtPLgJn8gPS7Hfd+IkfKWMJcHbgepb0OGMiFInA3j+t0bNe6IfFVig/douI+Jc/gCQA91YMDHQ5yxpICbsPjW8+HTHZTvhCAbCVEhE7B92ifLoRauP1JbQlKBELz9xpz2Xsh7os1c8vxigeycl0cgWyHOVWPhXrz80sFokqEIRCXZfQGvsX+lG2ZZiK+0ex/t8jRrrA== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=iopsys.eu; Received: from GV2PR08MB8121.eurprd08.prod.outlook.com (2603:10a6:150:7d::22) by DU0PR08MB7812.eurprd08.prod.outlook.com (2603:10a6:10:3b4::8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8026.15; Tue, 1 Oct 2024 20:44:58 +0000 Received: from GV2PR08MB8121.eurprd08.prod.outlook.com ([fe80::4cd3:da80:2532:daa0]) by GV2PR08MB8121.eurprd08.prod.outlook.com ([fe80::4cd3:da80:2532:daa0%2]) with mapi id 15.20.8026.014; Tue, 1 Oct 2024 20:44:58 +0000 From: Mikhail Kshevetskiy To: Tom Rini , Dario Binacchi , Michael Trimarchi , Frieder Schrempf , Jagan Teki , Mikhail Kshevetskiy , William Zhang , Dmitry Rokosov , Igor Prusov , Bruce Suen , Alexey Romanov , Chuanhong Guo , Martin Kurbanov , Miquel Raynal , Max Krummenacher , Francesco Dolcini , u-boot@lists.denx.de Subject: [RESEND PATCH v4 05/10] mtd: spinand: more use of spinand_to_{something} helpers Date: Tue, 1 Oct 2024 23:44:37 +0300 Message-ID: <20241001204444.917238-6-mikhail.kshevetskiy@iopsys.eu> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241001204444.917238-1-mikhail.kshevetskiy@iopsys.eu> References: <20241001204444.917238-1-mikhail.kshevetskiy@iopsys.eu> X-ClientProxiedBy: GVX0EPF00011B5E.SWEP280.PROD.OUTLOOK.COM (2603:10a6:144:1:0:8:0:16) To GV2PR08MB8121.eurprd08.prod.outlook.com (2603:10a6:150:7d::22) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: GV2PR08MB8121:EE_|DU0PR08MB7812:EE_ X-MS-Office365-Filtering-Correlation-Id: 5b081663-c641-4a9c-ed6b-08dce259ea0d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|7416014|376014|52116014|366016|1800799024|921020|38350700014; X-Microsoft-Antispam-Message-Info: Kf/v7RAo0r8V+SfVF8gpajAzfJdxUgcg388zIwby4tD4pW1f9DBDuRnc90mJ8M+GdL0eT2J94BkC7by5yWvjJo06utLctS38IHTIu+YZ3egcfGnjmTaPz0LmBFwzK20ms+zV2aUh/U9dpfP4yzt+EkCSUlMU7bV9GDBpfKOJzUQuZxWMdGybz5C5TIPg0HYoBKRMJs3MpkuR/B2F+IcEFYxkXI6F+BRo1qvQxMTfZkfwb4tJzsZRxctk6v9ovFUXbgAjuQXOiwjFGt2XXshXypS4aYhiDdckzb+l5juyw6tmuGzaG1PW8JvE+9FX1zIINIdknm+Gr+7lfy7Q9ZBcNVZllinz27hIYjV/dHVSdkWhEzdjnjhSlRccYgZkFGXwxPOK93TrIwtXQmKYXXDAz7TydTHhVjfpxPtozdCzvUj7uB4aMdWQVzNu8AmMl26hhHD09Ubl6czZ/ZNPjpGT4YnetIk1HXaVrgz+zBgRn+JYtK24JK1M/Wno7tl4gpcO/DUMSFyT/WjmLaJaEneAFRh6ASXvH84mUJrAyYec8yVk0TtPoRqPqjwe8uaHuRxnAJZgqwLfRenLTd6Q0cAe/IMKFrvoGn0lJiTqcTn7BcZsWemhYt/Q0nmmGC71h/N3NBzS/KzRhIIKlyt1vzKri3YqkoQ24kZocNUlWzZutLA8NDjtwzHZHzlZkHYuCunH7tLPuUMr0mppKwvebXKK5a7JjDsffRScFvHie8doya1B5NrZTmun/FfZr7cOf1sohaeKVMwlkJsERoPN8zTXTofDZbitvXuZfdxIGbVarsfSpd/NGM/hu58LpvbvDWjnplVmj2WxCyjrIhU8QIT7DD2RnvZ1LKVz/LoqMTI4I+oQ4zqK9PVXKpM5RO9qJTxmh0Ds1NJgBBqhDTGT3dcA00U0rqb+tS7bxeZxYxszrZtc+AZ4eRRoUOVDpbj/Yy4lrqzMdC7Shtmtbjdbc7774uo5/jMV9yrdfb9E2YSGXQQjEcviFIBU7hvJiYHnF1OF7Lz6wpBEhxuRIl5OLIoCk0Ih2fUqHnUKvuIZcRoOIwzxATaB39kWMb8wgzKvJq+9lGj80Yl2zMsUKBgJThcWVPoZrXIknRw8CbSIxgEqfiZsdeVGuYl358AgoEx6tIs8f0KEE4JEBqTdjQJyKPEzKpVYMGj9ozK3G7WfiWrl1Qh4jTMY85lGLoQGssm82ZzbrAa9sQB0MfpwvVcP+7pCrUu9dMxt2Zgd1ri0tCJlLtkpAm+hCd6L0JS4iZ8/YhgJ6xGyFnJV3FwU7+Byz7Vnrn/43CWqaGapovbYrL+ET53HEQYDI+FldBgjWaByq2okLXmRJVWD14or0WyXGNGsk81Ukf2P8oMvLg545mUW8yc= X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:GV2PR08MB8121.eurprd08.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230040)(7416014)(376014)(52116014)(366016)(1800799024)(921020)(38350700014); DIR:OUT; SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: JY2q7xk2pJ1SW10qQcswYctLtDn2v5Pa6dfGCM9opLpttL3qFbnTNUf/D6ZiJwkOiNpFzAjFO0XCBdw1Iti3sqE2gep/U4SV5c+u/LW+SN8G9Gvh2qiL8YtpI/LNlUQFFkpxew8ASEk7jEnRwittRUeG8U+yYgf8STjXnjxA3f2A961DCgYjSPN9FjOsAdTapWntXBcMDWHzq7YPN6BjZEOyY5Ly+ff2+pCHTAEpiGrdBbMHiVAmudFt+HA65gzIE8LFwVREH+/KdWJxBzyK1NuLvLAGYgrgwQlHqg4dMyxt+ztAAjXhvzqauAXDLapCDVo3pA9Kp27EVMTC01VoAo/Hu60V/QdKq+UEsrsEvbuq44fo9JNdSUKzcQwEP/ZjG3DUzaBJwNKuNkZW30+kUBXU+CMRD1ZcnYtRiraxp/akp/flqvkal+GOaWtEGk6gjX+7UStlUl27SvVasike4YlM6Cmu2mra/R0wpRjk9QWIDL/qvAncOLvAiuDyXK9MNLjv/KFsLgIAOq+ETRWwlPnKxC0wK2mXe7Iz50h8nwtgjIHOnTOx3wEKk6Fuof0nn7gd5BNfHiTRkQfxF1K48HE0bUHM3tBEii7PN5QzBwmzRNJX65gtCflsJeh9s0Sp85RKWfzGGmqK+bh1Psdj1sooMrmGxEoLEExSlWp1k/cZQ5vTDbZrw8Uxby0ADUiu/gsUhhk73QHMh3frHuKzwCn+RbQTUFMHa9KnPUoc5CKsM8+V2pbzv6FPUGMETyb6iTw1quSmm9ZLZ3QFi5oitW6VakKNg0eaXrMDrqz9nDYM3x3qyuulFUEPoVDqjxH+RmsXx7r7thXjx0H/sd5svzTHNKTONQLafqZZ5y1sNoXQVP95BY38NfZtCInc0leci7UBKkyq75J9PojRN/Itvelc6qRwO6UJo3qhMpl9rBlpqu2UWyEUTXOLHaOURMBtJI7qpUifdd/9ppVF/7Z0/9/Wi7XE3dS2MjX0KKjRnJJnMgJjyuCno3D9Ou9zq+yzNCPYeVEIqIMoAwNnc4wAjBe0zz3Wkrj/mOfF5yVHwu4IoBmqEb3WngeVdVYjAwsEn9GJuvcYkTzbC3sfbGWF1CXB2TUNXkGw3uo57CXwPTdsP+cuSdnWlglekDcaPYg4spkGfh7H3cZw/eSNGfVYS8dE2vD7haEbEXbLzBQgRQUBhwHumwiWp9bQO/JPPt8vtNKwVEZ14uN6JtuGPt5VTNx+8lPs0vnp19yY4NMF3d3wKXyNOzpm2XZhl8s/4FiDR3mcyMVORM7lKN1Cy2+q6KAzA2wn/aAPASlUdIyJw4mbC2ac5dQBcRfQGhUl8r9Wgliwbu+8sChF64YH+rq4+N4X313z0tUrNRbnhPHWJm6Ihc2aIlGaljTbNTG9iaV6oXEvJX7l+ekHoXF8Y1N3CkzVn3pckoZTC8tT9sNXG1+HOvw9EwPt9DK9G2uW4zYCLYSgSG/1x5SuDJWDpx7DUkzh9ZcX/H/Fr4qj/YQ4FHUnYaFCseAU8qN8aLVs7uAIrN/0JZAcSkpdxGoDD8E4CQ6P3YynYHnetTENW2/sd1TF3HWGaq5VCbxA3KXV1iQpnPRlGVdO56ADwl/ApG323VKq06+x315xat1zjbT7Sdc= X-OriginatorOrg: iopsys.eu X-MS-Exchange-CrossTenant-Network-Message-Id: 5b081663-c641-4a9c-ed6b-08dce259ea0d X-MS-Exchange-CrossTenant-AuthSource: GV2PR08MB8121.eurprd08.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Oct 2024 20:44:58.8087 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 8d891be1-7bce-4216-9a99-bee9de02ba58 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: RYp/VW4VAzXOMb1HSuNUz7e1+FAAQXystLrGr252P1YfI17LEpFq7AjzvLWPw4dL5ipJq6t9VpNbD1lzgzVahHFkqaOcW31xatyjSLMDfa4= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU0PR08MB7812 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Use spinand_to_nand() and spinand_to_mtd() helpers instead of nanddev_to_mtd() and direct access to spinand structure fields. Signed-off-by: Mikhail Kshevetskiy --- drivers/mtd/nand/spi/core.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c index a10605487f3..b58d9e00907 100644 --- a/drivers/mtd/nand/spi/core.c +++ b/drivers/mtd/nand/spi/core.c @@ -236,7 +236,7 @@ static int spinand_read_from_cache_op(struct spinand_device *spinand, const struct nand_page_io_req *req) { struct nand_device *nand = spinand_to_nand(spinand); - struct mtd_info *mtd = nanddev_to_mtd(nand); + struct mtd_info *mtd = spinand_to_mtd(spinand); struct spi_mem_dirmap_desc *rdesc; unsigned int nbytes = 0; void *buf = NULL; @@ -294,7 +294,7 @@ static int spinand_write_to_cache_op(struct spinand_device *spinand, const struct nand_page_io_req *req) { struct nand_device *nand = spinand_to_nand(spinand); - struct mtd_info *mtd = nanddev_to_mtd(nand); + struct mtd_info *mtd = spinand_to_mtd(spinand); struct spi_mem_dirmap_desc *wdesc; unsigned int nbytes, column = 0; void *buf = spinand->databuf; @@ -356,7 +356,7 @@ static int spinand_program_op(struct spinand_device *spinand, static int spinand_erase_op(struct spinand_device *spinand, const struct nand_pos *pos) { - struct nand_device *nand = &spinand->base; + struct nand_device *nand = spinand_to_nand(spinand); unsigned int row = nanddev_pos_to_row(nand, pos); struct spi_mem_op op = SPINAND_BLK_ERASE_OP(row); From patchwork Tue Oct 1 20:44:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mikhail Kshevetskiy X-Patchwork-Id: 1991720 X-Patchwork-Delegate: dario.binacchi@amarulasolutions.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=iopsys.eu header.i=@iopsys.eu header.a=rsa-sha256 header.s=selector2 header.b=QSVW/Dk6; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4XJ92W1Gccz1xt1 for ; Wed, 2 Oct 2024 06:46:11 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 20055892DE; Tue, 1 Oct 2024 22:45:05 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=reject dis=none) header.from=iopsys.eu Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=iopsys.eu header.i=@iopsys.eu header.b="QSVW/Dk6"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 7FA15892D5; Tue, 1 Oct 2024 22:45:03 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_PASS,SPF_PASS autolearn=no autolearn_force=no version=3.4.2 Received: from EUR05-DB8-obe.outbound.protection.outlook.com (mail-db8eur05on20701.outbound.protection.outlook.com [IPv6:2a01:111:f403:2614::701]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 7E3E989256 for ; Tue, 1 Oct 2024 22:45:01 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=reject dis=none) header.from=iopsys.eu Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=mikhail.kshevetskiy@genexis.eu ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=oiyAbuqbb9Tx7DW+GdCOU7MRoXgLNqV43f1JpVymi6tGPVGqo+ktCzkZFjqb/SVz0PPLSVzJ9ELqH8GmV2J9gZCyR8XyX12bisqDRFHhZASrL8QaWHRUmH7NZFhVpO/fSVEtqgy7Vtr9oMhHmKeeqhsM8BuaAiFswyQ4g20skkqjQAQHcqoaiGvfu11ytbBWUxZyK6HVeHEVk+XtqeVGaIRcVnDZ79J0ZM0vW1YZQG6C+h0EgxpkuySekMtsQYSL2q/EYOW6BXdfsER+mXeqqY1KCNBOY7AzbGhl9Sa3GAJ4lFREYOyigaZ+CoKlTbPKgctKfR0z4a5kiZ4qk4gqJA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=oBVMf1HtML+wrbFAbRZ5Dsb3MxqYGNYI5rU8KrmMS70=; b=Guf5MKMWtO7dGXpYGTkt2usfOezC3WpKgjIrv+Gr7ZM0ybU07l/I2ajWAhHGOvjZSG3DMmVLJ3zAcrr2EieXL/Zi/XWk5v6galkMTgjfTGaXhWtekURXeuth5U0sOMidlGhAYhwk2HlmPT01hE6Z+7zgZQA2ITAuozWvyD2aSul9U1FdQmfCIBipxX4oi9Dz1NUnJVhl4Mvi+CvdvDEzHy+aARqQR7TpETr8vu/Ea8TYJGpmaObIq9xbsxFAg5Hf4hdbmbHIOpy+g/QqLqQGCwz3l0W9TBW745tBvfjk6EWutVHv4hYxqCARv/uz37th4kWuX2q7pvpUkFl9r9LUIg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=genexis.eu; dmarc=pass action=none header.from=iopsys.eu; dkim=pass header.d=iopsys.eu; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=iopsys.eu; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=oBVMf1HtML+wrbFAbRZ5Dsb3MxqYGNYI5rU8KrmMS70=; b=QSVW/Dk6FAX+Gcs1WekaFEli7J09Y1zIv2OypPpRIwtk8T8gWxs0KFjogQJfPRw6NwrcKVGbc7AxSW5IwbplQx5C3q1Ey0Mq8sK3+LLW4ROUuvhvOdYdR1lX2wJ1MX/2I6RR0zz5+iYcWxsRhpu3HSSiQKnji2hTLt1GEyZ3MdfCuYGmf0rQkAmQB/ezwxGLvcXdeqa2Asrpfssj/BuAa1Hv7Ww8QD3ufRwABO3w/GYpzvArd2IG3k48ZnQXf1PbUOrjzzX1d/frqnOEo/cnHlp5BNC4InepVAbq8uscyA03gYGcgrbfI0xoxsndD0b2du7Re/jYjiNkpH05jHncOQ== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=iopsys.eu; Received: from GV2PR08MB8121.eurprd08.prod.outlook.com (2603:10a6:150:7d::22) by DU0PR08MB7812.eurprd08.prod.outlook.com (2603:10a6:10:3b4::8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8026.15; Tue, 1 Oct 2024 20:45:00 +0000 Received: from GV2PR08MB8121.eurprd08.prod.outlook.com ([fe80::4cd3:da80:2532:daa0]) by GV2PR08MB8121.eurprd08.prod.outlook.com ([fe80::4cd3:da80:2532:daa0%2]) with mapi id 15.20.8026.014; Tue, 1 Oct 2024 20:45:00 +0000 From: Mikhail Kshevetskiy To: Tom Rini , Dario Binacchi , Michael Trimarchi , Frieder Schrempf , Jagan Teki , Mikhail Kshevetskiy , William Zhang , Dmitry Rokosov , Igor Prusov , Bruce Suen , Alexey Romanov , Chuanhong Guo , Martin Kurbanov , Miquel Raynal , Max Krummenacher , Francesco Dolcini , u-boot@lists.denx.de Subject: [RESEND PATCH v4 06/10] mtd: spinand: replace enable_ecc variable with disable_ecc and update corresponding logic Date: Tue, 1 Oct 2024 23:44:38 +0300 Message-ID: <20241001204444.917238-7-mikhail.kshevetskiy@iopsys.eu> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241001204444.917238-1-mikhail.kshevetskiy@iopsys.eu> References: <20241001204444.917238-1-mikhail.kshevetskiy@iopsys.eu> X-ClientProxiedBy: GVX0EPF00011B5E.SWEP280.PROD.OUTLOOK.COM (2603:10a6:144:1:0:8:0:16) To GV2PR08MB8121.eurprd08.prod.outlook.com (2603:10a6:150:7d::22) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: GV2PR08MB8121:EE_|DU0PR08MB7812:EE_ X-MS-Office365-Filtering-Correlation-Id: 27151be8-53be-490a-ea41-08dce259ead8 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|7416014|376014|52116014|366016|1800799024|921020|38350700014; X-Microsoft-Antispam-Message-Info: K/aPy1K8hWCBtbteWR9oKTPFYYTQ2dpy+vVnhya5DqgoqNlt72lK61Ic2fUk68OxXARYkFGsad5u9BeRON6xjrRXOXCXdYSS3i+fFzaO2K+nJPJBeVUsolndFSErFR8EqzywF1pTWj0WTetQ/43Broqo4+7DG5iEhyzVdG7Yg60ABYUDSLR2oEYXyugVNmECofu15jTaND1e9GU9noldrVG8F/cpg8g7WdEnKWQPJOreg2sZe7fAWY06cND1u/faPZMBCQSxQiBGAa4Hxm/zEDduq/v+TmJaAecSNKJevh0hAl2Qd3qlgr2H+QDOlg+u3rJXQjmxwnNfim8sLPQjOibvW0bUopeM5A93QLlZ69NgUcUco2aSi1/kpJ6UnRhSIEXzMYGf416DnYotYAbfU5uAaKE/+OloKhN6pZSR3btotm8s9vO8b3z5BfqeKy6sJkPtTTJsU0gZe1hwdgGFZYaYDIhT0qPUgHUQsNJPWZXbCSnRMGTcEf4q/6gU0e6c6mmOz6JXpIg1QPwmDutDbK7Qnk4pRk7vfKsRRVl/iz8Dh9opLdq4PqQZB/IP4UcGF/GV41QO5RRJ1gwDD1itvO5oZn+RwyWGr5wuSvfHfLsk4j0lCa50pMRLOW9X6UdkRL5uz+Vi13CFLomvmBWNKc/8VWLxbhXjQui6Obqa9Lxtz90D/RrEpa0ZLzQaLRGtj91QTPi7R2EIe7uGLEcCFjQy52tcFC0PDDsrhL0Moy+sCd6WoLlgDAImJLTjaddsg+hAcxwcFCC4DYzKSZWDOROnNW99eWM3qWvX1Upk9SN5Gj9MrAzB5SoPkKLWT1VNXk/oVbxvYxNHO3A0B0C7Lul0/Mf4cUh+wdzAdBa57N8tVeA14+PH2rAn+T7KFSYSgdRrg9cBZOj8pUFLU+l4At6u5n2+ymwva7OlZZ1D+2Xcyz7HnHKstB+4ey9tyLQDDXfZnGOabnnhwhubQY2yb70b+pGH81No1WmBPBOEMjqRzc+aKE0G+5fuxPJoaTcf4Wmm2QkwEYLJHBIVl6b6wgKO93EDZABfA3sFJMirh5Th6WjEPkFRz0iyGONabkogX3TdEN9RXk74/zltSqZWeOe/XS5mvp/H/d4kMcXd1OSHEtfyCHQ0HqubQ58O8Zeg0EBpUqk8aO0Z/aTI6/uzpuvkYaD75/I3w45OaolS+dr2wlYdsk9LeJNzhoZE7eV60MPq5r3bogGR+t8hz2S+ms4bSy5BfbW+0I/mLF2Q9hduy/gJFm0ZGUZHyTO22aZgYeHXna+nrSas4NHTt8jOrHOm/tLrImD9Sb9B7ko1wjuaukN1mgpxKrSLE5z8t1Sp4wjq/CgiQW6rfJDnft+AYXcwEOy89OU3YTve6VCEY6A= X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:GV2PR08MB8121.eurprd08.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230040)(7416014)(376014)(52116014)(366016)(1800799024)(921020)(38350700014); DIR:OUT; SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: Abu3G3AdTNaVOOzerpHySIzZ9VyLqg4gCe7kgc6N34o4KGVbfA9Fsjk4urzjrh/h3ryIC9tWL+WbWnWo4yxafhMP5cdx/8AdSy0R1fTg84s7/nxfFAEXauruQKrqeYc5z0+hUlv14YPgyiHH6DMq1y1hMdpQHJdn8/kzgE7UHtPzvBhMWtTzIxRohOQRvpfD2EJ0U/lf3u4hNFY7wCJ4fme3g8YQn6Aesgu3NALzwyNHTPDylyJZvz5yRpqguW4CJSULqzZbRSvGw0lKeyBsCcRMwGl6pvA5NDO/+zwLy0+B7h1qNMALC0naYUL2txzU1wrBspvBsIIhdkNumcbNeSi6iRsAlUYe0/eMALjfht7BMZ3/FgiDIfxwq+qYqK7G6RNbp5eKcXmct55VYsP+5+9aUD0wyQF82do0r97ofCyMl7ECaccxQ9qZAY2Ebnct2C6ZlqTNVMK1oZm9v1SK1XLna+VKx9/bPJVr8VgeLOC5WbHuonVJnOIeJBPriA84MlAiJA4hpcszjwAffBkd0zV7tHHOeQk98rteUesoZbyQ68Cd38UjfoylODAHnYDZUEnumRofKRnLhn31q5YJI0zThiHC68K9wV7X1m5NU9piOxQzGq71SrD1tgJ/Pt9Kpw++puFHfhTq5bY0bIPu4Fzz0WP5q01MrMOz+Nu08VtL2+NUKSfrUQ3SovJ+HHgCPOvqSe5xmYgZfjc7JUasHe+H9qJ0IcGinYXTo6kAiL6JnHagJPLSFUqJFjUZHGW0B1l/4NW8H6M0HMWf9lbZEF0DUEOgvuxT5U3o+Oyb1p0yz/Xd6ZQHd13zqQk7C07bH2A4CzzyrIaeZslzNsXw5BASX61pYJTFB1HjIQq/ZQ9ubLGReZ2sarSyXu1uuSHH7OreFXvYV25GF4l717QfcARrybM5u3Hc6BQ6y7LwpbYHzrzPi+Ubl3BHaRt7+H0X3n7Q8GOUSj0yobDhWSfUJqww2mgl5tPu29j8ENXZiJCPM1s79wvo4sR2byLXOF/AMFkKyxHb9XvxWeTTYJXGdiA+RVohxCSHsZUYxymbkqdjbJOkhOHu0kUh+z9uNaYKB95ScRT+gVCSDXRAoal9JKDow8FUT7YoeBf2kT37msmN9bcDnBFJ64/gTUL365vd1+l+odLytk3r1umg/PxKD9fpIf3l2tWgC/RI9fsL0ArLmA+Zjrf14SPMV44bW397/CxS3K86jjjpUN6YKMtdU6HVo0ju97lsDowcC0K1nmchho+ZIYPiCwhTawDBIcmEIx9hVTh6UYVsj/qrtK9FyY7K9dTzrAak8E5Wwf/e8RQH/0TcFtCEJdUgyQh6pq47ys+UtWc6Y4pfXaKJ5BwsJ92q43d3UzqACrX/+kBgIaGL+kaCSn/jQushFu1MbXw/zYXMgi3vexrtdF3AJgHu9k+9JCGzzIEyoW+sFWe5QFj4a5uSEf+sA6/mfqPKh9xQs6z/rDLbVAc0oUaFCG+rme91EGfFl5+S3dWC3/goBTL7KL0nym3RgrJR3DJwqQN2uRDMF15O9GlfYJFVRAu2lSWNIhyE4pyHOrL1AtDsxuonPB5eAZ1pbmIB/Iu4sLOd83EWJgheg/g/pxgoVWSyZIZ6NJ25lme8FgDlpbUNoPg= X-OriginatorOrg: iopsys.eu X-MS-Exchange-CrossTenant-Network-Message-Id: 27151be8-53be-490a-ea41-08dce259ead8 X-MS-Exchange-CrossTenant-AuthSource: GV2PR08MB8121.eurprd08.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Oct 2024 20:45:00.1376 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 8d891be1-7bce-4216-9a99-bee9de02ba58 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: n3sTQ60/Ge9RHprpgkgMIX4g0XoAHD3/fthaEJrtuFypngEoGd5QFzxtdaQjKxIzh9nYCR1uJ8N7Zg0Xd0kTKMLHDhgKHiIAccJoilq4R70= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU0PR08MB7812 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Signed-off-by: Mikhail Kshevetskiy --- drivers/mtd/nand/spi/core.c | 24 +++++++++++++++--------- 1 file changed, 15 insertions(+), 9 deletions(-) diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c index b58d9e00907..9629fac3388 100644 --- a/drivers/mtd/nand/spi/core.c +++ b/drivers/mtd/nand/spi/core.c @@ -530,12 +530,12 @@ static int spinand_mtd_read(struct mtd_info *mtd, loff_t from, struct nand_device *nand = mtd_to_nanddev(mtd); unsigned int max_bitflips = 0; struct nand_io_iter iter; - bool enable_ecc = false; + bool disable_ecc = false; bool ecc_failed = false; int ret = 0; - if (ops->mode != MTD_OPS_RAW && spinand->eccinfo.ooblayout) - enable_ecc = true; + if (ops->mode == MTD_OPS_RAW || !spinand->eccinfo.ooblayout) + disable_ecc = true; #ifndef __UBOOT__ mutex_lock(&spinand->lock); @@ -543,15 +543,18 @@ static int spinand_mtd_read(struct mtd_info *mtd, loff_t from, nanddev_io_for_each_page(nand, NAND_PAGE_READ, from, ops, &iter) { schedule(); + if (disable_ecc) + iter.req.mode = MTD_OPS_RAW; + ret = spinand_select_target(spinand, iter.req.pos.target); if (ret) break; - ret = spinand_ecc_enable(spinand, enable_ecc); + ret = spinand_ecc_enable(spinand, !disable_ecc); if (ret) break; - ret = spinand_read_page(spinand, &iter.req, enable_ecc); + ret = spinand_read_page(spinand, &iter.req, !disable_ecc); if (ret < 0 && ret != -EBADMSG) break; @@ -583,11 +586,11 @@ static int spinand_mtd_write(struct mtd_info *mtd, loff_t to, struct spinand_device *spinand = mtd_to_spinand(mtd); struct nand_device *nand = mtd_to_nanddev(mtd); struct nand_io_iter iter; - bool enable_ecc = false; + bool disable_ecc = false; int ret = 0; - if (ops->mode != MTD_OPS_RAW && mtd->ooblayout) - enable_ecc = true; + if (ops->mode == MTD_OPS_RAW || !mtd->ooblayout) + disable_ecc = true; #ifndef __UBOOT__ mutex_lock(&spinand->lock); @@ -595,11 +598,14 @@ static int spinand_mtd_write(struct mtd_info *mtd, loff_t to, nanddev_io_for_each_page(nand, NAND_PAGE_WRITE, to, ops, &iter) { schedule(); + if (disable_ecc) + iter.req.mode = MTD_OPS_RAW; + ret = spinand_select_target(spinand, iter.req.pos.target); if (ret) break; - ret = spinand_ecc_enable(spinand, enable_ecc); + ret = spinand_ecc_enable(spinand, !disable_ecc); if (ret) break; From patchwork Tue Oct 1 20:44:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mikhail Kshevetskiy X-Patchwork-Id: 1991721 X-Patchwork-Delegate: dario.binacchi@amarulasolutions.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=iopsys.eu header.i=@iopsys.eu header.a=rsa-sha256 header.s=selector2 header.b=tYyndZPV; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4XJ92k3TD7z1xt1 for ; Wed, 2 Oct 2024 06:46:22 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 85116892EA; Tue, 1 Oct 2024 22:45:06 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=reject dis=none) header.from=iopsys.eu Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=iopsys.eu header.i=@iopsys.eu header.b="tYyndZPV"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 604A8892CF; Tue, 1 Oct 2024 22:45:05 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_PASS,SPF_PASS autolearn=no autolearn_force=no version=3.4.2 Received: from EUR05-AM6-obe.outbound.protection.outlook.com (mail-am6eur05on20702.outbound.protection.outlook.com [IPv6:2a01:111:f403:2612::702]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 1F98D892D4 for ; Tue, 1 Oct 2024 22:45:03 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=reject dis=none) header.from=iopsys.eu Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=mikhail.kshevetskiy@genexis.eu ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=ubfGKofa2F1tCSte/MM3Bja1MW60vchqn04mCc+CuPWdAU6DMbxya/VAkKqLNp7BDQvKPBwocqqAuf1TkrxoP1Dx3+uw+nIuTBQUFC20nhlwdfH4UX04DXZyspqLNTSyb6egPkXl4n0aAGp5FwDbnxD5+WrC0hh2XmvPkZG2vXtht6GVTt0sS+Y6lpX20rezkTH/N5mQTxFNv+sLVOMhf9SVO4Kyh27/Tdd7SShxyw8Cd6juEmqC93WcRBW/jZhbV8+AaXyNG6LS+9wSInwdJqqTiCHG1ojdJwn8kkjjryx7EReJ4dDhdOM2PxkHpPaqx4cRnBRY1yV7M0DtFdSDsQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=bHIpUbd1tqYqQ+cvO4iqyoaIM/DkUZef+50hZighZbo=; b=xPkCciz63LMlm8XkyV0mGaygSkK7vfOoVDC2v/sZB/9VUeJTf0/IBydpmMhESf7AE14FFwS/VvyYZ1ai5oQ3TTWZPqGphjgX3E9qvv/D8bNUTFdtI2iBYgrJIU1/udXtE14UHQwVJ80/vMT8/nheh6TbMoGohfLD9fap4GKBkfmx+//g07gzwTzcrNzpcmirscfrgQRZNhlCQLQAOwYs7znKiBqZ/IX49TmX1Cvv0sVwKhbKdIHvC2/TJw9OUHC3guhEV9xlVlcC4DhPiG5UtcFMYCTk2o9HLpYJdbINqku6z9V5GUR8VQfIMsqSnzgE/+xKtAVwrn78e2DvOKloKA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=genexis.eu; dmarc=pass action=none header.from=iopsys.eu; dkim=pass header.d=iopsys.eu; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=iopsys.eu; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=bHIpUbd1tqYqQ+cvO4iqyoaIM/DkUZef+50hZighZbo=; b=tYyndZPVCpFYEz5u0kNfC8cZejd2x3oz3wxWF0eMaJCv3QrsbUio5aMT0TF8reWwjYkEFm74Pcf5InQYwRzZhxN2CUpiS0g/rHWM/ODIVN6kG0Whi9wC18YtsgcMIBAaNSwUrFDNqSSZ/kJNmpr0sLDPNR088CBX6FPPg9FuxUWSdWofmUsIB8JzDFkp07qa6bj39/McM6BNc7KpDWfTbFkrXvlPxCbHw06ubLqBNoPgqZj4T7NLe1Dld82Xl/1qzWjqxiUPAsXqufNe6tD/b0Lb+9L15mDZCTRw6DFLDikqjhNkRzmSY9LbawOJvmp7G/DnxRKwbWT7lOZyGVM3Og== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=iopsys.eu; Received: from GV2PR08MB8121.eurprd08.prod.outlook.com (2603:10a6:150:7d::22) by DU0PR08MB7812.eurprd08.prod.outlook.com (2603:10a6:10:3b4::8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8026.15; Tue, 1 Oct 2024 20:45:01 +0000 Received: from GV2PR08MB8121.eurprd08.prod.outlook.com ([fe80::4cd3:da80:2532:daa0]) by GV2PR08MB8121.eurprd08.prod.outlook.com ([fe80::4cd3:da80:2532:daa0%2]) with mapi id 15.20.8026.014; Tue, 1 Oct 2024 20:45:01 +0000 From: Mikhail Kshevetskiy To: Tom Rini , Dario Binacchi , Michael Trimarchi , Frieder Schrempf , Jagan Teki , Mikhail Kshevetskiy , William Zhang , Dmitry Rokosov , Igor Prusov , Bruce Suen , Alexey Romanov , Chuanhong Guo , Martin Kurbanov , Miquel Raynal , Max Krummenacher , Francesco Dolcini , u-boot@lists.denx.de Subject: [RESEND PATCH v4 07/10] mtd: spinand: minor refactoring Date: Tue, 1 Oct 2024 23:44:39 +0300 Message-ID: <20241001204444.917238-8-mikhail.kshevetskiy@iopsys.eu> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241001204444.917238-1-mikhail.kshevetskiy@iopsys.eu> References: <20241001204444.917238-1-mikhail.kshevetskiy@iopsys.eu> X-ClientProxiedBy: GVX0EPF00011B5E.SWEP280.PROD.OUTLOOK.COM (2603:10a6:144:1:0:8:0:16) To GV2PR08MB8121.eurprd08.prod.outlook.com (2603:10a6:150:7d::22) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: GV2PR08MB8121:EE_|DU0PR08MB7812:EE_ X-MS-Office365-Filtering-Correlation-Id: 1485deb1-99a8-4651-53e1-08dce259eba5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|7416014|376014|52116014|366016|1800799024|921020|38350700014; X-Microsoft-Antispam-Message-Info: OlFw9zvgAOCU8pBA39Yz/3AwA1QmALMM+ipNcDFB6z7gE4gANEUgZLH71RnfHK+fRE26nx7qxaj8ihWbGa7b6px2GcO7oC2ueVklSPaDesfHQoZV+YLJz7lUdJR28yJJGUpZa98l+EoE6ooWkz508l8wfyTdYX86uQbYEer6U7ARb2G/r8FVz6UBLyzfO4FHMLM4pF6UcwtPzN7dmKXdQGKasrYxL365xprb257DjxVLFma6HIIn6oeWFeyYNlsxr7FjzOJMkRyxKDa8W5KsYWDGXDN3nTdKjNPucURVNvOm0b6owbt4H9aSAuFAVM3yUoGOiG10kRrov30JBokVb5K/qaC+FTMmyK4sKvgWvk9mD/PNuzgpkdaNpu5JIk8+2DaIWxc8K0ZVycD9qIQmF3g7cKrMVohmvZ8jPYmOruIoT4N9sdgeU54nc07B9VAhKPlvQcTYtPlAlPKFIxz23CTQR6n9Em5yGN4F0VA0G7VDJTCbb5HUppFSIy7B/p2c8wxsIOdaKbAAnctg/I7v5+cOC41XEtaobCqjNWbC8nPSwJ1fDChs8ELHiYZkBVvuXiHkKa/4WCtbkFTfHadiYVajtA3VJ733DhLnU5uB4hp73SlBeFK9zBm/vF489mS31xqHfe5q1UtfB8A5zuvPoXwlMEbtWfQTmoFPwwvRTAwXhriwczHEfMwz+T258r3CX1n3lSYm7+nhVwQvjUlGC1tr5XUKfqMlULGUv1EcMa1WtfcZQsjzQvk/geaCpL6p8/MU7CErAcBdUtZxlp4dBuusLav0s6zhiqIIvSNNf8O3EPTCt0Tsd/emQ3vtum8Fi7nFcG3pHyKFrNpcQe0Io2xyxb/sWF2Q1Go+xiwGoB5oidtFQx2OPI32aiDWCE6d6p3MwUyKbrBlVMIKOw1RzE+7kSW0YD83bKV03jijXy56YlZxeSTP6ZA1SbqOJnUHds5REV3CjsJpzL/c96zpCpWr9wtaaAW+JaSGvPZARTnSg95nzLGuMn666T0IMaYon97GAutt8xYdV06oC9qubiOG1m02Rp0Yw8bF0Qjq0ymnrd1JmDyJGaImqGsGRnO2MIDRIPBGkciZuUrlp/o5Ud3sB2uKZ+50ZgFX2xpnLLITU3HDXUjpb+57CkZ8ln5FsCsJ8NJORu2+L+xlJW2tJrfLufBIKJS+J0b4QhOzkcFOENmujMQ4M9VM7SxuJ69xD/L20IkaD8S2B5z6TrZbN8NcVUx/J8bFGdphrHR747nt7CYXEFK/rCgpQqjPB9fjbxkVetOWdX07bo6vhcL8vtwQ2KySk8ZNrxk/H8297dpDgLNAofJvksfq2vpdE3v2Qc7MEUNlkYvOi30/5cm0lkN8EhY937yY3Nb1Xv2Uh4A= X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:GV2PR08MB8121.eurprd08.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230040)(7416014)(376014)(52116014)(366016)(1800799024)(921020)(38350700014); DIR:OUT; SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 3Y8KO6Jt00qZXSz7vGCThafx0nv3ZlHkYgqdqYHUYrTjGYx3sHdMq+xz3eyUxy4QGoqzbfwm4sYJDoIjMUYsxoZshz6y8NhuuZIptMQvXnS1stCuKuQAP2CbIbDaWdsrqGLeSuFwz0BKdM6pHZyHMabLBXwG//CuHgvQYcezWEIAF71SR50irRS1M3h1Wgo495i22ZtsZzWyjcEVcTxUpXDwRF3QWqpihInNx1+/j7LHQHDOaULoC2w6FwHSZkQuLa3Fr3+FV7B4dmSLFwwbMBXjA6fOvgnuAnl09+ncz1hbSOd0sIioE+1c0c80dAmvMfXtZSw2nLh58MfB4ScZmY/+XfD3ZyxkTNsil6UiL0ODdMmghbLffGavSMu+YVJSPFt08d14lQHZ3ZjCCKMI81ENCWXV4d6C50Yf/A7WFGygpZUZDTeL2F7fcdYyYD5YpzzniziMfWUY4K97LAa828kGcY85RIgA582ofH3ccNDPbgZ3uhYCN1FJX9lZaOU+3zOing2A8NgPlOJM3Nt9xTGtya5JVBmaf6r3yfXfV0QZJEUzCqFqibYNqPHNz8ZoYQy0h73cwy4/cmfF3jG6v+op9jARhvh8hndGjXnf/npXRfsbatMXrHVG2fd9zNtzozMWMjGa+TYIP0ldg5DYsL/D+lqdxzDTNvzOKFwStCIDmIT89FoaN9eY1cr3M/2i8Hjxeph0/WJGtHTO4+64lP3JaW2mkU8oeGGS7HgbrgcT49qCLOZO+qq9ZcZc/ZektRZ7DpMKUAtQvmqQebhdyRmAnoYWnwagP+CEB5vACN6uvUwk+dymK0g1UpAEx5+hSyoHPYj7tsQ1P+eRJQBqZ/spdKj/PHUp76PhbS/fqqhwakKnz5Xxgi0rOdjFE3yQI0SO3CoT0fYDojmWJYucPqfH7L7doQ2tZMLrILHbvsILhcnlmeS6N6fEnxQjlLhq5ciIbciwPsHIiOZS80gwdV3Tn1767bOI7My10yHId+2S/FjkJnuQHDC/j+KTKe0gU0YfFU/HG4vYWpqYx0pjXnb6TgS8n8wtFh1PSCBSvXwNhwG82kkL7hbJeDx7wMDScw1v/XQXpt0bWUDvISoFf9JuCpTTSn0ze/+Y+nheFcjySys26wJ+udi1BSECg15VZEqBtwiZN2T9tGvFJ+RBOzKrnaooCRsek11n7HX6LsqpOEBtOYFbRIk7i4PPQT8h+ATMtWvCnTkQJt9K8TgJz5eyObTOpvM9LVm7MLknXxYQy0urPKV1r5jVN8MeroQDxuayxQrlVc/R70N5wjKk2l2LnWv5uH/k8GB6c1BR9picNsI5mINAramEeTS4POpuzpV5p6KucpRV0VRO93tCh+XU4zC8gjzsI6e8FepsKR8szXHiSMdteegUAGfRdUa8TRNx/zael1vI3JidBbIaw8LfF/IU5C3okOlNeW+azGkJsd46DSRlCl/agTn4llNXXG/yn3HIoBOTQnJuFw+YnN3PUktRkSLrqrf6PmKh1X5s9Yp+ZiKut8eyzqL9POTzD0FTiFVqjoNmrlt3GVEpHx6wFjuFTvrUzaaiA4iHNCDD03eYP0niBWjJN9MnM9floQMLjQGoAvyp6j0B6iDjx5fCd5BOWb5XEZGQOHTtn50= X-OriginatorOrg: iopsys.eu X-MS-Exchange-CrossTenant-Network-Message-Id: 1485deb1-99a8-4651-53e1-08dce259eba5 X-MS-Exchange-CrossTenant-AuthSource: GV2PR08MB8121.eurprd08.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Oct 2024 20:45:01.4667 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 8d891be1-7bce-4216-9a99-bee9de02ba58 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: bzCmUNDtlul8ipTWDPy81bKVym1yOabHWt3hyezsTl/jd7GCzBEcPjKNp0cJFjlHG36JTH4V4I+6M74RZnBJzhCzaot601rgPny7ZPOFFW0= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU0PR08MB7812 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean No functional changes, just some refactoring to match better linux kernel driver. changes: * move spinand configuration reading out from spinand_init_cfg_cache() to separate function spinand_read_cfg() * move spinand flash initialization to separate function spinand_init_flash() * move direct mapping initialization to the end of spinand_init() Signed-off-by: Mikhail Kshevetskiy --- drivers/mtd/nand/spi/core.c | 112 ++++++++++++++++++++++-------------- 1 file changed, 70 insertions(+), 42 deletions(-) diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c index 9629fac3388..6ca8b7c80cc 100644 --- a/drivers/mtd/nand/spi/core.c +++ b/drivers/mtd/nand/spi/core.c @@ -160,20 +160,12 @@ int spinand_select_target(struct spinand_device *spinand, unsigned int target) return 0; } -static int spinand_init_cfg_cache(struct spinand_device *spinand) +static int spinand_read_cfg(struct spinand_device *spinand) { struct nand_device *nand = spinand_to_nand(spinand); - struct udevice *dev = spinand->slave->dev; unsigned int target; int ret; - spinand->cfg_cache = devm_kzalloc(dev, - sizeof(*spinand->cfg_cache) * - nand->memorg.ntargets, - GFP_KERNEL); - if (!spinand->cfg_cache) - return -ENOMEM; - for (target = 0; target < nand->memorg.ntargets; target++) { ret = spinand_select_target(spinand, target); if (ret) @@ -192,6 +184,21 @@ static int spinand_init_cfg_cache(struct spinand_device *spinand) return 0; } +static int spinand_init_cfg_cache(struct spinand_device *spinand) +{ + struct nand_device *nand = spinand_to_nand(spinand); + struct udevice *dev = spinand->slave->dev; + + spinand->cfg_cache = devm_kcalloc(dev, + nand->memorg.ntargets, + sizeof(*spinand->cfg_cache), + GFP_KERNEL); + if (!spinand->cfg_cache) + return -ENOMEM; + + return 0; +} + static int spinand_init_quad_enable(struct spinand_device *spinand) { bool enable = false; @@ -1073,11 +1080,55 @@ static const struct mtd_ooblayout_ops spinand_noecc_ooblayout = { .rfree = spinand_noecc_ooblayout_free, }; +static int spinand_init_flash(struct spinand_device *spinand) +{ + struct udevice *dev = spinand->slave->dev; + struct nand_device *nand = spinand_to_nand(spinand); + int ret, i; + + ret = spinand_read_cfg(spinand); + if (ret) + return ret; + + ret = spinand_init_quad_enable(spinand); + if (ret) + return ret; + + ret = spinand_upd_cfg(spinand, CFG_OTP_ENABLE, 0); + if (ret) + return ret; + + ret = spinand_manufacturer_init(spinand); + if (ret) { + dev_err(dev, + "Failed to initialize the SPI NAND chip (err = %d)\n", + ret); + return ret; + } + + /* After power up, all blocks are locked, so unlock them here. */ + for (i = 0; i < nand->memorg.ntargets; i++) { + ret = spinand_select_target(spinand, i); + if (ret) + break; + + ret = spinand_lock_block(spinand, BL_ALL_UNLOCKED); + if (ret) + break; + } + + if (ret) + spinand_manufacturer_cleanup(spinand); + + return ret; +} + static int spinand_init(struct spinand_device *spinand) { + struct udevice *dev = spinand->slave->dev; struct mtd_info *mtd = spinand_to_mtd(spinand); struct nand_device *nand = mtd_to_nanddev(mtd); - int ret, i; + int ret; /* * We need a scratch buffer because the spi_mem interface requires that @@ -1110,41 +1161,10 @@ static int spinand_init(struct spinand_device *spinand) if (ret) goto err_free_bufs; - ret = spinand_init_quad_enable(spinand); + ret = spinand_init_flash(spinand); if (ret) goto err_free_bufs; - ret = spinand_upd_cfg(spinand, CFG_OTP_ENABLE, 0); - if (ret) - goto err_free_bufs; - - ret = spinand_manufacturer_init(spinand); - if (ret) { - dev_err(spinand->slave->dev, - "Failed to initialize the SPI NAND chip (err = %d)\n", - ret); - goto err_free_bufs; - } - - ret = spinand_create_dirmaps(spinand); - if (ret) { - dev_err(spinand->slave->dev, - "Failed to create direct mappings for read/write operations (err = %d)\n", - ret); - goto err_manuf_cleanup; - } - - /* After power up, all blocks are locked, so unlock them here. */ - for (i = 0; i < nand->memorg.ntargets; i++) { - ret = spinand_select_target(spinand, i); - if (ret) - goto err_manuf_cleanup; - - ret = spinand_lock_block(spinand, BL_ALL_UNLOCKED); - if (ret) - goto err_manuf_cleanup; - } - ret = nanddev_init(nand, &spinand_ops, THIS_MODULE); if (ret) goto err_manuf_cleanup; @@ -1171,6 +1191,14 @@ static int spinand_init(struct spinand_device *spinand) mtd->oobavail = ret; + ret = spinand_create_dirmaps(spinand); + if (ret) { + dev_err(dev, + "Failed to create direct mappings for read/write operations (err = %d)\n", + ret); + goto err_cleanup_nanddev; + } + return 0; err_cleanup_nanddev: From patchwork Tue Oct 1 20:44:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mikhail Kshevetskiy X-Patchwork-Id: 1991722 X-Patchwork-Delegate: dario.binacchi@amarulasolutions.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=iopsys.eu header.i=@iopsys.eu header.a=rsa-sha256 header.s=selector2 header.b=i2oRA6kt; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4XJ92x4VJ9z1xt1 for ; Wed, 2 Oct 2024 06:46:33 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id E236D892E3; Tue, 1 Oct 2024 22:45:07 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=reject dis=none) header.from=iopsys.eu Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=iopsys.eu header.i=@iopsys.eu header.b="i2oRA6kt"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 734C3892E9; Tue, 1 Oct 2024 22:45:06 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_PASS,SPF_PASS autolearn=no autolearn_force=no version=3.4.2 Received: from EUR05-DB8-obe.outbound.protection.outlook.com (mail-db8eur05on20701.outbound.protection.outlook.com [IPv6:2a01:111:f403:2614::701]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 443BD89256 for ; Tue, 1 Oct 2024 22:45:04 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=reject dis=none) header.from=iopsys.eu Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=mikhail.kshevetskiy@genexis.eu ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=cNusK87UVFjOMgaiWW0s51GiYV1DJTlbMwN9eXrqh8jtNl6vJUfJApZmmNs+14CBd1L40AbNlZR8xq2ANE/8dpRCw8sB79gnG/9pGk9ufBCjeybLyaxFINuzc9tnUkA3vKdprzuJdmTICGkd6blwzQthebSOEO9/BP84SeAl+vUM/RJuJ4QjCr6rmfmBCPhBw8s8IMEmmBkkogpYmNldGp39CKO3rPbACPJ0o8rD/h2qlAxoftXKPH4gL/Cu9wanKaKOV2ycOCVDw5bN3mMvWNB0h1aRXu2N4CxYwkABUgLlDdS9D+oAHuWhf8cIhJQIIRBtvowaS3pe8VErC0ba2g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=l/6p9hFb4G9HBd9BBmwi2nVPzvtan2Glp8fZHCixB3k=; b=BdDXlL+OYxtRuFqq3KNvve3hbPY/IajMiA3x+f6DZsjr5wsqZyish45K9/u8X9cuJLHrtlTsuJ4uYj3Szln+XHdDKHtnSy6OXsWJAIeDShI1dS16BLY8wzvj1MBe4p6/ihyV5lnjVevBtILIft3d5MQ8QKGsySYOR3G5dEn15ciHpYuN+9mtTYU2wSRHWloH+n1fQ+N/VtffVY2bt33slVuUjTOsqqruA5hpm4yI7RJYe5ZvmDvrZPq/WpJ3ClF6JJVXVmzo9MIOWdXD7GgiozFVeDnn3yMfWaSVTjli8B3MU73tgUFm6DdHKMUzujgSEOE5fXnS8RMiWY33eM+S9A== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=genexis.eu; dmarc=pass action=none header.from=iopsys.eu; dkim=pass header.d=iopsys.eu; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=iopsys.eu; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=l/6p9hFb4G9HBd9BBmwi2nVPzvtan2Glp8fZHCixB3k=; b=i2oRA6ktYJZy39BLzFWerYzqFRuVJbHCAlVx/b/R+qiK+a3k1RyWwalaLwncr0Rat620NvIqDlgAV3+p/CsxLeKxdrl7Bf3AEMjUm2VfLfVC8RGORlxRYbZ0ArXDXi8+2J8GWVR8W/BYT/GCCmrMrB+LVR1x6FdwFLeOmiC7j+PPDxJi7lDFK0m5ywTMYuXayXIgyo7+h6UvbQgprw3ADCzFkbXq5joR2eZjCVPkYPfj4hboEYnNRoP2+wAUpVARAFuWCw1tRiIpMBVdc+MJ63aSdiuGqsNuhiU1AOXcAB7Jce91PrUyCv6q/NMpsZODl1oMAU0LLOY+Xq9O9sV95w== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=iopsys.eu; Received: from GV2PR08MB8121.eurprd08.prod.outlook.com (2603:10a6:150:7d::22) by DU0PR08MB7812.eurprd08.prod.outlook.com (2603:10a6:10:3b4::8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8026.15; Tue, 1 Oct 2024 20:45:02 +0000 Received: from GV2PR08MB8121.eurprd08.prod.outlook.com ([fe80::4cd3:da80:2532:daa0]) by GV2PR08MB8121.eurprd08.prod.outlook.com ([fe80::4cd3:da80:2532:daa0%2]) with mapi id 15.20.8026.014; Tue, 1 Oct 2024 20:45:02 +0000 From: Mikhail Kshevetskiy To: Tom Rini , Dario Binacchi , Michael Trimarchi , Frieder Schrempf , Jagan Teki , Mikhail Kshevetskiy , William Zhang , Dmitry Rokosov , Igor Prusov , Bruce Suen , Alexey Romanov , Chuanhong Guo , Martin Kurbanov , Miquel Raynal , Max Krummenacher , Francesco Dolcini , u-boot@lists.denx.de Subject: [RESEND PATCH v4 08/10] mtd: spinand: more refactoring Date: Tue, 1 Oct 2024 23:44:40 +0300 Message-ID: <20241001204444.917238-9-mikhail.kshevetskiy@iopsys.eu> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241001204444.917238-1-mikhail.kshevetskiy@iopsys.eu> References: <20241001204444.917238-1-mikhail.kshevetskiy@iopsys.eu> X-ClientProxiedBy: GVX0EPF00011B5E.SWEP280.PROD.OUTLOOK.COM (2603:10a6:144:1:0:8:0:16) To GV2PR08MB8121.eurprd08.prod.outlook.com (2603:10a6:150:7d::22) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: GV2PR08MB8121:EE_|DU0PR08MB7812:EE_ X-MS-Office365-Filtering-Correlation-Id: 4b0b076c-7d9c-441e-bb1e-08dce259ec7d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|7416014|376014|52116014|366016|1800799024|921020|38350700014; X-Microsoft-Antispam-Message-Info: 359Jagj3e+ylXNBDXgbNFNz1ZmYL13Po45l4BOFeiasDlQbG5COALD6cmzt07+kYsdHkjU9dHOgDwCmebMiVhYq2ZeU3V4td3WHwxOZjRpR5evH4viDJcrlxf0ZKVwKg0ES9sWQwTEeKHSOb5FiwfFVf8jwrpx0P9z0KAJjs03j+ufHS+mzLll092QlscenZP/9JGbU1peY90ks32EbeqfFEjfZTMtXHYh/qPy2jEhb+Q7Vsgfg6Pzz9ZtbXb6G7MJErtw7L8UPRXtOvHSWTxkpJcaZEikQThPEQG8WxmJH20orrkaWyM3j8HqzrrIMJarBJEJ9uC+iksXPMXyJJUXtkkqONx8i+84kT69QHEr+sqodGf6TQkS0QKlSnn71LJoM5rfkWVfqq5HwdlRg9J4DHG90RO6W3LxjrK6wHJxL8Yf7WWC0ZHKV0ncb/9QRtF7zfFdaG+qvXb2+bwZv67SkEDMJHWX7Wy1tnulL5t/7LghUDlCOL/HxLJnkpabK1ukvJejWNAo6PLWgkS04ZbKi4vPpMBk7QMgb6QxxF+Ue5U1BBsc9KK9ycoZ1/alY/3PWCRPjMzcBhzH7zzJeFv58XDrILOlu54fVZIGZK44gv++n49aBpImfnB+zAfh0AQTfCHWAcYudfHJJHLF+mL52q3ZzGOLtUAHkvkWK6RsqAdNBD5uSZMqOJwNDTZYbdE9qeFI8t9z/OmnRyaz7GzunHwAjXefT73C4cSUXepJn3x7nbcFMJbfOtdrNscUI65d+MqDBMQ4AdDX/8GN5X3qYL4n9wS00tI9Ig6wtCiFjHGHe5S8eSitjxXbzqQYIX0GvLTvPw1TPvqKe+5B5+ufGYaQxJYZTo7+7qx/tgyMPUJP0gRA0kG/tmtlvu8uUUoSBDcAIEh2VD4UCwsgVXd4euY8mExbBuhrC4y4FCwpKgVNmB8BFDoMaCztb3l8++zn/6NcoOBpxbv4BW9epH0yz/fXakbqOJqy4zveW2nGOMBxF5vQv4nPhxQPD0miqnj3MEOGS+vT9eyeEZT0PV9iHNgK9CekXcsYfP1Y7mlZVFSWWr5MOIXRGks6BN8+IiLmTrzAnV1JgLH905hm6/anQlFYpE5eOkBXWx5kca3rKsVT3ZFvZ3pJ1ABLw+xiPbpj6Z6a9CwKaDREFOCjHg9jdz9c8bqIENKXJu6bI2321LSqIbzcJVUXAvwHvcv+qf9A76vpIZ1mKNxsZTTToH8mj77GQ6LVw833tFxcwYY1YP0c7IQwXQk9YLJ6U8Kky8j22ozZwrTQazkd6SjRIGy8NbTEUirpl8FPXM2mLhuI49sj7KpVB3gASKwoI8eeSdLNb0x16Y+enIyi72hZz+uA== X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:GV2PR08MB8121.eurprd08.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230040)(7416014)(376014)(52116014)(366016)(1800799024)(921020)(38350700014); DIR:OUT; SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 0tzA6H/ByiAXjSRdQF0Cg2TBAHOaJucNp0WlP2Igem9zJm0qXpmScV85hEvadu4RrzEPFA8XwQ92Ertm6TN9F9J5WXxy4LY0IQJv+tg1BS+IjxhL0mWZtqG+f3npGqtmnMcCRtBYCBrlCvl2vavPktPT/9SWsSOHBjVwJxYHRHlYjHGSVQoDxoH1qdWisNFAD8RIFxDLjg6DyA/RKSXKA3P2s0KQvEvRfHKfNlXfISf1JUqKgSp4ejS6ghh+UHJHNuDaQBCPmCAeHodD3FdnYHKe6Sv4y4OLnEtAoS8z2DpvRMJ3PIZlCyYkScl+MB4vJTFLVv2w8xNjcrWv2SyM6sK9pSVAspu1tzk6e/L7iKEHosHIRuWunPRcprLZN4oTjIY6YNHzShQg0tgDQF7TJQ9e5W48wPOpwT66B+rTCdImFTUS7D3aPoqPjpKASecxyIo7VO5Rat2x8HC/9QBPOZXINwsN20CcPfa8jCZfpxFg/tr0CihvAWohOySsuQvNxhRiBl7TMo8OeU+H0jwwpWCYgj+1jndqf5gKZnzL5y2ktSrmo5QypP/oREeqp/6ugoeGKHCd/G0TvDm0WpQWBGcYNqdBpUxiLwM/Nmau0EBdCM2gb3oeHOm86FLbCqScKv9edmpFHyEEUefoZlR1xGSKwfh4oavy7WiHNhopkJkBFQdSujaOtQzHixrwZEs6gTwMNF4yyGa1+Dx8klWpAkVYnk+NgqwcNY001OGC3ORSZuTgqL30reY6UcPLIRpLe9YVbKOp3w0TCjQ8q6Zxo2oOAjnBcMiQTtWw+h1H59Q7lfM17+e3ByrE/Mav+D3Ar2NxuIdyqxgS94C3sxYb4i7tgwGf2ryhAyAgRPVHm0jh6gkak544gbYCnqATC3EztRpuT2ag8rLnBGERXEX1hQob4RYqjsQF19Lr7Sk+CUJiQLhjeNT+GnGw9bMZ5xCjhzNfVWarLFK5MjpBWNew9TJqY3uGdU7CePdGHk71jpXUkGIo9yu2FflPvI8ORI/wcP4PdTAbNU9MVudqDNY8AlLdvwnkLXP0t6Z6txLvOh1uK9e6TcJVX/CDPMxjpjeLUGW7B/TE+TukgtfPSDqzztAlE+yw4VkOqf94h35rd21PKxRptBIEChdW2pPqA3RNkOIAZhpNaYg2slI8IGu6PDRkW9P8eOtkl1tqZ3mFtfnUHycCBc1WGUF3rDjFHrgh5T8kMK1Hj83jVf4Gku+hClqTEDA6b68dM+CAkpMxH0TbLXgxJG/G0njTK3A6hL0zOQ3SRFWLK2r0CkJauuSgen8tjCNzzPvjC6Al4gM9jhxL0IPchdW2C2sLZiGrowF9Xjd3yq6noyzj0Y8LapOPD1uv/4pvAIGima4G883sQP8xMUajMXRaZYc37P0YUbRdnh03sqIXGD+CcaWQ1eBOqAfq8AUVYRGsrCvU/rdLiFNhPNOybdw5K3kFHLZoM/ufS4/0vTEcsqutSu6BLhb2/OdSNDz1NZLvABOUobI1GcH07SXSc+ywMk2iOFFU0K8OKvZm2+OWiaICgjiWG1fRmw5xzDWJqo0IGdGDpNkkxVUvku+rxlXmIE7sykuJkU1AsYCpsjE0HObdw9LV/dBOBx5+WfAM00dKtfb8IdvbSCk= X-OriginatorOrg: iopsys.eu X-MS-Exchange-CrossTenant-Network-Message-Id: 4b0b076c-7d9c-441e-bb1e-08dce259ec7d X-MS-Exchange-CrossTenant-AuthSource: GV2PR08MB8121.eurprd08.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Oct 2024 20:45:02.8850 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 8d891be1-7bce-4216-9a99-bee9de02ba58 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: jgoeQ82Eog/TLoV/x8U1qlpJO0DK2S1xcyTLSVLAXGAoL2t/RSUDvVW7aCVyCRHs9VpkxXrJYAM8h6JuRqesIec8qVarj8Vg90nBCyd62VA= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU0PR08MB7812 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean changes: * Move spinand_check_ecc_status(), spinand_noecc_ooblayout_ecc(), spinand_noecc_ooblayout_free() and spinand_noecc_ooblayout close to each other. * some code formatting * remove comments not present in linux driver This make code more close to linux-6.10 kernel driver Signed-off-by: Mikhail Kshevetskiy --- drivers/mtd/nand/spi/core.c | 115 +++++++++++++++++------------------- 1 file changed, 55 insertions(+), 60 deletions(-) diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c index 6ca8b7c80cc..548a7144ee3 100644 --- a/drivers/mtd/nand/spi/core.c +++ b/drivers/mtd/nand/spi/core.c @@ -222,6 +222,59 @@ static int spinand_ecc_enable(struct spinand_device *spinand, enable ? CFG_ECC_ENABLE : 0); } +static int spinand_check_ecc_status(struct spinand_device *spinand, u8 status) +{ + struct nand_device *nand = spinand_to_nand(spinand); + + if (spinand->eccinfo.get_status) + return spinand->eccinfo.get_status(spinand, status); + + switch (status & STATUS_ECC_MASK) { + case STATUS_ECC_NO_BITFLIPS: + return 0; + + case STATUS_ECC_HAS_BITFLIPS: + /* + * We have no way to know exactly how many bitflips have been + * fixed, so let's return the maximum possible value so that + * wear-leveling layers move the data immediately. + */ + return nand->eccreq.strength; + + case STATUS_ECC_UNCOR_ERROR: + return -EBADMSG; + + default: + break; + } + + return -EINVAL; +} + +static int spinand_noecc_ooblayout_ecc(struct mtd_info *mtd, int section, + struct mtd_oob_region *region) +{ + return -ERANGE; +} + +static int spinand_noecc_ooblayout_free(struct mtd_info *mtd, int section, + struct mtd_oob_region *region) +{ + if (section) + return -ERANGE; + + /* Reserve 2 bytes for the BBM. */ + region->offset = 2; + region->length = 62; + + return 0; +} + +static const struct mtd_ooblayout_ops spinand_noecc_ooblayout = { + .ecc = spinand_noecc_ooblayout_ecc, + .rfree = spinand_noecc_ooblayout_free, +}; + static int spinand_write_enable_op(struct spinand_device *spinand) { struct spi_mem_op op = SPINAND_WR_EN_DIS_OP(true); @@ -413,9 +466,8 @@ out: static int spinand_read_id_op(struct spinand_device *spinand, u8 naddr, u8 ndummy, u8 *buf) { - struct spi_mem_op op = SPINAND_READID_OP(naddr, ndummy, - spinand->scratchbuf, - SPINAND_MAX_ID_LEN); + struct spi_mem_op op = SPINAND_READID_OP( + naddr, ndummy, spinand->scratchbuf, SPINAND_MAX_ID_LEN); int ret; ret = spi_mem_exec_op(spinand->slave, &op); @@ -445,35 +497,6 @@ static int spinand_lock_block(struct spinand_device *spinand, u8 lock) return spinand_write_reg_op(spinand, REG_BLOCK_LOCK, lock); } -static int spinand_check_ecc_status(struct spinand_device *spinand, u8 status) -{ - struct nand_device *nand = spinand_to_nand(spinand); - - if (spinand->eccinfo.get_status) - return spinand->eccinfo.get_status(spinand, status); - - switch (status & STATUS_ECC_MASK) { - case STATUS_ECC_NO_BITFLIPS: - return 0; - - case STATUS_ECC_HAS_BITFLIPS: - /* - * We have no way to know exactly how many bitflips have been - * fixed, so let's return the maximum possible value so that - * wear-leveling layers move the data immediately. - */ - return nand->eccreq.strength; - - case STATUS_ECC_UNCOR_ERROR: - return -EBADMSG; - - default: - break; - } - - return -EINVAL; -} - static int spinand_read_page(struct spinand_device *spinand, const struct nand_page_io_req *req, bool ecc_enabled) @@ -1056,30 +1079,6 @@ static int spinand_detect(struct spinand_device *spinand) return 0; } -static int spinand_noecc_ooblayout_ecc(struct mtd_info *mtd, int section, - struct mtd_oob_region *region) -{ - return -ERANGE; -} - -static int spinand_noecc_ooblayout_free(struct mtd_info *mtd, int section, - struct mtd_oob_region *region) -{ - if (section) - return -ERANGE; - - /* Reserve 2 bytes for the BBM. */ - region->offset = 2; - region->length = 62; - - return 0; -} - -static const struct mtd_ooblayout_ops spinand_noecc_ooblayout = { - .ecc = spinand_noecc_ooblayout_ecc, - .rfree = spinand_noecc_ooblayout_free, -}; - static int spinand_init_flash(struct spinand_device *spinand) { struct udevice *dev = spinand->slave->dev; @@ -1169,10 +1168,6 @@ static int spinand_init(struct spinand_device *spinand) if (ret) goto err_manuf_cleanup; - /* - * Right now, we don't support ECC, so let the whole oob - * area is available for user. - */ mtd->_read_oob = spinand_mtd_read; mtd->_write_oob = spinand_mtd_write; mtd->_block_isbad = spinand_mtd_block_isbad; From patchwork Tue Oct 1 20:44:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mikhail Kshevetskiy X-Patchwork-Id: 1991723 X-Patchwork-Delegate: dario.binacchi@amarulasolutions.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=iopsys.eu header.i=@iopsys.eu header.a=rsa-sha256 header.s=selector2 header.b=t+aItcUD; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4XJ9384KNlz1xt1 for ; Wed, 2 Oct 2024 06:46:44 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 47BE589256; Tue, 1 Oct 2024 22:45:10 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=reject dis=none) header.from=iopsys.eu Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=iopsys.eu header.i=@iopsys.eu header.b="t+aItcUD"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 1DC8689221; Tue, 1 Oct 2024 22:45:09 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_PASS,SPF_PASS autolearn=no autolearn_force=no version=3.4.2 Received: from EUR05-DB8-obe.outbound.protection.outlook.com (mail-db8eur05on20700.outbound.protection.outlook.com [IPv6:2a01:111:f403:2614::700]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 07FB1892E6 for ; Tue, 1 Oct 2024 22:45:06 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=reject dis=none) header.from=iopsys.eu Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=mikhail.kshevetskiy@genexis.eu ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=oehruwbicebLDOgHuDpWuXKLFj3uB+ClXvhTyVdaCP4dAAs0hzyrnG1c7Xz+DHace6xINKZBcsHvhnBXuil8v5E7TFfRQsvaQ+FepbH05O7YiI5b+JWslHbUq3L13mkuQUDU07cZPz4xUYJ3ICWDVscdCM+LAQVI97AkEa0QPHHoX2zVkUweVk2ms2x+O2wE3DyjNpqFpD4x58i9Hwy/2ssE49oZJ88k7UMK8Xerug0q9/O/bWr/yrLQiwxa6mzDkft/h3BZ17eeEilw4aZaI0/+JOHAJNnLlFOOase0mNhc0SqMcczd0SVZiPGd/drlXs1QvxlRRTdsCW45KIlQ/g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=9FVKMCs7g8msQQCy2l/Ny47c+XR4Rl1ZvMK36YZTPu8=; b=pYjfgZ8tsq3+3Rm5kU7Zw1DCkXfHn2zuKCdeggndB2GwAZQX5V8yy3paQIeemf2Kp4+nuCfl5QQIWDeRinxbDeV04lEe2R1Cd8p5KiHeEPK3kysU6528KE0OG8eN9z5XJ8qoJaHmnkU9MVcbQS8aUzUE6fZ7SV0SZt4AQ7aTNqJ2aaxd3Xnhu2D9EaDAZE4C85zXYM9nmIatF5MlTIJVST58riHHRhKCDvlwqcQjHWNseyWSOqaxc1EyNha5N0gVth2OsbFMvvX9XamqDLqS/XnzdKYTBq3LW9UaS/mbh5/gllLWDRi0Tiw9w8QXeI//H1/mS92JSTo88Sb2Rcre3g== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=genexis.eu; dmarc=pass action=none header.from=iopsys.eu; dkim=pass header.d=iopsys.eu; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=iopsys.eu; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=9FVKMCs7g8msQQCy2l/Ny47c+XR4Rl1ZvMK36YZTPu8=; b=t+aItcUDoiGPIG4fkd79CQ3mgOzCyYM/9kyJSreCNfjBUu931XpzgXgFbXkDFc89PG+Lits11YzgpQK5qgDYH3+FKeslVRDwLn3tccsfT9gRFis9cphU5P+fUQa1VxZWNVyN16jrz5W3b9t/XogCpwyxxqYaQEe30dQSoTF2hCVWJX6nm153vApqi7aAtRdIusE75eoHclVue17mgnNuUnXAypJZhoVrvBOjonuQ7rlqHsIAHAKLnyDeH1lzHic8mxW2sA2+tyibt2/gQ12tV6SjxMvE7GM8FgfVHp/gKb8MKGLXf27aAkEJfNVr3mgQgTd8qaeNg/oPDYzLK4OnFA== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=iopsys.eu; Received: from GV2PR08MB8121.eurprd08.prod.outlook.com (2603:10a6:150:7d::22) by DU0PR08MB7812.eurprd08.prod.outlook.com (2603:10a6:10:3b4::8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8026.15; Tue, 1 Oct 2024 20:45:04 +0000 Received: from GV2PR08MB8121.eurprd08.prod.outlook.com ([fe80::4cd3:da80:2532:daa0]) by GV2PR08MB8121.eurprd08.prod.outlook.com ([fe80::4cd3:da80:2532:daa0%2]) with mapi id 15.20.8026.014; Tue, 1 Oct 2024 20:45:04 +0000 From: Mikhail Kshevetskiy To: Tom Rini , Dario Binacchi , Michael Trimarchi , Frieder Schrempf , Jagan Teki , Mikhail Kshevetskiy , William Zhang , Dmitry Rokosov , Igor Prusov , Bruce Suen , Alexey Romanov , Chuanhong Guo , Martin Kurbanov , Miquel Raynal , Max Krummenacher , Francesco Dolcini , u-boot@lists.denx.de Subject: [RESEND PATCH v4 09/10] mtd: spinand: sync supported flashes with linux-6.10 Date: Tue, 1 Oct 2024 23:44:41 +0300 Message-ID: <20241001204444.917238-10-mikhail.kshevetskiy@iopsys.eu> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241001204444.917238-1-mikhail.kshevetskiy@iopsys.eu> References: <20241001204444.917238-1-mikhail.kshevetskiy@iopsys.eu> X-ClientProxiedBy: GVX0EPF00011B5E.SWEP280.PROD.OUTLOOK.COM (2603:10a6:144:1:0:8:0:16) To GV2PR08MB8121.eurprd08.prod.outlook.com (2603:10a6:150:7d::22) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: GV2PR08MB8121:EE_|DU0PR08MB7812:EE_ X-MS-Office365-Filtering-Correlation-Id: d1916560-6c9f-4cbe-e53b-08dce259ed49 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|7416014|376014|52116014|366016|1800799024|921020|38350700014; X-Microsoft-Antispam-Message-Info: 8G/7R88yOP88Jle3bNhHVxOJIBtULf5EmxtzYnTaMa6KJXyfEIARBy8TjDHTz6oUVg1NpRb0N9HNFbCmvAR8cWYx9QwzG6JeSr96LMoXZQxKBBCsN/KBKLUEpzb0kNJozZNZtpF/hU+iffMeJC+F/SWdrSNI98E7VLDKAtkuYtTBoI07xNEvVxe23+nd83zSd9WqeYgHPNyCIOBp3fLCV1hy1rT/p1oXeCHrTA3lJUPMt0B2TPNIx5l97TFyq2mT0bpPJuUR2EPgIbrYW2+b8HZFsabYUQnUS5mYjezAQOooMuwsoDtsuBeCNyJ0vjMx1Sh9f+/ayC1BLE1lIzPhV+j4zMREOJncUiN3F5/g1r/dv7ICxrdpaWuhTXRjbvVPmEIjUzzESFZsuLiwPzr9fr2gk7rOiv5rRieuCIEu+R56rygnD4ZYhVjeloccD/gnK1yPPhONt6gcP6R2d8RheGtILtryqNvJyK1d3x53vPoe8QmNapO5ZCaM2JKoFhYS7hXLuWV1nEVoE9n0Z8DS2CwDec8nva67R5WsIFyw7k0e57Ud48bCSxrgqnblHYv4+Xrb7Ja6BT9YOKK8jMIjAZ51C3abRFX3AFqgzJT8WvXq5M+rQTViK6LiTbRt0Nl4QxhXS2kfpZIKbPP9CsULFXG3MMC0pjfp/rtiUgH2NHLonhArTpohuxvc1r8Dn10jSHnySrJeQrLtARMgFRibxz/jK5N2rcT6Ihn+ylKbwv28PPTNyl2RY8VB+duNeAKmAV60UsmMxLhrqS6UH5i2FvZodORMNkNwysZiVBmKLDKt7I3EFjYidIfpTZr8SK0awjeQK1iiHddkFjfmsnwsjSwU3EoeCQ0wMMyeymYo+v1ujRasriwwCnic307hUaOWYlMVUb0evwqJr03bBRTvk1pGnG+p+u7X0Ybb2ikwHR6ih7hhYHwp1CFHdURSD6h71/XnoxMjLojCaqJW76TR8o5r4FiWKTYTBDYiN6YveuGSEkRvPqK7ckdjsx1xQNZGLv0PFMlF2tCeHsOqTgTrjJA4UpkzwQ1jz4MqkI1li3SQbqgu2m3GEcdrAUysG0jwzn1PsYOpeJrxreyDYvSjt6drg3NPa1rvfZ9HVLk/1aNCKgDaNgBqvkjiXfVpVx5bC/101PeNd11odxk2cOU0YcvN49zpoNqFKwvf8p5b4ilIcA2kNQBw75OEZnJA6I9ZMQ6V5Zi9ZapQmhbB+KSVVRLxE1BGrvKyng6tIwwnoJPgubxMVuBcJsVaa09iNLhqh0QjToqn4PKwemvBaedKM1XX4L6ituRCvTkZu8kSByr+qizwWSNGEt1u8BO3zEscJ8BxrKZALo+ujmkprD7voKKIueSh2FwhiY7uG7Pnlyc= X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:GV2PR08MB8121.eurprd08.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230040)(7416014)(376014)(52116014)(366016)(1800799024)(921020)(38350700014); DIR:OUT; SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: oXkJcXqoSIBqaS7TSZio4M6AaGZHyFj1ymyugfcTwiyGWPRRwq6yjKHJNonLmdVXJfkELgYy+Z2D+4ADDnohtIHXMLlsPhF7afa5lj2ukZRVV24D0t9D0Jn7iL/mdLVANAOc1kqwSNt1QYfpdFOym2MtaHuIf/8gbtWTCX2Faz7/K7sPWng/cS3EKfwmPboMhumX/LuWxGqCDu43x+dtu43E7cufQks4OE/8fBpj9HxUfBAC+7f/WJYx3JsPKJwewbIAfBL4kiBqLRJeojzqgNt1W+lI4eD55zcqwF3QHhSozmEMvZZEbwUVpt2tXHHzgyv/FpoIt0tkiy8BhVD8OXhEKDwwb/oPCdxQIYZdfmQngqPW6vY2z8Wnc2i9frgsce8jbuJ0XsmATD8+Vsm8x7A9UiIC9dFnCBUqhgNhrkM/cxGu2b/9yTCRnKJemWQ+waazx+8poJp56vmOM26xid7xp4gLzOJ/4OpaHRde4r9Jf4RpXOzbwUJPwzcyGOm/leY8xyE4s0MfDGT3wi9zZpRyrNDRAsRGUwxLsp6TgOOpmsmlPSf5Oa6LN5jZPdqUqqlHhAf+ZjEues7tQpP8uQE/4utWl15pPq64v8K5GiTBsKOCqp+tWq6i3mPRE38Xa2rB7MpnGkU2i4pD6kZcefzeqhJzmiwOW52bhi6KtKv/ftVo0f/mLl6sPA/rOhWbLJlOVGjhQ0KrvvKod3bIhRSSMew1BCysjJHQoBgchzCIRZ1uUAOPy9x+Z8KDNndoZiUPZ3KcN7m3+JjoJaxXv/MAN6ArwXBrFca+OqgdSKDoBxMmLom6l2VSz2uTlcOcuOlGJ1Rblzx/0FypCST3y67Z0MF2ckuHK64iimZBFSD3XJS4rZ7Z0nWGMrjpzTWZNVCQCCh8HZ91V1Wm6+Ry9dGiA0raPoGio1IbuPFRuDwb4QNLyBygTxmnngAFnaCxJcgecqx9qpaxpnDT+IEtwI6os/r+tlQ4qB6ivQfRdCO66jPo2appmuHUY1RIBcPGnWJgf5EKFb9hLhtM6LpZz14qRJspmQ9s0HDmjBgGMQDyDiesajTCH3pTMHco1Bq91UWZ+U0fPURsnrMYVdabd/wc97a+QiMCW8iPv0/Ag4AxX1L08edV+e2EZS4wYqEkOsN5iS8zlHirQ38hDq48GogSC0VY+Jd8Hep/dnukGMjmdxWdNdsNi5A5yJ6r5eHWrg09bv9B6jSY8bLzMe3HO2mTCl0QZMO50g8cmODP/beE3fr29lZui3HhrmcGfWB7n+M+ATWQhvRvZ5MVuAiSesMGiJFUqihJ69qAk5N2iBscZ2yZraC1zJF/kAP+tYyHx/rBpGGEdzY9NK9zKr5/pWlRgCniHVYDlML/oQgFaoNtcQkake5zzVeq20NKxLw7rKuIvCMCAPXl3ZVW4iE7jjwRoPmJoP8j7B2etHa87+2wae8zWHi2MzIBFyvUCEvmaDp18tu9ZoIh9RqYbIB1v1doejK8mDe2Xv7GZdMiwwl7Crc+c/xMCEVFHBpWMiH9OmrR4kJrTFG8jdjZPIa4FkTYynZCdP3lw4QeILMaI4bM0CJ3+Atwef6cW7Xn52Sz3+QEDPq+6Np4D4748JupsBDZI1xUv3V0ZToGViF+qiY= X-OriginatorOrg: iopsys.eu X-MS-Exchange-CrossTenant-Network-Message-Id: d1916560-6c9f-4cbe-e53b-08dce259ed49 X-MS-Exchange-CrossTenant-AuthSource: GV2PR08MB8121.eurprd08.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Oct 2024 20:45:04.2808 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 8d891be1-7bce-4216-9a99-bee9de02ba58 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: HNzyO60T+TjmSWwE5jXup8VoiB1/bvDFlgdZKKqil40Gch7vWaOb53cAMBh2OAIrsTILcO2gpMVFyPr1Qsq++KtAyYntWzCZmFmarT6nQOc= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU0PR08MB7812 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Signed-off-by: Mikhail Kshevetskiy --- drivers/mtd/nand/spi/Makefile | 4 +- drivers/mtd/nand/spi/alliancememory.c | 155 ++++++++++++++++++++ drivers/mtd/nand/spi/ato.c | 84 +++++++++++ drivers/mtd/nand/spi/core.c | 5 +- drivers/mtd/nand/spi/esmt.c | 16 ++- drivers/mtd/nand/spi/foresee.c | 97 +++++++++++++ drivers/mtd/nand/spi/gigadevice.c | 194 +++++++++++++++++++++++++- drivers/mtd/nand/spi/macronix.c | 25 +++- drivers/mtd/nand/spi/toshiba.c | 33 +++++ drivers/mtd/nand/spi/winbond.c | 57 ++++++++ include/linux/mtd/spinand.h | 5 +- 11 files changed, 664 insertions(+), 11 deletions(-) create mode 100644 drivers/mtd/nand/spi/alliancememory.c create mode 100644 drivers/mtd/nand/spi/ato.c create mode 100644 drivers/mtd/nand/spi/foresee.c diff --git a/drivers/mtd/nand/spi/Makefile b/drivers/mtd/nand/spi/Makefile index 65b836b34ca..d438747cf37 100644 --- a/drivers/mtd/nand/spi/Makefile +++ b/drivers/mtd/nand/spi/Makefile @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-2.0 -spinand-objs := core.o esmt.o gigadevice.o macronix.o micron.o paragon.o -spinand-objs += toshiba.o winbond.o xtx.o +spinand-objs := core.o alliancememory.o ato.o esmt.o foresee.o gigadevice.o macronix.o +spinand-objs += micron.o paragon.o toshiba.o winbond.o xtx.o obj-$(CONFIG_MTD_SPI_NAND) += spinand.o diff --git a/drivers/mtd/nand/spi/alliancememory.c b/drivers/mtd/nand/spi/alliancememory.c new file mode 100644 index 00000000000..e29e4cc77ec --- /dev/null +++ b/drivers/mtd/nand/spi/alliancememory.c @@ -0,0 +1,155 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Author: Mario Kicherer + */ + +#ifndef __UBOOT__ +#include +#include +#endif +#include + +#define SPINAND_MFR_ALLIANCEMEMORY 0x52 + +#define AM_STATUS_ECC_BITMASK (3 << 4) + +#define AM_STATUS_ECC_NONE_DETECTED (0 << 4) +#define AM_STATUS_ECC_CORRECTED (1 << 4) +#define AM_STATUS_ECC_ERRORED (2 << 4) +#define AM_STATUS_ECC_MAX_CORRECTED (3 << 4) + +static SPINAND_OP_VARIANTS(read_cache_variants, + SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); + +static SPINAND_OP_VARIANTS(write_cache_variants, + SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), + SPINAND_PROG_LOAD(true, 0, NULL, 0)); + +static SPINAND_OP_VARIANTS(update_cache_variants, + SPINAND_PROG_LOAD_X4(false, 0, NULL, 0), + SPINAND_PROG_LOAD(false, 0, NULL, 0)); + +static int am_get_eccsize(struct mtd_info *mtd) +{ + if (mtd->oobsize == 64) + return 0x20; + else if (mtd->oobsize == 128) + return 0x38; + else if (mtd->oobsize == 256) + return 0x70; + else + return -EINVAL; +} + +static int am_ooblayout_ecc(struct mtd_info *mtd, int section, + struct mtd_oob_region *region) +{ + int ecc_bytes; + + ecc_bytes = am_get_eccsize(mtd); + if (ecc_bytes < 0) + return ecc_bytes; + + region->offset = mtd->oobsize - ecc_bytes; + region->length = ecc_bytes; + + return 0; +} + +static int am_ooblayout_free(struct mtd_info *mtd, int section, + struct mtd_oob_region *region) +{ + int ecc_bytes; + + if (section) + return -ERANGE; + + ecc_bytes = am_get_eccsize(mtd); + if (ecc_bytes < 0) + return ecc_bytes; + + /* + * It is unclear how many bytes are used for the bad block marker. We + * reserve the common two bytes here. + * + * The free area in this kind of flash is divided into chunks where the + * first 4 bytes of each chunk are unprotected. The number of chunks + * depends on the specific model. The models with 4096+256 bytes pages + * have 8 chunks, the others 4 chunks. + */ + + region->offset = 2; + region->length = mtd->oobsize - 2 - ecc_bytes; + + return 0; +} + +static const struct mtd_ooblayout_ops am_ooblayout = { + .ecc = am_ooblayout_ecc, + .rfree = am_ooblayout_free, +}; + +static int am_ecc_get_status(struct spinand_device *spinand, u8 status) +{ + switch (status & AM_STATUS_ECC_BITMASK) { + case AM_STATUS_ECC_NONE_DETECTED: + return 0; + + case AM_STATUS_ECC_CORRECTED: + /* + * use oobsize to determine the flash model and the maximum of + * correctable errors and return maximum - 1 by convention + */ + if (spinand->base.mtd->oobsize == 64) + return 3; + else + return 7; + + case AM_STATUS_ECC_ERRORED: + return -EBADMSG; + + case AM_STATUS_ECC_MAX_CORRECTED: + /* + * use oobsize to determine the flash model and the maximum of + * correctable errors + */ + if (spinand->base.mtd->oobsize == 64) + return 4; + else + return 8; + + default: + break; + } + + return -EINVAL; +} + +static const struct spinand_info alliancememory_spinand_table[] = { + SPINAND_INFO("AS5F34G04SND", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x2f), + NAND_MEMORG(1, 2048, 128, 64, 4096, 80, 1, 1, 1), + NAND_ECCREQ(4, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&am_ooblayout, + am_ecc_get_status)), +}; + +static const struct spinand_manufacturer_ops alliancememory_spinand_manuf_ops = { +}; + +const struct spinand_manufacturer alliancememory_spinand_manufacturer = { + .id = SPINAND_MFR_ALLIANCEMEMORY, + .name = "AllianceMemory", + .chips = alliancememory_spinand_table, + .nchips = ARRAY_SIZE(alliancememory_spinand_table), + .ops = &alliancememory_spinand_manuf_ops, +}; diff --git a/drivers/mtd/nand/spi/ato.c b/drivers/mtd/nand/spi/ato.c new file mode 100644 index 00000000000..f0d4436cf45 --- /dev/null +++ b/drivers/mtd/nand/spi/ato.c @@ -0,0 +1,84 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2022 Aidan MacDonald + * + * Author: Aidan MacDonald + */ + +#ifndef __UBOOT__ +#include +#include +#endif +#include + +#define SPINAND_MFR_ATO 0x9b + +static SPINAND_OP_VARIANTS(read_cache_variants, + SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); + +static SPINAND_OP_VARIANTS(write_cache_variants, + SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), + SPINAND_PROG_LOAD(true, 0, NULL, 0)); + +static SPINAND_OP_VARIANTS(update_cache_variants, + SPINAND_PROG_LOAD_X4(false, 0, NULL, 0), + SPINAND_PROG_LOAD(false, 0, NULL, 0)); + +static int ato25d1ga_ooblayout_ecc(struct mtd_info *mtd, int section, + struct mtd_oob_region *region) +{ + if (section > 3) + return -ERANGE; + + region->offset = (16 * section) + 8; + region->length = 8; + return 0; +} + +static int ato25d1ga_ooblayout_free(struct mtd_info *mtd, int section, + struct mtd_oob_region *region) +{ + if (section > 3) + return -ERANGE; + + if (section) { + region->offset = (16 * section); + region->length = 8; + } else { + /* first byte of section 0 is reserved for the BBM */ + region->offset = 1; + region->length = 7; + } + + return 0; +} + +static const struct mtd_ooblayout_ops ato25d1ga_ooblayout = { + .ecc = ato25d1ga_ooblayout_ecc, + .rfree = ato25d1ga_ooblayout_free, +}; + +static const struct spinand_info ato_spinand_table[] = { + SPINAND_INFO("ATO25D1GA", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x12), + NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), + NAND_ECCREQ(1, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&ato25d1ga_ooblayout, NULL)), +}; + +static const struct spinand_manufacturer_ops ato_spinand_manuf_ops = { +}; + +const struct spinand_manufacturer ato_spinand_manufacturer = { + .id = SPINAND_MFR_ATO, + .name = "ATO", + .chips = ato_spinand_table, + .nchips = ARRAY_SIZE(ato_spinand_table), + .ops = &ato_spinand_manuf_ops, +}; diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c index 548a7144ee3..d5cb9026246 100644 --- a/drivers/mtd/nand/spi/core.c +++ b/drivers/mtd/nand/spi/core.c @@ -866,13 +866,16 @@ static const struct nand_ops spinand_ops = { }; static const struct spinand_manufacturer *spinand_manufacturers[] = { + &alliancememory_spinand_manufacturer, + &ato_spinand_manufacturer, + &esmt_c8_spinand_manufacturer, + &foresee_spinand_manufacturer, &gigadevice_spinand_manufacturer, ¯onix_spinand_manufacturer, µn_spinand_manufacturer, ¶gon_spinand_manufacturer, &toshiba_spinand_manufacturer, &winbond_spinand_manufacturer, - &esmt_c8_spinand_manufacturer, &xtx_spinand_manufacturer, }; diff --git a/drivers/mtd/nand/spi/esmt.c b/drivers/mtd/nand/spi/esmt.c index 7e07b26827a..23be098b885 100644 --- a/drivers/mtd/nand/spi/esmt.c +++ b/drivers/mtd/nand/spi/esmt.c @@ -106,7 +106,8 @@ static const struct mtd_ooblayout_ops f50l1g41lb_ooblayout = { static const struct spinand_info esmt_c8_spinand_table[] = { SPINAND_INFO("F50L1G41LB", - SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x01), + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x01, 0x7f, + 0x7f, 0x7f), NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), NAND_ECCREQ(1, 512), SPINAND_INFO_OP_VARIANTS(&read_cache_variants, @@ -115,7 +116,8 @@ static const struct spinand_info esmt_c8_spinand_table[] = { 0, SPINAND_ECCINFO(&f50l1g41lb_ooblayout, NULL)), SPINAND_INFO("F50D1G41LB", - SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x11), + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x11, 0x7f, + 0x7f, 0x7f), NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), NAND_ECCREQ(1, 512), SPINAND_INFO_OP_VARIANTS(&read_cache_variants, @@ -123,6 +125,16 @@ static const struct spinand_info esmt_c8_spinand_table[] = { &update_cache_variants), 0, SPINAND_ECCINFO(&f50l1g41lb_ooblayout, NULL)), + SPINAND_INFO("F50D2G41KA", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x51, 0x7f, + 0x7f, 0x7f), + NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + 0, + SPINAND_ECCINFO(&f50l1g41lb_ooblayout, NULL)), }; static const struct spinand_manufacturer_ops esmt_spinand_manuf_ops = { diff --git a/drivers/mtd/nand/spi/foresee.c b/drivers/mtd/nand/spi/foresee.c new file mode 100644 index 00000000000..7d141cdd658 --- /dev/null +++ b/drivers/mtd/nand/spi/foresee.c @@ -0,0 +1,97 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2023, SberDevices. All Rights Reserved. + * + * Author: Martin Kurbanov + */ + +#ifndef __UBOOT__ +#include +#include +#endif +#include + +#define SPINAND_MFR_FORESEE 0xCD + +static SPINAND_OP_VARIANTS(read_cache_variants, + SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); + +static SPINAND_OP_VARIANTS(write_cache_variants, + SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), + SPINAND_PROG_LOAD(true, 0, NULL, 0)); + +static SPINAND_OP_VARIANTS(update_cache_variants, + SPINAND_PROG_LOAD_X4(false, 0, NULL, 0), + SPINAND_PROG_LOAD(false, 0, NULL, 0)); + +static int f35sqa002g_ooblayout_ecc(struct mtd_info *mtd, int section, + struct mtd_oob_region *region) +{ + return -ERANGE; +} + +static int f35sqa002g_ooblayout_free(struct mtd_info *mtd, int section, + struct mtd_oob_region *region) +{ + if (section) + return -ERANGE; + + /* Reserve 2 bytes for the BBM. */ + region->offset = 2; + region->length = 62; + + return 0; +} + +static const struct mtd_ooblayout_ops f35sqa002g_ooblayout = { + .ecc = f35sqa002g_ooblayout_ecc, + .rfree = f35sqa002g_ooblayout_free, +}; + +static int f35sqa002g_ecc_get_status(struct spinand_device *spinand, u8 status) +{ + struct nand_device *nand = spinand_to_nand(spinand); + + switch (status & STATUS_ECC_MASK) { + case STATUS_ECC_NO_BITFLIPS: + return 0; + + case STATUS_ECC_HAS_BITFLIPS: + return nand->eccreq.strength; + + default: + break; + } + + /* More than 1-bit error was detected in one or more sectors and + * cannot be corrected. + */ + return -EBADMSG; +} + +static const struct spinand_info foresee_spinand_table[] = { + SPINAND_INFO("F35SQA002G", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x72, 0x72), + NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 1, 1, 1), + NAND_ECCREQ(1, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&f35sqa002g_ooblayout, + f35sqa002g_ecc_get_status)), +}; + +static const struct spinand_manufacturer_ops foresee_spinand_manuf_ops = { +}; + +const struct spinand_manufacturer foresee_spinand_manufacturer = { + .id = SPINAND_MFR_FORESEE, + .name = "FORESEE", + .chips = foresee_spinand_table, + .nchips = ARRAY_SIZE(foresee_spinand_table), + .ops = &foresee_spinand_manuf_ops, +}; diff --git a/drivers/mtd/nand/spi/gigadevice.c b/drivers/mtd/nand/spi/gigadevice.c index f2ecf47f8d4..f3608a13d8e 100644 --- a/drivers/mtd/nand/spi/gigadevice.c +++ b/drivers/mtd/nand/spi/gigadevice.c @@ -43,6 +43,22 @@ static SPINAND_OP_VARIANTS(read_cache_variants_f, SPINAND_PAGE_READ_FROM_CACHE_OP_3A(true, 0, 1, NULL, 0), SPINAND_PAGE_READ_FROM_CACHE_OP_3A(false, 0, 0, NULL, 0)); +static SPINAND_OP_VARIANTS(read_cache_variants_1gq5, + SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); + +static SPINAND_OP_VARIANTS(read_cache_variants_2gq5, + SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 4, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 2, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); + static SPINAND_OP_VARIANTS(write_cache_variants, SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), SPINAND_PROG_LOAD(true, 0, NULL, 0)); @@ -174,7 +190,7 @@ static int gd5fxgq4uexxg_ecc_get_status(struct spinand_device *spinand, { u8 status2; struct spi_mem_op op = SPINAND_GET_FEATURE_OP(GD5FXGQXXEXXG_REG_STATUS2, - &status2); + spinand->scratchbuf); int ret; switch (status & STATUS_ECC_MASK) { @@ -195,6 +211,7 @@ static int gd5fxgq4uexxg_ecc_get_status(struct spinand_device *spinand, * report the maximum of 4 in this case */ /* bits sorted this way (3...0): ECCS1,ECCS0,ECCSE1,ECCSE0 */ + status2 = *(spinand->scratchbuf); return ((status & STATUS_ECC_MASK) >> 2) | ((status2 & STATUS_ECC_MASK) >> 4); @@ -216,7 +233,7 @@ static int gd5fxgq5xexxg_ecc_get_status(struct spinand_device *spinand, { u8 status2; struct spi_mem_op op = SPINAND_GET_FEATURE_OP(GD5FXGQXXEXXG_REG_STATUS2, - &status2); + spinand->scratchbuf); int ret; switch (status & STATUS_ECC_MASK) { @@ -236,6 +253,7 @@ static int gd5fxgq5xexxg_ecc_get_status(struct spinand_device *spinand, * 1 ... 4 bits are flipped (and corrected) */ /* bits sorted this way (1...0): ECCSE1, ECCSE0 */ + status2 = *(spinand->scratchbuf); return ((status2 & STATUS_ECC_MASK) >> 4) + 1; case STATUS_ECC_UNCOR_ERROR: @@ -329,6 +347,36 @@ static const struct spinand_info gigadevice_spinand_table[] = { SPINAND_HAS_QE_BIT, SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout, gd5fxgq4uexxg_ecc_get_status)), + SPINAND_INFO("GD5F1GQ4RExxG", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0xc1), + NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout, + gd5fxgq4uexxg_ecc_get_status)), + SPINAND_INFO("GD5F2GQ4UExxG", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0xd2), + NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout, + gd5fxgq4uexxg_ecc_get_status)), + SPINAND_INFO("GD5F2GQ4RExxG", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0xc2), + NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout, + gd5fxgq4uexxg_ecc_get_status)), SPINAND_INFO("GD5F1GQ4UFxxG", SPINAND_ID(SPINAND_READID_METHOD_OPCODE, 0xb1, 0x48), NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), @@ -343,12 +391,152 @@ static const struct spinand_info gigadevice_spinand_table[] = { SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x51), NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), NAND_ECCREQ(4, 512), - SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + SPINAND_INFO_OP_VARIANTS(&read_cache_variants_1gq5, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout, + gd5fxgq5xexxg_ecc_get_status)), + SPINAND_INFO("GD5F1GQ5RExxG", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x41), + NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), + NAND_ECCREQ(4, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants_1gq5, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout, + gd5fxgq5xexxg_ecc_get_status)), + SPINAND_INFO("GD5F2GQ5UExxG", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x52), + NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), + NAND_ECCREQ(4, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants_2gq5, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout, + gd5fxgq5xexxg_ecc_get_status)), + SPINAND_INFO("GD5F2GQ5RExxG", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x42), + NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), + NAND_ECCREQ(4, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants_2gq5, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout, + gd5fxgq5xexxg_ecc_get_status)), + SPINAND_INFO("GD5F4GQ6UExxG", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x55), + NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 2, 1), + NAND_ECCREQ(4, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants_2gq5, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout, + gd5fxgq5xexxg_ecc_get_status)), + SPINAND_INFO("GD5F4GQ6RExxG", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x45), + NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 2, 1), + NAND_ECCREQ(4, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants_2gq5, &write_cache_variants, &update_cache_variants), SPINAND_HAS_QE_BIT, SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout, gd5fxgq5xexxg_ecc_get_status)), + SPINAND_INFO("GD5F1GM7UExxG", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x91), + NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants_1gq5, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout, + gd5fxgq4uexxg_ecc_get_status)), + SPINAND_INFO("GD5F1GM7RExxG", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x81), + NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants_1gq5, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout, + gd5fxgq4uexxg_ecc_get_status)), + SPINAND_INFO("GD5F2GM7UExxG", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x92), + NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants_1gq5, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout, + gd5fxgq4uexxg_ecc_get_status)), + SPINAND_INFO("GD5F2GM7RExxG", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x82), + NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants_1gq5, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout, + gd5fxgq4uexxg_ecc_get_status)), + SPINAND_INFO("GD5F4GM8UExxG", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x95), + NAND_MEMORG(1, 2048, 128, 64, 4096, 80, 1, 1, 1), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants_1gq5, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout, + gd5fxgq4uexxg_ecc_get_status)), + SPINAND_INFO("GD5F4GM8RExxG", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x85), + NAND_MEMORG(1, 2048, 128, 64, 4096, 80, 1, 1, 1), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants_1gq5, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout, + gd5fxgq4uexxg_ecc_get_status)), + SPINAND_INFO("GD5F2GQ5xExxH", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x22), + NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 1, 1, 1), + NAND_ECCREQ(4, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants_2gq5, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout, + gd5fxgq4uexxg_ecc_get_status)), + SPINAND_INFO("GD5F1GQ5RExxH", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x21), + NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), + NAND_ECCREQ(4, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants_1gq5, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout, + gd5fxgq4uexxg_ecc_get_status)), + SPINAND_INFO("GD5F1GQ4RExxH", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xc9), + NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), + NAND_ECCREQ(4, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants_1gq5, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout, + gd5fxgq4uexxg_ecc_get_status)), }; static const struct spinand_manufacturer_ops gigadevice_spinand_manuf_ops = { diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macronix.c index 86bffc2800b..3d4a7f0c3cb 100644 --- a/drivers/mtd/nand/spi/macronix.c +++ b/drivers/mtd/nand/spi/macronix.c @@ -23,7 +23,7 @@ static SPINAND_OP_VARIANTS(read_cache_variants, static SPINAND_OP_VARIANTS(write_cache_variants, SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), - SPINAND_PROG_LOAD(true, 0, NULL, 0)); + SPINAND_PROG_LOAD(false, 0, NULL, 0)); static SPINAND_OP_VARIANTS(update_cache_variants, SPINAND_PROG_LOAD_X4(false, 0, NULL, 0), @@ -86,9 +86,10 @@ static int mx35lf1ge4ab_ecc_get_status(struct spinand_device *spinand, * in order to avoid forcing the wear-leveling layer to move * data around if it's not necessary. */ - if (mx35lf1ge4ab_get_eccsr(spinand, &eccsr)) + if (mx35lf1ge4ab_get_eccsr(spinand, spinand->scratchbuf)) return nand->eccreq.strength; + eccsr = *spinand->scratchbuf; if (WARN_ON(eccsr > nand->eccreq.strength || !eccsr)) return nand->eccreq.strength; @@ -300,6 +301,26 @@ static const struct spinand_info macronix_spinand_table[] = { SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, mx35lf1ge4ab_ecc_get_status)), + SPINAND_INFO("MX31LF2GE4BC", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x2e), + NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 1, 1, 1), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, + mx35lf1ge4ab_ecc_get_status)), + SPINAND_INFO("MX3UF2GE4BC", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xae), + NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 1, 1, 1), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, + mx35lf1ge4ab_ecc_get_status)), }; static const struct spinand_manufacturer_ops macronix_spinand_manuf_ops = { diff --git a/drivers/mtd/nand/spi/toshiba.c b/drivers/mtd/nand/spi/toshiba.c index b9908e79271..ad48b1c7c8a 100644 --- a/drivers/mtd/nand/spi/toshiba.c +++ b/drivers/mtd/nand/spi/toshiba.c @@ -269,6 +269,39 @@ static const struct spinand_info toshiba_spinand_table[] = { SPINAND_HAS_QE_BIT, SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, tx58cxgxsxraix_ecc_get_status)), + /* 1.8V 1Gb (1st generation) */ + SPINAND_INFO("TC58NYG0S3HBAI4", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xA1), + NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + 0, + SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, + tx58cxgxsxraix_ecc_get_status)), + /* 1.8V 4Gb (1st generation) */ + SPINAND_INFO("TH58NYG2S3HBAI4", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xAC), + NAND_MEMORG(1, 2048, 128, 64, 4096, 80, 1, 2, 1), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_x4_variants, + &update_cache_x4_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, + tx58cxgxsxraix_ecc_get_status)), + /* 1.8V 8Gb (1st generation) */ + SPINAND_INFO("TH58NYG3S0HBAI6", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xA3), + NAND_MEMORG(1, 4096, 256, 64, 4096, 80, 1, 1, 1), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_x4_variants, + &update_cache_x4_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, + tx58cxgxsxraix_ecc_get_status)), }; static const struct spinand_manufacturer_ops toshiba_spinand_manuf_ops = { diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c index dd4ed257a83..c62096dc2e6 100644 --- a/drivers/mtd/nand/spi/winbond.c +++ b/drivers/mtd/nand/spi/winbond.c @@ -18,6 +18,8 @@ #define WINBOND_CFG_BUF_READ BIT(3) +#define W25N04KV_STATUS_ECC_5_8_BITFLIPS (3 << 4) + static SPINAND_OP_VARIANTS(read_cache_variants, SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0), SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), @@ -121,6 +123,7 @@ static int w25n02kv_ecc_get_status(struct spinand_device *spinand, return -EBADMSG; case STATUS_ECC_HAS_BITFLIPS: + case W25N04KV_STATUS_ECC_5_8_BITFLIPS: /* * Let's try to retrieve the real maximum number of bitflips * in order to avoid forcing the wear-leveling layer to move @@ -172,6 +175,60 @@ static const struct spinand_info winbond_spinand_table[] = { &update_cache_variants), 0, SPINAND_ECCINFO(&w25n02kv_ooblayout, w25n02kv_ecc_get_status)), + SPINAND_INFO("W25N01JW", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xbc, 0x21), + NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), + NAND_ECCREQ(4, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + 0, + SPINAND_ECCINFO(&w25m02gv_ooblayout, w25n02kv_ecc_get_status)), + SPINAND_INFO("W25N02JWZEIF", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xbf, 0x22), + NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 2, 1), + NAND_ECCREQ(4, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + 0, + SPINAND_ECCINFO(&w25n02kv_ooblayout, w25n02kv_ecc_get_status)), + SPINAND_INFO("W25N512GW", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xba, 0x20), + NAND_MEMORG(1, 2048, 64, 64, 512, 10, 1, 1, 1), + NAND_ECCREQ(4, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + 0, + SPINAND_ECCINFO(&w25n02kv_ooblayout, w25n02kv_ecc_get_status)), + SPINAND_INFO("W25N02KWZEIR", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xba, 0x22), + NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + 0, + SPINAND_ECCINFO(&w25n02kv_ooblayout, w25n02kv_ecc_get_status)), + SPINAND_INFO("W25N01GWZEIG", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xba, 0x21), + NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), + NAND_ECCREQ(4, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + 0, + SPINAND_ECCINFO(&w25m02gv_ooblayout, w25n02kv_ecc_get_status)), + SPINAND_INFO("W25N04KV", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xaa, 0x23), + NAND_MEMORG(1, 2048, 128, 64, 4096, 40, 2, 1, 1), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + 0, + SPINAND_ECCINFO(&w25n02kv_ooblayout, w25n02kv_ecc_get_status)), }; static int winbond_spinand_init(struct spinand_device *spinand) diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h index b701d25f73d..81a7b0dbbb2 100644 --- a/include/linux/mtd/spinand.h +++ b/include/linux/mtd/spinand.h @@ -266,13 +266,16 @@ struct spinand_manufacturer { }; /* SPI NAND manufacturers */ +extern const struct spinand_manufacturer alliancememory_spinand_manufacturer; +extern const struct spinand_manufacturer ato_spinand_manufacturer; +extern const struct spinand_manufacturer esmt_c8_spinand_manufacturer; +extern const struct spinand_manufacturer foresee_spinand_manufacturer; extern const struct spinand_manufacturer gigadevice_spinand_manufacturer; extern const struct spinand_manufacturer macronix_spinand_manufacturer; extern const struct spinand_manufacturer micron_spinand_manufacturer; extern const struct spinand_manufacturer paragon_spinand_manufacturer; extern const struct spinand_manufacturer toshiba_spinand_manufacturer; extern const struct spinand_manufacturer winbond_spinand_manufacturer; -extern const struct spinand_manufacturer esmt_c8_spinand_manufacturer; extern const struct spinand_manufacturer xtx_spinand_manufacturer; /** From patchwork Tue Oct 1 20:44:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Mikhail Kshevetskiy X-Patchwork-Id: 1991724 X-Patchwork-Delegate: dario.binacchi@amarulasolutions.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=iopsys.eu header.i=@iopsys.eu header.a=rsa-sha256 header.s=selector2 header.b=hoggsiXd; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4XJ93X15Xqz1xt1 for ; Wed, 2 Oct 2024 06:47:04 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 67001892EF; Tue, 1 Oct 2024 22:45:12 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=reject dis=none) header.from=iopsys.eu Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=iopsys.eu header.i=@iopsys.eu header.b="hoggsiXd"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 79D6F892DB; Tue, 1 Oct 2024 22:45:11 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_PASS,SPF_PASS autolearn=no autolearn_force=no version=3.4.2 Received: from EUR05-DB8-obe.outbound.protection.outlook.com (mail-db8eur05on20701.outbound.protection.outlook.com [IPv6:2a01:111:f403:2614::701]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 9BF26892F2 for ; Tue, 1 Oct 2024 22:45:07 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=reject dis=none) header.from=iopsys.eu Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=mikhail.kshevetskiy@genexis.eu ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=uIXy8MnklqLGBnQ9qNWStNLMCa6P+4zQVbKZ3IwcumVKMnqGRIWjiyYOMb2H6H7S/HQFoH2OSB68wy0Tsk51fdi4NsM5RwTS9q+PnwSXvBhbtWTQwmKi7BjFq2hbRerFquRXCKNBIZOwmLJrxgcAwW8rlWm8J4AB6ycHfys8T2wAxr8QBblB3TGyh+UFcdwlvg+OmDT37w0SGvRKFHsbV3T/wxAwqUpmHCw+ZE29WSR9dN+Au1tfxpR7YurecjiRpmQAuTpxHkCOw+HNzoDYZ56zYUzXjFw8VYzy5RqfnYD9E/W/FBXz2YAodTgckHlfUTzWrrd9vYpZtDlP/PZF+A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=J2TuJ167zXF+4597y/mltm7CeNOCfUl7PLEvbi78QY4=; b=wwk4A4gpvyuqtXzZtPkoXB3khQsv6uIDQ4RgoR4MQzbj2D44Cu5IXHYaYRs8Do455toAWlVZaA160Nd1+dSw43/bDzndgSRTFp+9kyvUOVoj7TLSZDdE/X/A+BrSVGvx+AhXI+LM/HoGi1+wPgKyYEg4OZh7jDnK63LXdQammPXELnU9WwgGFKNkBIbU/GUH7Cv9FPW0Wz8HzcgSbzyIebgoYYDpl1kJnEma4BrxP89kTShNy42G5GA9V879HY/vAdoaNRWf4s9LpYPqygeC/Swh9UeBsPey/KKa4TOXck3O64/Wpcg8zU6Zqz3XhI1/j075ntNIrPvMm7mBjeI2Ww== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=genexis.eu; dmarc=pass action=none header.from=iopsys.eu; dkim=pass header.d=iopsys.eu; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=iopsys.eu; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=J2TuJ167zXF+4597y/mltm7CeNOCfUl7PLEvbi78QY4=; b=hoggsiXdGcezA+ZHbgWCV1iYoePK8kS+5R19JY3vXVYmP8RunKuGlH0jpGpme435i0Ch3mI6rnEUG5O4Kmz+OMSON2cgjLn1G+q2xdU6qPB3sfYmK+/LWWDKhEPxBSIL7br8wThSkJz3bT4KV07L1ZVWGC85uliBsM6AIrTmu8bgN1qqm4DsiwVDB8/YRuSpW7U9/kbgX+5IExppyCd4renCfw/m8Oxg/kas6/kyphN1QQvnP4QeMJiBSyJiPUAZeQ+2wi1hKLN5X1FJwqtWi4TwFDQMFZFoELn0Tscu/BMhVpg1kYTSSaWAmBVodZZlxm05MJtXL/RiD8PEKBxu6Q== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=iopsys.eu; Received: from GV2PR08MB8121.eurprd08.prod.outlook.com (2603:10a6:150:7d::22) by DU0PR08MB7812.eurprd08.prod.outlook.com (2603:10a6:10:3b4::8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8026.15; Tue, 1 Oct 2024 20:45:05 +0000 Received: from GV2PR08MB8121.eurprd08.prod.outlook.com ([fe80::4cd3:da80:2532:daa0]) by GV2PR08MB8121.eurprd08.prod.outlook.com ([fe80::4cd3:da80:2532:daa0%2]) with mapi id 15.20.8026.014; Tue, 1 Oct 2024 20:45:05 +0000 From: Mikhail Kshevetskiy To: Tom Rini , Dario Binacchi , Michael Trimarchi , Frieder Schrempf , Jagan Teki , Mikhail Kshevetskiy , William Zhang , Dmitry Rokosov , Igor Prusov , Bruce Suen , Alexey Romanov , Chuanhong Guo , Martin Kurbanov , Miquel Raynal , Max Krummenacher , Francesco Dolcini , u-boot@lists.denx.de Subject: [RESEND PATCH v4 10/10] mtd: nand: add initial ecc engine support Date: Tue, 1 Oct 2024 23:44:42 +0300 Message-ID: <20241001204444.917238-11-mikhail.kshevetskiy@iopsys.eu> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241001204444.917238-1-mikhail.kshevetskiy@iopsys.eu> References: <20241001204444.917238-1-mikhail.kshevetskiy@iopsys.eu> X-ClientProxiedBy: GVX0EPF00011B5E.SWEP280.PROD.OUTLOOK.COM (2603:10a6:144:1:0:8:0:16) To GV2PR08MB8121.eurprd08.prod.outlook.com (2603:10a6:150:7d::22) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: GV2PR08MB8121:EE_|DU0PR08MB7812:EE_ X-MS-Office365-Filtering-Correlation-Id: ac4da529-76f4-4692-8735-08dce259ee1c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|7416014|376014|52116014|366016|1800799024|921020|38350700014; X-Microsoft-Antispam-Message-Info: =?utf-8?q?PLST2HlqylVcdEV005joNjKVPgOx7Gj?= =?utf-8?q?c4tryKk5rdS1cjFW4FxP1hZ0nSEAzWghTpTdaUrdPcK2dTXWwqdFKxKu20MspWgnd?= =?utf-8?q?QQnQ+0sh7aRdRbGKLnqFUb25RAqqdawYYWDu2y2gnkfw0cr4Gsjj77jZZlHhCdd3+?= =?utf-8?q?x4LSNmCDxpWdAqpp2Ks/tZ4wwKawNu/bvCuUvubbn1lGh5jqicPwpyheXSLIfHOLI?= =?utf-8?q?wi26IuAed8EGB1fI4T/08mmg4y46qaf6wt/OIyCr5Lf/ddstucyQOcS0bSoqldc8n?= =?utf-8?q?fqRDL5Qn8yipmeS/bv7Oyibtz9ceqi1tyI4OsBJ7TsT4OkBvGMQISFSvz92CUeAXB?= =?utf-8?q?3n5uRovuLN9pcjE6V86JVQ49N8GpSxC84BiameCQTdeQulZqXJzPdzM62Z7606aUC?= =?utf-8?q?lT5XtKZFkRYzHm/z+IIISrMNEirGiQK7/JjcI5/jTHP+f+e9NQs1w9NZ28jizJd6L?= =?utf-8?q?/tZvyxD3b6RWfk0e7EIVRPKYoPgMPg0LcTqXi+ji+pAf1bJiJEfAm0eCErO17DgYz?= =?utf-8?q?wWbWwgvRSeCH5PW3urfGoPO+nK93oGMqMJiEYDhsnwCCyTGDywZ9LUzACCYxxaAjB?= =?utf-8?q?1WtNCEBzcQzBM3cubIrcbFT611YfC7imM3GU5Faoir0+WzOk4UNyBJcQFRws9Yf/U?= =?utf-8?q?91SnZjHquZtp/u0VqpQn3JnLG+myPH7sm2hb4KTljA0g0oQII9tHf1k5TCM//quSl?= =?utf-8?q?ZAxeoMs0IEoQjZxoDkcvVmTVW6IYoJeW9zAcZRsASXuHEeZ1A0T9cY2nAOjyP55ne?= =?utf-8?q?9xqgHHb6UACpdoY1KWzyvUPIZ5lEWJetA9aw0Cik1CdOWQcbX0yXUIJ4qxRwOwrPF?= =?utf-8?q?bcUk+QG6apOqX+VfPzeE7jWPlClkVq8xgjXe+xODlYjiOATFDSrAkXQUU1DlvuiMh?= =?utf-8?q?T+h27yJ7uX3nEWRmFCEw+1Zm+f/923jLvLiDeP5SCo9P4bt7SZS4xksNJUFyRId5g?= =?utf-8?q?6RAbl8dODDdYfoYZyMdtHUIC4gvUsra2BdErhhfvDJQSJ2mOfjf8rRKyT5PY+zWY8?= =?utf-8?q?762vq/q7SW8Q767sBvp3ajXwxK80EECEH3uGgEOUcpKEYHWUMV6xmzyMlZIrhS58E?= =?utf-8?q?6O05HQZ1HenDXtRmaV7f6jcOy/DtUzIfM+9DTCCx2g9WLIopoZgxlVIaGnbuQ6Deh?= =?utf-8?q?/2LuqlmdX1pM7Wb+qy6hiGZ1l/rtkOYH5u3VYgcdAoFewFK1yAoxRiaScjTnvIPjE?= =?utf-8?q?QcBJtb79wCRyHxKvvfDNk/uIdqCtn4DFZfszEEZ/XbTTwiG0SANj2xIJUFpr11Ogu?= =?utf-8?q?POoGQNH1WSG53lJCIb00qcFCcpd18VygcwZ9mCMjkrj2DvuMZGdhSl1s=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:GV2PR08MB8121.eurprd08.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230040)(7416014)(376014)(52116014)(366016)(1800799024)(921020)(38350700014); DIR:OUT; SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?q?zkdbFte4vdc03aJZ4n2G+hGqLON3?= =?utf-8?q?yHOqEV8+alCXeQw69hkhutokwZEkCHLwNGZQnyizA1t0kzofvIUujkAcI4bykZoiP?= =?utf-8?q?xVGhm/ldruXJP0Gr+LkbzCLf31TPtaev3t6KUpOqy5zy2hzb7YsJ+lSRRheCNS3Y/?= =?utf-8?q?4+HvR22mKgI90CX/yALXqJ/v4zwtetv9uBCo8kMMikzgYQyEn+e7bRfAoKGNJxk6G?= =?utf-8?q?uchhXf7jkrp9futcovRZAaRwKXhD9jeyz1pUmcu85dipEwd8Gz7LqXEK4EqiKiq8O?= =?utf-8?q?lo/cr1BOogOSaoL3+77r3TF14X/H9ainPt097OsermzxVV3DS4lDGH32HujWrHahQ?= =?utf-8?q?LL+IgmgZcZuLa6Sy0Y1J5BhOqYVR0GRUvgDU0gXK+2ixsULu7uD1Fbi+vCm6pjDRX?= =?utf-8?q?y3mcy7UDjzOl+MMwtcKAEQxQszjkixSp1ye7j212/Xvj2+7vmW2SHiquj6M5v2hqn?= =?utf-8?q?wnZDZwvcRCNTcbpkj+49Vd4UClMM0PYdtdnrPrBTOnXFFFzHTrns5QvTjOMZAQoKv?= =?utf-8?q?6x3Adk+YW4CHtdAHgW2yyjDasRiq1Sq+vXAMoNsdx4fN7LZkxEkTGTlT6ljLyd/kx?= =?utf-8?q?9KPGPDKEw6vLN5gvBhJv/upaywI7Wb/UvRd3bZuzA5+LNo1/hMs/+AkLdTWd1FZW1?= =?utf-8?q?TLEwNFBRCbCLtVmprLCNXSC+IuQ19C4IFrPyPNetWZp0jKKfYHbgD0SpsTXXZR7N7?= =?utf-8?q?XPGO5Or3oCRWuPNmg6US/GLW+XG5RyKsimdQ40jZnbI/pxKi4J5KXakByymut1Rr+?= =?utf-8?q?kiC7yb/IR+NYoABpkRE2qzY7W+qlLYt4b9iKcmG9fULnnP9jXiR7hKqBICp7VKQpK?= =?utf-8?q?xzpUnGralK7LkYkII88bpLJaGL65SrMHQ0RFgYFbUTL2i9FGvOz/Bkh+DE2Jqzcj1?= =?utf-8?q?MDv5o2/du5B/KX5UAu0Idvt5pb+AbHxvJB4fhhvSc1pNC9rON3Ig9oWxmwl2u2IFv?= =?utf-8?q?HzzmA6zv9iLwTK7UUFxh1Ulxyrtk+g4A/TxosX3w0rYJ0q8O0IUFpnsG+RH+pyy03?= =?utf-8?q?SvOQIswWuDummhFG5RuI3dzUgLTcv0McLKxhwbKe6OS3LOELKSLZCuKHg11V8HK2v?= =?utf-8?q?GwjRjhPuUq7e4K4LZet4M+iWArSmSO4Z4jATd/n61i1AkJWwnu2I4nRWA4oc/mgXx?= =?utf-8?q?gHpiHCrHFQmR8+VEbucxLvfeqJjKlt56Byxf/VkhjCr2j7RecYQ7OSxFwBFbnisLb?= =?utf-8?q?fU0b3TvQ8HMWWE+hN7OvxT1/RbifI2q81PCLllBZYhdnwcsvzBKtumMKQqJNbJJLz?= =?utf-8?q?p92oQOzUEGzT1ltj01aexKjPYkP7qNY3kCLuMCgUBAy9WWR2UMjg9trXk+Nhd2bq/?= =?utf-8?q?VwvlCkqwZm5xLuz+xFprj2JqnTiGrNMDB5USru8/KZKupAn/weSmqCkZr865HLJwB?= =?utf-8?q?nYkvlAm9c3G6BuwigsZBbUG9CZiz7taHBdiD5wuU/twJ/XYwjGvto91hyU31tokxj?= =?utf-8?q?87WIl6gMLd0QxF8DtisH1oYAP86mdvmu8C2w9JeJd2cIrmRtCuuX85xthxioaXctt?= =?utf-8?q?gRRbDPf4AlnzKy+v/H+HOyUQDxdRfFxosoCwErg1PNdy3Vu254DbALc=3D?= X-OriginatorOrg: iopsys.eu X-MS-Exchange-CrossTenant-Network-Message-Id: ac4da529-76f4-4692-8735-08dce259ee1c X-MS-Exchange-CrossTenant-AuthSource: GV2PR08MB8121.eurprd08.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Oct 2024 20:45:05.6682 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 8d891be1-7bce-4216-9a99-bee9de02ba58 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: SieJVTNed/WGNyAoG7SsFzPI18djk5YWwuTB6WVOgcQgwt0ZxxpY9VJMoyBUYA2U2lv/vv6cv1swhCf3l5MUIhmVIJkaS3oGFhci1mItvq4= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU0PR08MB7812 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean only spinand on_die ecc is supported for a moment Signed-off-by: Mikhail Kshevetskiy --- drivers/mtd/nand/Makefile | 2 +- drivers/mtd/nand/core.c | 130 +++++++++++++++- drivers/mtd/nand/ecc.c | 249 ++++++++++++++++++++++++++++++ drivers/mtd/nand/spi/core.c | 207 ++++++++++++++++++++----- drivers/mtd/nand/spi/foresee.c | 2 +- drivers/mtd/nand/spi/macronix.c | 7 +- drivers/mtd/nand/spi/micron.c | 2 +- drivers/mtd/nand/spi/toshiba.c | 10 +- drivers/mtd/nand/spi/winbond.c | 10 +- include/linux/mtd/nand.h | 261 ++++++++++++++++++++++++++++++-- include/linux/mtd/spinand.h | 13 +- include/spi-mem.h | 2 + 12 files changed, 830 insertions(+), 65 deletions(-) create mode 100644 drivers/mtd/nand/ecc.c diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile index 96e186600a1..56179188e92 100644 --- a/drivers/mtd/nand/Makefile +++ b/drivers/mtd/nand/Makefile @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0+ ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),) -nandcore-objs := core.o bbt.o +nandcore-objs := core.o bbt.o ecc.o obj-$(CONFIG_MTD_NAND_CORE) += nandcore.o obj-$(CONFIG_MTD_RAW_NAND) += raw/ obj-$(CONFIG_MTD_SPI_NAND) += spi/ diff --git a/drivers/mtd/nand/core.c b/drivers/mtd/nand/core.c index 472ad0bdefb..6c90d576de3 100644 --- a/drivers/mtd/nand/core.c +++ b/drivers/mtd/nand/core.c @@ -129,7 +129,7 @@ EXPORT_SYMBOL_GPL(nanddev_isreserved); * * Return: 0 in case of success, a negative error code otherwise. */ -static int nanddev_erase(struct nand_device *nand, const struct nand_pos *pos) +int nanddev_erase(struct nand_device *nand, const struct nand_pos *pos) { unsigned int entry; @@ -187,6 +187,134 @@ int nanddev_mtd_erase(struct mtd_info *mtd, struct erase_info *einfo) } EXPORT_SYMBOL_GPL(nanddev_mtd_erase); +/** + * nanddev_get_ecc_engine() - Find and get a suitable ECC engine + * @nand: NAND device + */ +static int nanddev_get_ecc_engine(struct nand_device *nand) +{ + int engine_type; + + /* Read the user desires in terms of ECC engine/configuration */ + of_get_nand_ecc_user_config(nand); + + engine_type = nand->ecc.user_conf.engine_type; + if (engine_type == NAND_ECC_ENGINE_TYPE_INVALID) + engine_type = nand->ecc.defaults.engine_type; + + switch (engine_type) { + case NAND_ECC_ENGINE_TYPE_NONE: + return 0; + case NAND_ECC_ENGINE_TYPE_SOFT: + nand->ecc.engine = nand_ecc_get_sw_engine(nand); + break; + case NAND_ECC_ENGINE_TYPE_ON_DIE: + nand->ecc.engine = nand_ecc_get_on_die_hw_engine(nand); + break; + case NAND_ECC_ENGINE_TYPE_ON_HOST: + nand->ecc.engine = nand_ecc_get_on_host_hw_engine(nand); + if (PTR_ERR(nand->ecc.engine) == -EPROBE_DEFER) + return -EPROBE_DEFER; + break; + default: + pr_err("Missing ECC engine type\n"); + } + + if (!nand->ecc.engine) + return -EINVAL; + + return 0; +} + +/** + * nanddev_put_ecc_engine() - Dettach and put the in-use ECC engine + * @nand: NAND device + */ +static int nanddev_put_ecc_engine(struct nand_device *nand) +{ + switch (nand->ecc.ctx.conf.engine_type) { + case NAND_ECC_ENGINE_TYPE_ON_HOST: + nand_ecc_put_on_host_hw_engine(nand); + break; + case NAND_ECC_ENGINE_TYPE_NONE: + case NAND_ECC_ENGINE_TYPE_SOFT: + case NAND_ECC_ENGINE_TYPE_ON_DIE: + default: + break; + } + + return 0; +} + +/** + * nanddev_find_ecc_configuration() - Find a suitable ECC configuration + * @nand: NAND device + */ +static int nanddev_find_ecc_configuration(struct nand_device *nand) +{ + int ret; + + if (!nand->ecc.engine) + return -ENOTSUPP; + + ret = nand_ecc_init_ctx(nand); + if (ret) + return ret; + + if (!nand_ecc_is_strong_enough(nand)) + pr_warn("WARNING: %s: the ECC used on your system is too weak compared to the one required by the NAND chip\n", + nand->mtd->name); + + return 0; +} + +/** + * nanddev_ecc_engine_init() - Initialize an ECC engine for the chip + * @nand: NAND device + */ +int nanddev_ecc_engine_init(struct nand_device *nand) +{ + int ret; + + /* Look for the ECC engine to use */ + ret = nanddev_get_ecc_engine(nand); + if (ret) { + if (ret != -EPROBE_DEFER) + pr_err("No ECC engine found\n"); + + return ret; + } + + /* No ECC engine requested */ + if (!nand->ecc.engine) + return 0; + + /* Configure the engine: balance user input and chip requirements */ + ret = nanddev_find_ecc_configuration(nand); + if (ret) { + pr_err("No suitable ECC configuration\n"); + nanddev_put_ecc_engine(nand); + + return ret; + } + + return 0; +} +EXPORT_SYMBOL_GPL(nanddev_ecc_engine_init); + +/** + * nanddev_ecc_engine_cleanup() - Cleanup ECC engine initializations + * @nand: NAND device + */ +void nanddev_ecc_engine_cleanup(struct nand_device *nand) +{ + if (nand->ecc.engine) + nand_ecc_cleanup_ctx(nand); + + nanddev_put_ecc_engine(nand); +} +EXPORT_SYMBOL_GPL(nanddev_ecc_engine_cleanup); + /** * nanddev_init() - Initialize a NAND device * @nand: NAND device diff --git a/drivers/mtd/nand/ecc.c b/drivers/mtd/nand/ecc.c new file mode 100644 index 00000000000..58cbe7deaac --- /dev/null +++ b/drivers/mtd/nand/ecc.c @@ -0,0 +1,249 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Generic Error-Correcting Code (ECC) engine + * + * Copyright (C) 2019 Macronix + * Author: + * Miquèl RAYNAL + * + * + * This file describes the abstraction of any NAND ECC engine. It has been + * designed to fit most cases, including parallel NANDs and SPI-NANDs. + * + * There are three main situations where instantiating this ECC engine makes + * sense: + * - external: The ECC engine is outside the NAND pipeline, typically this + * is a software ECC engine, or an hardware engine that is + * outside the NAND controller pipeline. + * - pipelined: The ECC engine is inside the NAND pipeline, ie. on the + * controller's side. This is the case of most of the raw NAND + * controllers. In the pipeline case, the ECC bytes are + * generated/data corrected on the fly when a page is + * written/read. + * - ondie: The ECC engine is inside the NAND pipeline, on the chip's side. + * Some NAND chips can correct themselves the data. + * + * Besides the initial setup and final cleanups, the interfaces are rather + * simple: + * - prepare: Prepare an I/O request. Enable/disable the ECC engine based on + * the I/O request type. In case of software correction or external + * engine, this step may involve to derive the ECC bytes and place + * them in the OOB area before a write. + * - finish: Finish an I/O request. Correct the data in case of a read + * request and report the number of corrected bits/uncorrectable + * errors. Most likely empty for write operations, unless you have + * hardware specific stuff to do, like shutting down the engine to + * save power. + * + * The I/O request should be enclosed in a prepare()/finish() pair of calls + * and will behave differently depending on the requested I/O type: + * - raw: Correction disabled + * - ecc: Correction enabled + * + * The request direction is impacting the logic as well: + * - read: Load data from the NAND chip + * - write: Store data in the NAND chip + * + * Mixing all this combinations together gives the following behavior. + * Those are just examples, drivers are free to add custom steps in their + * prepare/finish hook. + * + * [external ECC engine] + * - external + prepare + raw + read: do nothing + * - external + finish + raw + read: do nothing + * - external + prepare + raw + write: do nothing + * - external + finish + raw + write: do nothing + * - external + prepare + ecc + read: do nothing + * - external + finish + ecc + read: calculate expected ECC bytes, extract + * ECC bytes from OOB buffer, correct + * and report any bitflip/error + * - external + prepare + ecc + write: calculate ECC bytes and store them at + * the right place in the OOB buffer based + * on the OOB layout + * - external + finish + ecc + write: do nothing + * + * [pipelined ECC engine] + * - pipelined + prepare + raw + read: disable the controller's ECC engine if + * activated + * - pipelined + finish + raw + read: do nothing + * - pipelined + prepare + raw + write: disable the controller's ECC engine if + * activated + * - pipelined + finish + raw + write: do nothing + * - pipelined + prepare + ecc + read: enable the controller's ECC engine if + * deactivated + * - pipelined + finish + ecc + read: check the status, report any + * error/bitflip + * - pipelined + prepare + ecc + write: enable the controller's ECC engine if + * deactivated + * - pipelined + finish + ecc + write: do nothing + * + * [ondie ECC engine] + * - ondie + prepare + raw + read: send commands to disable the on-chip ECC + * engine if activated + * - ondie + finish + raw + read: do nothing + * - ondie + prepare + raw + write: send commands to disable the on-chip ECC + * engine if activated + * - ondie + finish + raw + write: do nothing + * - ondie + prepare + ecc + read: send commands to enable the on-chip ECC + * engine if deactivated + * - ondie + finish + ecc + read: send commands to check the status, report + * any error/bitflip + * - ondie + prepare + ecc + write: send commands to enable the on-chip ECC + * engine if deactivated + * - ondie + finish + ecc + write: do nothing + */ + +#ifndef __UBOOT__ +#include +#include +#include +#include +#include +#endif +#include + +/** + * nand_ecc_init_ctx - Init the ECC engine context + * @nand: the NAND device + * + * On success, the caller is responsible of calling @nand_ecc_cleanup_ctx(). + */ +int nand_ecc_init_ctx(struct nand_device *nand) +{ + if (!nand->ecc.engine || !nand->ecc.engine->ops->init_ctx) + return 0; + + return nand->ecc.engine->ops->init_ctx(nand); +} +EXPORT_SYMBOL(nand_ecc_init_ctx); + +/** + * nand_ecc_cleanup_ctx - Cleanup the ECC engine context + * @nand: the NAND device + */ +void nand_ecc_cleanup_ctx(struct nand_device *nand) +{ + if (nand->ecc.engine && nand->ecc.engine->ops->cleanup_ctx) + nand->ecc.engine->ops->cleanup_ctx(nand); +} +EXPORT_SYMBOL(nand_ecc_cleanup_ctx); + +/** + * nand_ecc_prepare_io_req - Prepare an I/O request + * @nand: the NAND device + * @req: the I/O request + */ +int nand_ecc_prepare_io_req(struct nand_device *nand, + struct nand_page_io_req *req) +{ + if (!nand->ecc.engine || !nand->ecc.engine->ops->prepare_io_req) + return 0; + + return nand->ecc.engine->ops->prepare_io_req(nand, req); +} +EXPORT_SYMBOL(nand_ecc_prepare_io_req); + +/** + * nand_ecc_finish_io_req - Finish an I/O request + * @nand: the NAND device + * @req: the I/O request + */ +int nand_ecc_finish_io_req(struct nand_device *nand, + struct nand_page_io_req *req) +{ + if (!nand->ecc.engine || !nand->ecc.engine->ops->finish_io_req) + return 0; + + return nand->ecc.engine->ops->finish_io_req(nand, req); +} +EXPORT_SYMBOL(nand_ecc_finish_io_req); + +void of_get_nand_ecc_user_config(struct nand_device *nand) +{ + nand->ecc.user_conf.engine_type = NAND_ECC_ENGINE_TYPE_ON_DIE; + nand->ecc.user_conf.algo = NAND_ECC_ALGO_UNKNOWN; + nand->ecc.user_conf.placement = NAND_ECC_PLACEMENT_UNKNOWN; +} +EXPORT_SYMBOL(of_get_nand_ecc_user_config); + +/** + * nand_ecc_is_strong_enough - Check if the chip configuration meets the + * datasheet requirements. + * + * @nand: Device to check + * + * If our configuration corrects A bits per B bytes and the minimum + * required correction level is X bits per Y bytes, then we must ensure + * both of the following are true: + * + * (1) A / B >= X / Y + * (2) A >= X + * + * Requirement (1) ensures we can correct for the required bitflip density. + * Requirement (2) ensures we can correct even when all bitflips are clumped + * in the same sector. + */ +bool nand_ecc_is_strong_enough(struct nand_device *nand) +{ + const struct nand_ecc_props *reqs = nanddev_get_ecc_requirements(nand); + const struct nand_ecc_props *conf = nanddev_get_ecc_conf(nand); + struct mtd_info *mtd = nanddev_to_mtd(nand); + int corr, ds_corr; + + if (conf->step_size == 0 || reqs->step_size == 0) + /* Not enough information */ + return true; + + /* + * We get the number of corrected bits per page to compare + * the correction density. + */ + corr = (mtd->writesize * conf->strength) / conf->step_size; + ds_corr = (mtd->writesize * reqs->strength) / reqs->step_size; + + return corr >= ds_corr && conf->strength >= reqs->strength; +} +EXPORT_SYMBOL(nand_ecc_is_strong_enough); + +struct nand_ecc_engine *nand_ecc_get_sw_engine(struct nand_device *nand) +{ + unsigned int algo = nand->ecc.user_conf.algo; + + if (algo == NAND_ECC_ALGO_UNKNOWN) + algo = nand->ecc.defaults.algo; + + switch (algo) { + case NAND_ECC_ALGO_HAMMING: + return nand_ecc_sw_hamming_get_engine(); + case NAND_ECC_ALGO_BCH: + return nand_ecc_sw_bch_get_engine(); + default: + break; + } + + return NULL; +} +EXPORT_SYMBOL(nand_ecc_get_sw_engine); + +struct nand_ecc_engine *nand_ecc_get_on_die_hw_engine(struct nand_device *nand) +{ + return nand->ecc.ondie_engine; +} +EXPORT_SYMBOL(nand_ecc_get_on_die_hw_engine); + +struct nand_ecc_engine *nand_ecc_get_on_host_hw_engine(struct nand_device *nand) +{ + return NULL; +} +EXPORT_SYMBOL(nand_ecc_get_on_host_hw_engine); + +void nand_ecc_put_on_host_hw_engine(struct nand_device *nand) +{ +} +EXPORT_SYMBOL(nand_ecc_put_on_host_hw_engine); + +#ifndef __UBOOT__ +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Miquel Raynal "); +MODULE_DESCRIPTION("Generic ECC engine"); +#endif /* __UBOOT__ */ diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c index d5cb9026246..70f07be06b0 100644 --- a/drivers/mtd/nand/spi/core.c +++ b/drivers/mtd/nand/spi/core.c @@ -239,7 +239,7 @@ static int spinand_check_ecc_status(struct spinand_device *spinand, u8 status) * fixed, so let's return the maximum possible value so that * wear-leveling layers move the data immediately. */ - return nand->eccreq.strength; + return nanddev_get_ecc_conf(nand)->strength; case STATUS_ECC_UNCOR_ERROR: return -EBADMSG; @@ -275,6 +275,92 @@ static const struct mtd_ooblayout_ops spinand_noecc_ooblayout = { .rfree = spinand_noecc_ooblayout_free, }; +static int spinand_ondie_ecc_init_ctx(struct nand_device *nand) +{ + struct spinand_device *spinand = nand_to_spinand(nand); + struct mtd_info *mtd = nanddev_to_mtd(nand); + struct spinand_ondie_ecc_conf *engine_conf; + + nand->ecc.ctx.conf.engine_type = NAND_ECC_ENGINE_TYPE_ON_DIE; + nand->ecc.ctx.conf.step_size = nand->ecc.requirements.step_size; + nand->ecc.ctx.conf.strength = nand->ecc.requirements.strength; + + engine_conf = kzalloc(sizeof(*engine_conf), GFP_KERNEL); + if (!engine_conf) + return -ENOMEM; + + nand->ecc.ctx.priv = engine_conf; + + if (spinand->eccinfo.ooblayout) + mtd_set_ooblayout(mtd, spinand->eccinfo.ooblayout); + else + mtd_set_ooblayout(mtd, &spinand_noecc_ooblayout); + + return 0; +} + +static void spinand_ondie_ecc_cleanup_ctx(struct nand_device *nand) +{ + kfree(nand->ecc.ctx.priv); +} + +static int spinand_ondie_ecc_prepare_io_req(struct nand_device *nand, + struct nand_page_io_req *req) +{ + struct spinand_device *spinand = nand_to_spinand(nand); + bool enable = (req->mode != MTD_OPS_RAW); + + memset(spinand->oobbuf, 0xff, nanddev_per_page_oobsize(nand)); + + /* Only enable or disable the engine */ + return spinand_ecc_enable(spinand, enable); +} + +static int spinand_ondie_ecc_finish_io_req(struct nand_device *nand, + struct nand_page_io_req *req) +{ + struct spinand_ondie_ecc_conf *engine_conf = nand->ecc.ctx.priv; + struct spinand_device *spinand = nand_to_spinand(nand); + struct mtd_info *mtd = spinand_to_mtd(spinand); + int ret; + + if (req->mode == MTD_OPS_RAW) + return 0; + + /* Nothing to do when finishing a page write */ + if (req->type == NAND_PAGE_WRITE) + return 0; + + /* Finish a page read: check the status, report errors/bitflips */ + ret = spinand_check_ecc_status(spinand, engine_conf->status); + if (ret == -EBADMSG) + mtd->ecc_stats.failed++; + else if (ret > 0) + mtd->ecc_stats.corrected += ret; + + return ret; +} + +static struct nand_ecc_engine_ops spinand_ondie_ecc_engine_ops = { + .init_ctx = spinand_ondie_ecc_init_ctx, + .cleanup_ctx = spinand_ondie_ecc_cleanup_ctx, + .prepare_io_req = spinand_ondie_ecc_prepare_io_req, + .finish_io_req = spinand_ondie_ecc_finish_io_req, +}; + +static struct nand_ecc_engine spinand_ondie_ecc_engine = { + .ops = &spinand_ondie_ecc_engine_ops, +}; + +static void spinand_ondie_ecc_save_status(struct nand_device *nand, u8 status) +{ + struct spinand_ondie_ecc_conf *engine_conf = nand->ecc.ctx.priv; + + if (nand->ecc.ctx.conf.engine_type == NAND_ECC_ENGINE_TYPE_ON_DIE && + engine_conf) + engine_conf->status = status; +} + static int spinand_write_enable_op(struct spinand_device *spinand) { struct spi_mem_op op = SPINAND_WR_EN_DIS_OP(true); @@ -317,7 +403,10 @@ static int spinand_read_from_cache_op(struct spinand_device *spinand, } } - rdesc = spinand->dirmaps[req->pos.plane].rdesc; + if (req->mode == MTD_OPS_RAW) + rdesc = spinand->dirmaps[req->pos.plane].rdesc; + else + rdesc = spinand->dirmaps[req->pos.plane].rdesc_ecc; while (nbytes) { ret = spi_mem_dirmap_read(rdesc, column, nbytes, buf); @@ -366,9 +455,12 @@ static int spinand_write_to_cache_op(struct spinand_device *spinand, * must fill the page cache entirely even if we only want to program * the data portion of the page, otherwise we might corrupt the BBM or * user data previously programmed in OOB area. + * + * Only reset the data buffer manually, the OOB buffer is prepared by + * ECC engines ->prepare_io_req() callback. */ nbytes = nanddev_page_size(nand) + nanddev_per_page_oobsize(nand); - memset(spinand->databuf, 0xff, nbytes); + memset(spinand->databuf, 0xff, nanddev_page_size(nand)); if (req->datalen) memcpy(spinand->databuf + req->dataoffs, req->databuf.out, @@ -385,7 +477,10 @@ static int spinand_write_to_cache_op(struct spinand_device *spinand, req->ooblen); } - wdesc = spinand->dirmaps[req->pos.plane].wdesc; + if (req->mode == MTD_OPS_RAW) + wdesc = spinand->dirmaps[req->pos.plane].wdesc; + else + wdesc = spinand->dirmaps[req->pos.plane].wdesc_ecc; while (nbytes) { ret = spi_mem_dirmap_write(wdesc, column, nbytes, buf); @@ -498,12 +593,16 @@ static int spinand_lock_block(struct spinand_device *spinand, u8 lock) } static int spinand_read_page(struct spinand_device *spinand, - const struct nand_page_io_req *req, - bool ecc_enabled) + const struct nand_page_io_req *req) { + struct nand_device *nand = spinand_to_nand(spinand); u8 status; int ret; + ret = nand_ecc_prepare_io_req(nand, (struct nand_page_io_req *)req); + if (ret) + return ret; + ret = spinand_load_page_op(spinand, req); if (ret) return ret; @@ -515,22 +614,26 @@ static int spinand_read_page(struct spinand_device *spinand, if (ret < 0) return ret; + spinand_ondie_ecc_save_status(nand, status); + ret = spinand_read_from_cache_op(spinand, req); if (ret) return ret; - if (!ecc_enabled) - return 0; - - return spinand_check_ecc_status(spinand, status); + return nand_ecc_finish_io_req(nand, (struct nand_page_io_req *)req); } static int spinand_write_page(struct spinand_device *spinand, const struct nand_page_io_req *req) { + struct nand_device *nand = spinand_to_nand(spinand); u8 status; int ret; + ret = nand_ecc_prepare_io_req(nand, (struct nand_page_io_req *)req); + if (ret) + return ret; + ret = spinand_write_enable_op(spinand); if (ret) return ret; @@ -550,7 +653,7 @@ static int spinand_write_page(struct spinand_device *spinand, if (!ret && (status & STATUS_PROG_FAILED)) return -EIO; - return ret; + return nand_ecc_finish_io_req(nand, (struct nand_page_io_req *)req); } static int spinand_mtd_read(struct mtd_info *mtd, loff_t from, @@ -580,21 +683,14 @@ static int spinand_mtd_read(struct mtd_info *mtd, loff_t from, if (ret) break; - ret = spinand_ecc_enable(spinand, !disable_ecc); - if (ret) - break; - - ret = spinand_read_page(spinand, &iter.req, !disable_ecc); + ret = spinand_read_page(spinand, &iter.req); if (ret < 0 && ret != -EBADMSG) break; - if (ret == -EBADMSG) { + if (ret == -EBADMSG) ecc_failed = true; - mtd->ecc_stats.failed++; - } else { - mtd->ecc_stats.corrected += ret; + else max_bitflips = max_t(unsigned int, max_bitflips, ret); - } ret = 0; ops->retlen += iter.req.datalen; @@ -635,10 +731,6 @@ static int spinand_mtd_write(struct mtd_info *mtd, loff_t to, if (ret) break; - ret = spinand_ecc_enable(spinand, !disable_ecc); - if (ret) - break; - ret = spinand_write_page(spinand, &iter.req); if (ret) break; @@ -667,7 +759,7 @@ static bool spinand_isbad(struct nand_device *nand, const struct nand_pos *pos) }; spinand_select_target(spinand, pos->target); - spinand_read_page(spinand, &req, false); + spinand_read_page(spinand, &req); if (marker[0] != 0xff || marker[1] != 0xff) return true; @@ -835,6 +927,36 @@ static int spinand_create_dirmap(struct spinand_device *spinand, spinand->dirmaps[plane].rdesc = desc; + if (nand->ecc.engine->integration != NAND_ECC_ENGINE_INTEGRATION_PIPELINED) { + spinand->dirmaps[plane].wdesc_ecc = spinand->dirmaps[plane].wdesc; + spinand->dirmaps[plane].rdesc_ecc = spinand->dirmaps[plane].rdesc; + + return 0; + } + + info.op_tmpl = *spinand->op_templates.update_cache; + info.op_tmpl.data.ecc = true; + desc = spi_mem_dirmap_create(spinand->slave, &info); + if (IS_ERR(desc)) { + spi_mem_dirmap_destroy(spinand->dirmaps[plane].wdesc); + spi_mem_dirmap_destroy(spinand->dirmaps[plane].rdesc); + return PTR_ERR(desc); + } + + spinand->dirmaps[plane].wdesc_ecc = desc; + + info.op_tmpl = *spinand->op_templates.read_cache; + info.op_tmpl.data.ecc = true; + desc = spi_mem_dirmap_create(spinand->slave, &info); + if (IS_ERR(desc)) { + spi_mem_dirmap_destroy(spinand->dirmaps[plane].wdesc); + spi_mem_dirmap_destroy(spinand->dirmaps[plane].rdesc); + spi_mem_dirmap_destroy(spinand->dirmaps[plane].wdesc_ecc); + return PTR_ERR(desc); + } + + spinand->dirmaps[plane].rdesc_ecc = desc; + return 0; } @@ -1019,7 +1141,7 @@ int spinand_match_and_init(struct spinand_device *spinand, continue; nand->memorg = table[i].memorg; - nand->eccreq = table[i].eccreq; + nanddev_set_ecc_requirements(nand, &table[i].eccreq); spinand->eccinfo = table[i].eccinfo; spinand->flags = table[i].flags; spinand->id.len = 1 + table[i].devid.len; @@ -1171,6 +1293,15 @@ static int spinand_init(struct spinand_device *spinand) if (ret) goto err_manuf_cleanup; + /* SPI-NAND default ECC engine is on-die */ + nand->ecc.defaults.engine_type = NAND_ECC_ENGINE_TYPE_ON_DIE; + nand->ecc.ondie_engine = &spinand_ondie_ecc_engine; + + spinand_ecc_enable(spinand, false); + ret = nanddev_ecc_engine_init(nand); + if (ret) + goto err_cleanup_nanddev; + mtd->_read_oob = spinand_mtd_read; mtd->_write_oob = spinand_mtd_write; mtd->_block_isbad = spinand_mtd_block_isbad; @@ -1178,27 +1309,31 @@ static int spinand_init(struct spinand_device *spinand) mtd->_block_isreserved = spinand_mtd_block_isreserved; mtd->_erase = spinand_mtd_erase; - if (spinand->eccinfo.ooblayout) - mtd_set_ooblayout(mtd, spinand->eccinfo.ooblayout); - else - mtd_set_ooblayout(mtd, &spinand_noecc_ooblayout); - - ret = mtd_ooblayout_count_freebytes(mtd); - if (ret < 0) - goto err_cleanup_nanddev; + if (nand->ecc.engine) { + ret = mtd_ooblayout_count_freebytes(mtd); + if (ret < 0) + goto err_cleanup_ecc_engine; + } mtd->oobavail = ret; + /* Propagate ECC information to mtd_info */ + mtd->ecc_strength = nanddev_get_ecc_conf(nand)->strength; + mtd->ecc_step_size = nanddev_get_ecc_conf(nand)->step_size; + ret = spinand_create_dirmaps(spinand); if (ret) { dev_err(dev, "Failed to create direct mappings for read/write operations (err = %d)\n", ret); - goto err_cleanup_nanddev; + goto err_cleanup_ecc_engine; } return 0; +err_cleanup_ecc_engine: + nanddev_ecc_engine_cleanup(nand); + err_cleanup_nanddev: nanddev_cleanup(nand); diff --git a/drivers/mtd/nand/spi/foresee.c b/drivers/mtd/nand/spi/foresee.c index 7d141cdd658..6229c959b2c 100644 --- a/drivers/mtd/nand/spi/foresee.c +++ b/drivers/mtd/nand/spi/foresee.c @@ -60,7 +60,7 @@ static int f35sqa002g_ecc_get_status(struct spinand_device *spinand, u8 status) return 0; case STATUS_ECC_HAS_BITFLIPS: - return nand->eccreq.strength; + return nanddev_get_ecc_conf(nand)->strength; default: break; diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macronix.c index 3d4a7f0c3cb..c2a7aa2da96 100644 --- a/drivers/mtd/nand/spi/macronix.c +++ b/drivers/mtd/nand/spi/macronix.c @@ -87,11 +87,12 @@ static int mx35lf1ge4ab_ecc_get_status(struct spinand_device *spinand, * data around if it's not necessary. */ if (mx35lf1ge4ab_get_eccsr(spinand, spinand->scratchbuf)) - return nand->eccreq.strength; + return nanddev_get_ecc_conf(nand)->strength; eccsr = *spinand->scratchbuf; - if (WARN_ON(eccsr > nand->eccreq.strength || !eccsr)) - return nand->eccreq.strength; + if (WARN_ON(eccsr > nanddev_get_ecc_conf(nand)->strength || + !eccsr)) + return nanddev_get_ecc_conf(nand)->strength; return eccsr; diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c index b538213ed8e..01c177facfb 100644 --- a/drivers/mtd/nand/spi/micron.c +++ b/drivers/mtd/nand/spi/micron.c @@ -14,7 +14,7 @@ #define SPINAND_MFR_MICRON 0x2c -#define MICRON_STATUS_ECC_MASK GENMASK(7, 4) +#define MICRON_STATUS_ECC_MASK GENMASK(6, 4) #define MICRON_STATUS_ECC_NO_BITFLIPS (0 << 4) #define MICRON_STATUS_ECC_1TO3_BITFLIPS (1 << 4) #define MICRON_STATUS_ECC_4TO6_BITFLIPS (3 << 4) diff --git a/drivers/mtd/nand/spi/toshiba.c b/drivers/mtd/nand/spi/toshiba.c index ad48b1c7c8a..bf7da57de13 100644 --- a/drivers/mtd/nand/spi/toshiba.c +++ b/drivers/mtd/nand/spi/toshiba.c @@ -76,7 +76,7 @@ static int tx58cxgxsxraix_ecc_get_status(struct spinand_device *spinand, { struct nand_device *nand = spinand_to_nand(spinand); u8 mbf = 0; - struct spi_mem_op op = SPINAND_GET_FEATURE_OP(0x30, &mbf); + struct spi_mem_op op = SPINAND_GET_FEATURE_OP(0x30, spinand->scratchbuf); switch (status & STATUS_ECC_MASK) { case STATUS_ECC_NO_BITFLIPS: @@ -93,12 +93,12 @@ static int tx58cxgxsxraix_ecc_get_status(struct spinand_device *spinand, * data around if it's not necessary. */ if (spi_mem_exec_op(spinand->slave, &op)) - return nand->eccreq.strength; + return nanddev_get_ecc_conf(nand)->strength; - mbf >>= 4; + mbf = *(spinand->scratchbuf) >> 4; - if (WARN_ON(mbf > nand->eccreq.strength || !mbf)) - return nand->eccreq.strength; + if (WARN_ON(mbf > nanddev_get_ecc_conf(nand)->strength || !mbf)) + return nanddev_get_ecc_conf(nand)->strength; return mbf; diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c index c62096dc2e6..d7dc1c86494 100644 --- a/drivers/mtd/nand/spi/winbond.c +++ b/drivers/mtd/nand/spi/winbond.c @@ -113,7 +113,7 @@ static int w25n02kv_ecc_get_status(struct spinand_device *spinand, { struct nand_device *nand = spinand_to_nand(spinand); u8 mbf = 0; - struct spi_mem_op op = SPINAND_GET_FEATURE_OP(0x30, &mbf); + struct spi_mem_op op = SPINAND_GET_FEATURE_OP(0x30, spinand->scratchbuf); switch (status & STATUS_ECC_MASK) { case STATUS_ECC_NO_BITFLIPS: @@ -130,12 +130,12 @@ static int w25n02kv_ecc_get_status(struct spinand_device *spinand, * data around if it's not necessary. */ if (spi_mem_exec_op(spinand->slave, &op)) - return nand->eccreq.strength; + return nanddev_get_ecc_conf(nand)->strength; - mbf >>= 4; + mbf = *(spinand->scratchbuf) >> 4; - if (WARN_ON(mbf > nand->eccreq.strength || !mbf)) - return nand->eccreq.strength; + if (WARN_ON(mbf > nanddev_get_ecc_conf(nand)->strength || !mbf)) + return nanddev_get_ecc_conf(nand)->strength; return mbf; diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index 0afdaed5715..18b9cf276ac 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -12,6 +12,8 @@ #include +struct nand_device; + /** * struct nand_memory_organization - Memory organization structure * @bits_per_cell: number of bits per NAND cell @@ -126,17 +128,72 @@ struct nand_page_io_req { }; /** - * struct nand_ecc_req - NAND ECC requirements + * enum nand_ecc_engine_type - NAND ECC engine type + * @NAND_ECC_ENGINE_TYPE_INVALID: Invalid value + * @NAND_ECC_ENGINE_TYPE_NONE: No ECC correction + * @NAND_ECC_ENGINE_TYPE_SOFT: Software ECC correction + * @NAND_ECC_ENGINE_TYPE_ON_HOST: On host hardware ECC correction + * @NAND_ECC_ENGINE_TYPE_ON_DIE: On chip hardware ECC correction + */ +enum nand_ecc_engine_type { + NAND_ECC_ENGINE_TYPE_INVALID, + NAND_ECC_ENGINE_TYPE_NONE, + NAND_ECC_ENGINE_TYPE_SOFT, + NAND_ECC_ENGINE_TYPE_ON_HOST, + NAND_ECC_ENGINE_TYPE_ON_DIE, +}; + +/** + * enum nand_ecc_placement - NAND ECC bytes placement + * @NAND_ECC_PLACEMENT_UNKNOWN: The actual position of the ECC bytes is unknown + * @NAND_ECC_PLACEMENT_OOB: The ECC bytes are located in the OOB area + * @NAND_ECC_PLACEMENT_INTERLEAVED: Syndrome layout, there are ECC bytes + * interleaved with regular data in the main + * area + */ +enum nand_ecc_placement { + NAND_ECC_PLACEMENT_UNKNOWN, + NAND_ECC_PLACEMENT_OOB, + NAND_ECC_PLACEMENT_INTERLEAVED, +}; + +/** + * enum nand_ecc_algo - NAND ECC algorithm + * @NAND_ECC_ALGO_UNKNOWN: Unknown algorithm + * @NAND_ECC_ALGO_HAMMING: Hamming algorithm + * @NAND_ECC_ALGO_BCH: Bose-Chaudhuri-Hocquenghem algorithm + * @NAND_ECC_ALGO_RS: Reed-Solomon algorithm + */ +enum nand_ecc_algo { + NAND_ECC_ALGO_UNKNOWN, + NAND_ECC_ALGO_HAMMING, + NAND_ECC_ALGO_BCH, + NAND_ECC_ALGO_RS, +}; + +/** + * struct nand_ecc_props - NAND ECC properties + * @engine_type: ECC engine type + * @placement: OOB placement (if relevant) + * @algo: ECC algorithm (if relevant) * @strength: ECC strength - * @step_size: ECC step/block size + * @step_size: Number of bytes per step + * @flags: Misc properties */ -struct nand_ecc_req { +struct nand_ecc_props { + enum nand_ecc_engine_type engine_type; + enum nand_ecc_placement placement; + enum nand_ecc_algo algo; unsigned int strength; unsigned int step_size; + unsigned int flags; }; #define NAND_ECCREQ(str, stp) { .strength = (str), .step_size = (stp) } +/* NAND ECC misc flags */ +#define NAND_ECC_MAXIMIZE_STRENGTH BIT(0) + /** * struct nand_bbt - bad block table object * @cache: in memory BBT cache @@ -145,8 +202,6 @@ struct nand_bbt { unsigned long *cache; }; -struct nand_device; - /** * struct nand_ops - NAND operations * @erase: erase a specific block. No need to check if the block is bad before @@ -169,11 +224,130 @@ struct nand_ops { bool (*isbad)(struct nand_device *nand, const struct nand_pos *pos); }; +/** + * struct nand_ecc_context - Context for the ECC engine + * @conf: basic ECC engine parameters + * @nsteps: number of ECC steps + * @total: total number of bytes used for storing ECC codes, this is used by + * generic OOB layouts + * @priv: ECC engine driver private data + */ +struct nand_ecc_context { + struct nand_ecc_props conf; + unsigned int nsteps; + unsigned int total; + void *priv; +}; + +/** + * struct nand_ecc_engine_ops - ECC engine operations + * @init_ctx: given a desired user configuration for the pointed NAND device, + * requests the ECC engine driver to setup a configuration with + * values it supports. + * @cleanup_ctx: clean the context initialized by @init_ctx. + * @prepare_io_req: is called before reading/writing a page to prepare the I/O + * request to be performed with ECC correction. + * @finish_io_req: is called after reading/writing a page to terminate the I/O + * request and ensure proper ECC correction. + */ +struct nand_ecc_engine_ops { + int (*init_ctx)(struct nand_device *nand); + void (*cleanup_ctx)(struct nand_device *nand); + int (*prepare_io_req)(struct nand_device *nand, + struct nand_page_io_req *req); + int (*finish_io_req)(struct nand_device *nand, + struct nand_page_io_req *req); +}; + +/** + * enum nand_ecc_engine_integration - How the NAND ECC engine is integrated + * @NAND_ECC_ENGINE_INTEGRATION_INVALID: Invalid value + * @NAND_ECC_ENGINE_INTEGRATION_PIPELINED: Pipelined engine, performs on-the-fly + * correction, does not need to copy + * data around + * @NAND_ECC_ENGINE_INTEGRATION_EXTERNAL: External engine, needs to bring the + * data into its own area before use + */ +enum nand_ecc_engine_integration { + NAND_ECC_ENGINE_INTEGRATION_INVALID, + NAND_ECC_ENGINE_INTEGRATION_PIPELINED, + NAND_ECC_ENGINE_INTEGRATION_EXTERNAL, +}; + +/** + * struct nand_ecc_engine - ECC engine abstraction for NAND devices + * @dev: Host device + * @node: Private field for registration time + * @ops: ECC engine operations + * @integration: How the engine is integrated with the host + * (only relevant on %NAND_ECC_ENGINE_TYPE_ON_HOST engines) + * @priv: Private data + */ +struct nand_ecc_engine { + struct device *dev; + struct list_head node; + struct nand_ecc_engine_ops *ops; + enum nand_ecc_engine_integration integration; + void *priv; +}; + +void of_get_nand_ecc_user_config(struct nand_device *nand); +int nand_ecc_init_ctx(struct nand_device *nand); +void nand_ecc_cleanup_ctx(struct nand_device *nand); +int nand_ecc_prepare_io_req(struct nand_device *nand, + struct nand_page_io_req *req); +int nand_ecc_finish_io_req(struct nand_device *nand, + struct nand_page_io_req *req); +bool nand_ecc_is_strong_enough(struct nand_device *nand); + +struct nand_ecc_engine *nand_ecc_get_sw_engine(struct nand_device *nand); +struct nand_ecc_engine *nand_ecc_get_on_die_hw_engine(struct nand_device *nand); +struct nand_ecc_engine *nand_ecc_get_on_host_hw_engine(struct nand_device *nand); +void nand_ecc_put_on_host_hw_engine(struct nand_device *nand); +struct device *nand_ecc_get_engine_dev(struct device *host); + +#if defined(CONFIG_MTD_NAND_ECC_SW_HAMMING) +struct nand_ecc_engine *nand_ecc_sw_hamming_get_engine(void); +#else +static inline struct nand_ecc_engine *nand_ecc_sw_hamming_get_engine(void) +{ + return NULL; +} +#endif + +#if defined(CONFIG_MTD_NAND_ECC_SW_BCH) +struct nand_ecc_engine *nand_ecc_sw_bch_get_engine(void); +#else +static inline struct nand_ecc_engine *nand_ecc_sw_bch_get_engine(void) +{ + return NULL; +} +#endif + +/** + * struct nand_ecc - Information relative to the ECC + * @defaults: Default values, depend on the underlying subsystem + * @requirements: ECC requirements from the NAND chip perspective + * @user_conf: User desires in terms of ECC parameters + * @ctx: ECC context for the ECC engine, derived from the device @requirements + * the @user_conf and the @defaults + * @ondie_engine: On-die ECC engine reference, if any + * @engine: ECC engine actually bound + */ +struct nand_ecc { + struct nand_ecc_props defaults; + struct nand_ecc_props requirements; + struct nand_ecc_props user_conf; + struct nand_ecc_context ctx; + struct nand_ecc_engine *ondie_engine; + struct nand_ecc_engine *engine; +}; + /** * struct nand_device - NAND device * @mtd: MTD instance attached to the NAND device * @memorg: memory layout - * @eccreq: ECC requirements + * @ecc: NAND ECC object attached to the NAND device * @rowconv: position to row address converter * @bbt: bad block table info * @ops: NAND operations attached to the NAND device @@ -181,8 +355,8 @@ struct nand_ops { * Generic NAND object. Specialized NAND layers (raw NAND, SPI NAND, OneNAND) * should declare their own NAND object embedding a nand_device struct (that's * how inheritance is done). - * struct_nand_device->memorg and struct_nand_device->eccreq should be filled - * at device detection time to reflect the NAND device + * struct_nand_device->memorg and struct_nand_device->ecc.requirements should + * be filled at device detection time to reflect the NAND device * capabilities/requirements. Once this is done nanddev_init() can be called. * It will take care of converting NAND information into MTD ones, which means * the specialized NAND layers should never manually tweak @@ -191,7 +365,7 @@ struct nand_ops { struct nand_device { struct mtd_info *mtd; struct nand_memory_organization memorg; - struct nand_ecc_req eccreq; + struct nand_ecc ecc; struct nand_row_converter rowconv; struct nand_bbt bbt; const struct nand_ops *ops; @@ -332,7 +506,7 @@ static inline unsigned int nanddev_ntargets(const struct nand_device *nand) } /** - * nanddev_neraseblocks() - Get the total number of erasablocks + * nanddev_neraseblocks() - Get the total number of eraseblocks * @nand: NAND device * * Return: the total number of eraseblocks exposed by @nand. @@ -370,6 +544,60 @@ nanddev_get_memorg(struct nand_device *nand) return &nand->memorg; } +/** + * nanddev_get_ecc_conf() - Extract the ECC configuration from a NAND device + * @nand: NAND device + */ +static inline const struct nand_ecc_props * +nanddev_get_ecc_conf(struct nand_device *nand) +{ + return &nand->ecc.ctx.conf; +} + +/** + * nanddev_get_ecc_nsteps() - Extract the number of ECC steps + * @nand: NAND device + */ +static inline unsigned int +nanddev_get_ecc_nsteps(struct nand_device *nand) +{ + return nand->ecc.ctx.nsteps; +} + +/** + * nanddev_get_ecc_bytes_per_step() - Extract the number of ECC bytes per step + * @nand: NAND device + */ +static inline unsigned int +nanddev_get_ecc_bytes_per_step(struct nand_device *nand) +{ + return nand->ecc.ctx.total / nand->ecc.ctx.nsteps; +} + +/** + * nanddev_get_ecc_requirements() - Extract the ECC requirements from a NAND + * device + * @nand: NAND device + */ +static inline const struct nand_ecc_props * +nanddev_get_ecc_requirements(struct nand_device *nand) +{ + return &nand->ecc.requirements; +} + +/** + * nanddev_set_ecc_requirements() - Assign the ECC requirements of a NAND + * device + * @nand: NAND device + * @reqs: Requirements + */ +static inline void +nanddev_set_ecc_requirements(struct nand_device *nand, + const struct nand_ecc_props *reqs) +{ + nand->ecc.requirements = *reqs; +} + int nanddev_init(struct nand_device *nand, const struct nand_ops *ops, struct module *owner); void nanddev_cleanup(struct nand_device *nand); @@ -598,7 +826,7 @@ static inline void nanddev_pos_next_eraseblock(struct nand_device *nand, } /** - * nanddev_pos_next_eraseblock() - Move a position to the next page + * nanddev_pos_next_page() - Move a position to the next page * @nand: NAND device * @pos: the position to update * @@ -708,8 +936,18 @@ static inline bool nanddev_io_iter_end(struct nand_device *nand, bool nanddev_isbad(struct nand_device *nand, const struct nand_pos *pos); bool nanddev_isreserved(struct nand_device *nand, const struct nand_pos *pos); +int nanddev_erase(struct nand_device *nand, const struct nand_pos *pos); int nanddev_markbad(struct nand_device *nand, const struct nand_pos *pos); +/* ECC related functions */ +int nanddev_ecc_engine_init(struct nand_device *nand); +void nanddev_ecc_engine_cleanup(struct nand_device *nand); + +static inline void *nand_to_ecc_ctx(struct nand_device *nand) +{ + return nand->ecc.ctx.priv; +} + /* BBT related functions */ enum nand_bbt_block_status { NAND_BBT_BLOCK_STATUS_UNKNOWN, @@ -760,5 +998,6 @@ static inline bool nanddev_bbt_is_initialized(struct nand_device *nand) /* MTD -> NAND helper functions. */ int nanddev_mtd_erase(struct mtd_info *mtd, struct erase_info *einfo); +int nanddev_mtd_max_bad_blocks(struct mtd_info *mtd, loff_t offs, size_t len); #endif /* __LINUX_MTD_NAND_H */ diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h index 81a7b0dbbb2..3bcdbffc34a 100644 --- a/include/linux/mtd/spinand.h +++ b/include/linux/mtd/spinand.h @@ -319,6 +319,15 @@ struct spinand_ecc_info { #define SPINAND_HAS_QE_BIT BIT(0) #define SPINAND_HAS_CR_FEAT_BIT BIT(1) +/** + * struct spinand_ondie_ecc_conf - private SPI-NAND on-die ECC engine structure + * @status: status of the last wait operation that will be used in case + * ->get_status() is not populated by the spinand device. + */ +struct spinand_ondie_ecc_conf { + u8 status; +}; + /** * struct spinand_info - Structure used to describe SPI NAND chips * @model: model name @@ -342,7 +351,7 @@ struct spinand_info { struct spinand_devid devid; u32 flags; struct nand_memory_organization memorg; - struct nand_ecc_req eccreq; + struct nand_ecc_props eccreq; struct spinand_ecc_info eccinfo; struct { const struct spinand_op_variants *read_cache; @@ -391,6 +400,8 @@ struct spinand_info { struct spinand_dirmap { struct spi_mem_dirmap_desc *wdesc; struct spi_mem_dirmap_desc *rdesc; + struct spi_mem_dirmap_desc *wdesc_ecc; + struct spi_mem_dirmap_desc *rdesc_ecc; }; /** diff --git a/include/spi-mem.h b/include/spi-mem.h index 3c8e95b6f53..82dbe21fd5a 100644 --- a/include/spi-mem.h +++ b/include/spi-mem.h @@ -91,6 +91,7 @@ enum spi_mem_data_dir { * @dummy.dtr: whether the dummy bytes should be sent in DTR mode or not * @data.buswidth: number of IO lanes used to send/receive the data * @data.dtr: whether the data should be sent in DTR mode or not + * @data.ecc: whether error correction is required or not * @data.dir: direction of the transfer * @data.buf.in: input buffer * @data.buf.out: output buffer @@ -119,6 +120,7 @@ struct spi_mem_op { struct { u8 buswidth; u8 dtr : 1; + u8 ecc : 1; enum spi_mem_data_dir dir; unsigned int nbytes; /* buf.{in,out} must be DMA-able. */