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Miller" , "Eric Dumazet" , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski CC: Pierre-Henry Moussay , , , , , Subject: [linux][PATCH v2 01/20] dt-bindings: can: mpfs: add PIC64GX CAN compatibility Date: Mon, 30 Sep 2024 10:54:30 +0100 Message-ID: <20240930095449.1813195-2-pierre-henry.moussay@microchip.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> References: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Pierre-Henry Moussay PIC64GX CAN is compatible with the MPFS CAN, only add a fallback Signed-off-by: Pierre-Henry Moussay Acked-by: Conor Dooley Reviewed-by: Marc Kleine-Budde --- .../devicetree/bindings/net/can/microchip,mpfs-can.yaml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/net/can/microchip,mpfs-can.yaml b/Documentation/devicetree/bindings/net/can/microchip,mpfs-can.yaml index 01e4d4a54df6..1219c5cb601f 100644 --- a/Documentation/devicetree/bindings/net/can/microchip,mpfs-can.yaml +++ b/Documentation/devicetree/bindings/net/can/microchip,mpfs-can.yaml @@ -15,7 +15,11 @@ allOf: properties: compatible: - const: microchip,mpfs-can + oneOf: + - items: + - const: microchip,pic64gx-can + - const: microchip,mpfs-can + - const: microchip,mpfs-can reg: maxItems: 1 From patchwork Mon Sep 30 09:54:31 2024 Content-Type: text/plain; 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30 Sep 2024 02:55:23 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 30 Sep 2024 02:55:02 -0700 Received: from ph-emdalo.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Mon, 30 Sep 2024 02:55:00 -0700 From: To: , Conor Dooley , Daire McNamara , Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski CC: Pierre-Henry Moussay , , , , Subject: [linux][PATCH v2 02/20] dt-bindings: usb: add PIC64GX compatibility to mpfs-musb driver Date: Mon, 30 Sep 2024 10:54:31 +0100 Message-ID: <20240930095449.1813195-3-pierre-henry.moussay@microchip.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> References: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Pierre-Henry Moussay PIC64GX musb is compatible with mpfs-musb, just update compatibility with fallback Signed-off-by: Pierre-Henry Moussay Acked-by: Conor Dooley --- .../devicetree/bindings/usb/microchip,mpfs-musb.yaml | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/usb/microchip,mpfs-musb.yaml b/Documentation/devicetree/bindings/usb/microchip,mpfs-musb.yaml index 27b909de4992..a812317d8089 100644 --- a/Documentation/devicetree/bindings/usb/microchip,mpfs-musb.yaml +++ b/Documentation/devicetree/bindings/usb/microchip,mpfs-musb.yaml @@ -14,8 +14,11 @@ maintainers: properties: compatible: - enum: - - microchip,mpfs-musb + oneOf: + - items: + - const: microchip,pic64gx-musb + - const: microchip,mpfs-musb + - const: microchip,mpfs-musb dr_mode: true From patchwork Mon Sep 30 09:54:32 2024 Content-Type: text/plain; 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30 Sep 2024 02:55:39 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 30 Sep 2024 02:55:04 -0700 Received: from ph-emdalo.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Mon, 30 Sep 2024 02:55:03 -0700 From: To: , Conor Dooley , Daire McNamara , Jassi Brar , Rob Herring , Krzysztof Kozlowski CC: Pierre-Henry Moussay , , , Subject: [linux][PATCH v2 03/20] dt-bindings: mbox: add PIC64GX mailbox compatibility to MPFS mailbox Date: Mon, 30 Sep 2024 10:54:32 +0100 Message-ID: <20240930095449.1813195-4-pierre-henry.moussay@microchip.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> References: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Pierre-Henry Moussay PIC64GX mailbox is compatible with MPFS mailbox, just add fallback Signed-off-by: Pierre-Henry Moussay --- .../devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml index 404477910f02..9e45112e185a 100644 --- a/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml +++ b/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml @@ -11,7 +11,11 @@ maintainers: properties: compatible: - const: microchip,mpfs-mailbox + oneOf: + - items: + - const: microchip,pic64gx-mailbox + - const: microchip,mpfs-mailbox + - const: microchip,mpfs-mailbox reg: oneOf: From patchwork Mon Sep 30 09:54:33 2024 Content-Type: text/plain; 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30 Sep 2024 02:55:40 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 30 Sep 2024 02:55:07 -0700 Received: from ph-emdalo.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Mon, 30 Sep 2024 02:55:05 -0700 From: To: , Conor Dooley , Daire McNamara , Mark Brown , Rob Herring , "Krzysztof Kozlowski" CC: Pierre-Henry Moussay , , , , Subject: [linux][PATCH v2 04/20] dt-bindings: spi: add PIC64GX SPI/QSPI compatibility to MPFS SPI/QSPI bindings Date: Mon, 30 Sep 2024 10:54:33 +0100 Message-ID: <20240930095449.1813195-5-pierre-henry.moussay@microchip.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> References: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Pierre-Henry Moussay PIC64GX SPI/QSPI are compatible with MPFS SPI/QSPI, just use fallback mechanism Signed-off-by: Pierre-Henry Moussay Acked-by: Conor Dooley --- .../devicetree/bindings/spi/microchip,mpfs-spi.yaml | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml b/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml index ffa8d1b48f8b..62a568bdbfa0 100644 --- a/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml +++ b/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml @@ -17,9 +17,14 @@ properties: compatible: oneOf: - items: - - const: microchip,mpfs-qspi + - enum: + - microchip,mpfs-qspi + - microchip,pic64gx-qspi - const: microchip,coreqspi-rtl-v2 - const: microchip,coreqspi-rtl-v2 # FPGA QSPI + - items: + - const: microchip,pic64gx-spi + - const: microchip,mpfs-spi - const: microchip,mpfs-spi reg: From patchwork Mon Sep 30 09:54:34 2024 Content-Type: text/plain; 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30 Sep 2024 02:55:40 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 30 Sep 2024 02:55:10 -0700 Received: from ph-emdalo.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Mon, 30 Sep 2024 02:55:08 -0700 From: To: , Conor Dooley , Daire McNamara , Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski CC: Pierre-Henry Moussay , , , , Subject: [linux][PATCH v2 05/20] dt-bindings: gpio: mpfs-gpio: Add PIC64GX GPIO compatibility Date: Mon, 30 Sep 2024 10:54:34 +0100 Message-ID: <20240930095449.1813195-6-pierre-henry.moussay@microchip.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> References: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Pierre-Henry Moussay PIC64GX GPIO is compatible with mpfs-gpio controller, just add fallback Signed-off-by: Pierre-Henry Moussay --- .../bindings/gpio/microchip,mpfs-gpio.yaml | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml b/Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml index d61569b3f15b..febe8c2cd70d 100644 --- a/Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml @@ -11,10 +11,14 @@ maintainers: properties: compatible: - items: - - enum: - - microchip,mpfs-gpio - - microchip,coregpio-rtl-v3 + oneOf: + - items: + - const: microchip,pic64gx-gpio + - const: microchip,mpfs-gpio + - items: + - enum: + - microchip,mpfs-gpio + - microchip,coregpio-rtl-v3 reg: maxItems: 1 @@ -69,7 +73,8 @@ allOf: properties: compatible: contains: - const: microchip,mpfs-gpio + enum: + - microchip,mpfs-gpio then: required: - interrupts From patchwork Mon Sep 30 09:54:35 2024 Content-Type: text/plain; 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30 Sep 2024 02:55:23 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 30 Sep 2024 02:55:13 -0700 Received: from ph-emdalo.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Mon, 30 Sep 2024 02:55:11 -0700 From: To: , Conor Dooley , "Rob Herring" , Krzysztof Kozlowski , "Paul Walmsley" , Samuel Holland CC: Pierre-Henry Moussay , , , Subject: [linux][PATCH v2 06/20] dt-bindings: cache: sifive,ccache0: add a PIC64GX compatible Date: Mon, 30 Sep 2024 10:54:35 +0100 Message-ID: <20240930095449.1813195-7-pierre-henry.moussay@microchip.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> References: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Pierre-Henry Moussay The PIC64GX use the same IP than MPFS, therefore add compatibility with MPFS as fallback Signed-off-by: Pierre-Henry Moussay --- Documentation/devicetree/bindings/cache/sifive,ccache0.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml b/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml index 7e8cebe21584..9d064feb2ab1 100644 --- a/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml +++ b/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml @@ -47,6 +47,11 @@ properties: - const: microchip,mpfs-ccache - const: sifive,fu540-c000-ccache - const: cache + - items: + - const: microchip,pic64gx-ccache + - const: microchip,mpfs-ccache + - const: sifive,fu540-c000-ccache + - const: cache cache-block-size: const: 64 @@ -93,6 +98,7 @@ allOf: - starfive,jh7100-ccache - starfive,jh7110-ccache - microchip,mpfs-ccache + - microchip,pic64gx-ccache then: properties: From patchwork Mon Sep 30 09:54:36 2024 Content-Type: text/plain; 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30 Sep 2024 02:55:40 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 30 Sep 2024 02:55:16 -0700 Received: from ph-emdalo.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Mon, 30 Sep 2024 02:55:14 -0700 From: To: , Conor Dooley , Daire McNamara , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski CC: Pierre-Henry Moussay , , , , Subject: [linux][PATCH v2 07/20] dt-bindings: clock: mpfs-ccc: Add PIC64GX compatibility Date: Mon, 30 Sep 2024 10:54:36 +0100 Message-ID: <20240930095449.1813195-8-pierre-henry.moussay@microchip.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> References: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Pierre-Henry Moussay PIC64GX SoC Clock Conditioning Circuitry is compatibles with the Polarfire SoC Signed-off-by: Pierre-Henry Moussay Acked-by: Conor Dooley --- .../devicetree/bindings/clock/microchip,mpfs-ccc.yaml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml b/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml index f1770360798f..9a6b50527c42 100644 --- a/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml +++ b/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml @@ -17,7 +17,11 @@ description: | properties: compatible: - const: microchip,mpfs-ccc + oneOf: + - items: + - const: microchip,pic64gx-ccc + - const: microchip,mpfs-ccc + - const: microchip,mpfs-ccc reg: items: From patchwork Mon Sep 30 09:54:37 2024 Content-Type: text/plain; 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30 Sep 2024 02:55:41 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 30 Sep 2024 02:55:19 -0700 Received: from ph-emdalo.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Mon, 30 Sep 2024 02:55:17 -0700 From: To: , Conor Dooley , Daire McNamara , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski CC: Pierre-Henry Moussay , , , , Subject: [linux][PATCH v2 08/20] dt-bindings: clock: mpfs-clkcfg: Add PIC64GX compatibility Date: Mon, 30 Sep 2024 10:54:37 +0100 Message-ID: <20240930095449.1813195-9-pierre-henry.moussay@microchip.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> References: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Pierre-Henry Moussay PIC64GX has a clock controller compatible whith mpfs-clkcfg Signed-off-by: Pierre-Henry Moussay --- .../devicetree/bindings/clock/microchip,mpfs-clkcfg.yaml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/clock/microchip,mpfs-clkcfg.yaml b/Documentation/devicetree/bindings/clock/microchip,mpfs-clkcfg.yaml index e4e1c31267d2..ca889f5df87a 100644 --- a/Documentation/devicetree/bindings/clock/microchip,mpfs-clkcfg.yaml +++ b/Documentation/devicetree/bindings/clock/microchip,mpfs-clkcfg.yaml @@ -19,7 +19,11 @@ description: | properties: compatible: - const: microchip,mpfs-clkcfg + oneOf: + - items: + - const: microchip,pic64gx-clkcfg + - const: microchip,mpfs-clkcfg + - const: microchip,mpfs-clkcfg reg: items: From patchwork Mon Sep 30 09:54:38 2024 Content-Type: text/plain; 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30 Sep 2024 02:55:41 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 30 Sep 2024 02:55:23 -0700 Received: from ph-emdalo.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Mon, 30 Sep 2024 02:55:20 -0700 From: To: , Vinod Koul , "Rob Herring" , Krzysztof Kozlowski , "Conor Dooley" , Paul Walmsley , Samuel Holland , Green Wan , Palmer Debbelt CC: Pierre-Henry Moussay , , , , Subject: [linux][PATCH v2 09/20] dt-bindings: dma: sifive pdma: Add PIC64GX to compatibles Date: Mon, 30 Sep 2024 10:54:38 +0100 Message-ID: <20240930095449.1813195-10-pierre-henry.moussay@microchip.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> References: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Pierre-Henry Moussay PIC64GX is compatible as out of order DMA capable, just like the MPFS version, therefore we add it with microchip,mpfs-pdma as a fallback Signed-off-by: Pierre-Henry Moussay Acked-by: Conor Dooley --- .../bindings/dma/sifive,fu540-c000-pdma.yaml | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml index 3b22183a1a37..609e38901434 100644 --- a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml +++ b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml @@ -27,11 +27,16 @@ allOf: properties: compatible: - items: - - enum: - - microchip,mpfs-pdma - - sifive,fu540-c000-pdma - - const: sifive,pdma0 + oneOf: + - items: + - const: microchip,pic64gx-pdma + - const: microchip,mpfs-pdma + - const: sifive,pdma0 + - items: + - enum: + - microchip,mpfs-pdma + - sifive,fu540-c000-pdma + - const: sifive,pdma0 description: Should be "sifive,-pdma" and "sifive,pdma". Supported compatible strings are - From patchwork Mon Sep 30 09:54:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: pierre-henry.moussay@microchip.com X-Patchwork-Id: 1990881 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=microchip.com header.i=@microchip.com header.a=rsa-sha256 header.s=mchp header.b=x3R2DN14; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2604:1380:40f1:3f00::1; helo=sy.mirrors.kernel.org; envelope-from=devicetree+bounces-106399-incoming-dt=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org [IPv6:2604:1380:40f1:3f00::1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4XHGj83Z8Fz1xsc for ; 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30 Sep 2024 02:55:56 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 30 Sep 2024 02:55:26 -0700 Received: from ph-emdalo.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Mon, 30 Sep 2024 02:55:24 -0700 From: To: , Conor Dooley , Daire McNamara , Andi Shyti , Rob Herring , "Krzysztof Kozlowski" CC: Pierre-Henry Moussay , , , , Subject: [linux][PATCH v2 10/20] dt-bindings: i2c: microchip: corei2c: Add PIC64GX as compatible with driver Date: Mon, 30 Sep 2024 10:54:39 +0100 Message-ID: <20240930095449.1813195-11-pierre-henry.moussay@microchip.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> References: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Pierre-Henry Moussay PIC64GX i2c is compatible with the microchip corei2c, just add fallback Signed-off-by: Pierre-Henry Moussay Acked-by: Conor Dooley --- Documentation/devicetree/bindings/i2c/microchip,corei2c.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/i2c/microchip,corei2c.yaml b/Documentation/devicetree/bindings/i2c/microchip,corei2c.yaml index afa3db726229..6ff58b64d496 100644 --- a/Documentation/devicetree/bindings/i2c/microchip,corei2c.yaml +++ b/Documentation/devicetree/bindings/i2c/microchip,corei2c.yaml @@ -16,7 +16,9 @@ properties: compatible: oneOf: - items: - - const: microchip,mpfs-i2c # Microchip PolarFire SoC compatible SoCs + - enum: + - microchip,pic64gx-i2c + - microchip,mpfs-i2c # Microchip PolarFire SoC compatible SoCs - const: microchip,corei2c-rtl-v7 # Microchip Fabric based i2c IP core - const: microchip,corei2c-rtl-v7 # Microchip Fabric based i2c IP core From patchwork Mon Sep 30 09:54:40 2024 Content-Type: text/plain; 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30 Sep 2024 02:55:57 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 30 Sep 2024 02:55:28 -0700 Received: from ph-emdalo.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Mon, 30 Sep 2024 02:55:27 -0700 From: To: , Ulf Hansson , "Rob Herring" , Krzysztof Kozlowski , "Conor Dooley" , Masahiro Yamada CC: Pierre-Henry Moussay , , , Subject: [linux][PATCH v2 11/20] dt-bindings: mmc: cdns: document Microchip PIC64GX MMC/SDHCI controller Date: Mon, 30 Sep 2024 10:54:40 +0100 Message-ID: <20240930095449.1813195-12-pierre-henry.moussay@microchip.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> References: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Pierre-Henry Moussay PIC64GX is compatible with cdns,sd4hc without any additional feature Signed-off-by: Pierre-Henry Moussay Acked-by: Conor Dooley --- Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml index 6c40611405a0..ee3a838f7f06 100644 --- a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml @@ -15,6 +15,7 @@ properties: - enum: - amd,pensando-elba-sd4hc - microchip,mpfs-sd4hc + - microchip,pic64gx-sd4hc - socionext,uniphier-sd4hc - const: cdns,sd4hc From patchwork Mon Sep 30 09:54:41 2024 Content-Type: text/plain; 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Miller" , Eric Dumazet , Jakub Kicinski , "Paolo Abeni" , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Nicolas Ferre , Claudiu Beznea CC: Pierre-Henry Moussay , , , Subject: [linux][PATCH v2 12/20] dt-bindings: net: cdns,macb: Add PIC64GX compatibility Date: Mon, 30 Sep 2024 10:54:41 +0100 Message-ID: <20240930095449.1813195-13-pierre-henry.moussay@microchip.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> References: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Pierre-Henry Moussay PIC64GX uses cdns,macb IP, without additional vendor features Signed-off-by: Pierre-Henry Moussay --- Documentation/devicetree/bindings/net/cdns,macb.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/net/cdns,macb.yaml b/Documentation/devicetree/bindings/net/cdns,macb.yaml index 3c30dd23cd4e..25ca7f5a7357 100644 --- a/Documentation/devicetree/bindings/net/cdns,macb.yaml +++ b/Documentation/devicetree/bindings/net/cdns,macb.yaml @@ -38,7 +38,10 @@ properties: - cdns,sam9x60-macb # Microchip sam9x60 SoC - microchip,mpfs-macb # Microchip PolarFire SoC - const: cdns,macb # Generic - + - items: + - const: microchip,pic64gx-macb # Microchip PIC64GX SoC + - const: microchip,mpfs-macb # Microchip PolarFire SoC + - const: cdns,macb # Generic - items: - enum: - atmel,sama5d3-macb # 10/100Mbit IP on Atmel sama5d3 SoCs From patchwork Mon Sep 30 09:54:42 2024 Content-Type: text/plain; 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30 Sep 2024 02:55:57 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 30 Sep 2024 02:55:35 -0700 Received: from ph-emdalo.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Mon, 30 Sep 2024 02:55:33 -0700 From: To: , Alexandre Belloni , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley , "Daire McNamara" , Lewis Hanly CC: Pierre-Henry Moussay , , , Subject: [linux][PATCH v2 13/20] dt-bindings: rtc: mfps-rtc: Add PIC64GX compatibility Date: Mon, 30 Sep 2024 10:54:42 +0100 Message-ID: <20240930095449.1813195-14-pierre-henry.moussay@microchip.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> References: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Pierre-Henry Moussay PIC64GX is compatible with mfps-rtc without any additional feature Signed-off-by: Pierre-Henry Moussay Acked-by: Conor Dooley --- .../devicetree/bindings/rtc/microchip,mfps-rtc.yaml | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/rtc/microchip,mfps-rtc.yaml b/Documentation/devicetree/bindings/rtc/microchip,mfps-rtc.yaml index 7742465b9383..ba602b1c8799 100644 --- a/Documentation/devicetree/bindings/rtc/microchip,mfps-rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/microchip,mfps-rtc.yaml @@ -16,8 +16,11 @@ maintainers: properties: compatible: - enum: - - microchip,mpfs-rtc + oneOf: + - items: + - const: microchip,pic64gx-rtc + - const: microchip,mpfs-rtc + - const: microchip,mpfs-rtc reg: maxItems: 1 From patchwork Mon Sep 30 09:54:43 2024 Content-Type: text/plain; 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30 Sep 2024 02:55:57 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 30 Sep 2024 02:55:38 -0700 Received: from ph-emdalo.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Mon, 30 Sep 2024 02:55:36 -0700 From: To: , Conor Dooley , Daire McNamara , Rob Herring , Krzysztof Kozlowski CC: Pierre-Henry Moussay , , , Subject: [linux][PATCH v2 14/20] dt-bindings: soc: microchip: mpfs-sys-controller: Add PIC64GX compatibility Date: Mon, 30 Sep 2024 10:54:43 +0100 Message-ID: <20240930095449.1813195-15-pierre-henry.moussay@microchip.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> References: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Pierre-Henry Moussay PIC64GX is compatible with mpfs-sys-controller, without additional feature Signed-off-by: Pierre-Henry Moussay --- .../soc/microchip/microchip,mpfs-sys-controller.yaml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml b/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml index a3fa04f3a1bd..af89d5959747 100644 --- a/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml +++ b/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml @@ -24,7 +24,11 @@ properties: maxItems: 1 compatible: - const: microchip,mpfs-sys-controller + oneOf: + - items: + - const: microchip,pic64gx-sys-controller + - const: microchip,mpfs-sys-controller + - const: microchip,mpfs-sys-controller microchip,bitstream-flash: $ref: /schemas/types.yaml#/definitions/phandle From patchwork Mon Sep 30 09:54:44 2024 Content-Type: text/plain; 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30 Sep 2024 02:55:58 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 30 Sep 2024 02:55:41 -0700 Received: from ph-emdalo.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Mon, 30 Sep 2024 02:55:38 -0700 From: To: , Conor Dooley , Daire McNamara , Rob Herring , Krzysztof Kozlowski , "Paul Walmsley" , Palmer Dabbelt , Albert Ou CC: Pierre-Henry Moussay , , , Subject: [linux][PATCH v2 15/20] dt-bindings: riscv: microchip: document the PIC64GX curiosity kit Date: Mon, 30 Sep 2024 10:54:44 +0100 Message-ID: <20240930095449.1813195-16-pierre-henry.moussay@microchip.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> References: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Pierre-Henry Moussay Update devicetree bindings document with PIC64GX Curiosity Kit, known by its "Curiosity-GX1000" product code. Signed-off-by: Pierre-Henry Moussay Reviewed-by: Conor Dooley --- Documentation/devicetree/bindings/riscv/microchip.yaml | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/riscv/microchip.yaml b/Documentation/devicetree/bindings/riscv/microchip.yaml index 78ce76ae1b6d..8fe9a2c7c949 100644 --- a/Documentation/devicetree/bindings/riscv/microchip.yaml +++ b/Documentation/devicetree/bindings/riscv/microchip.yaml @@ -4,14 +4,14 @@ $id: http://devicetree.org/schemas/riscv/microchip.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Microchip PolarFire SoC-based boards +title: Microchip SoC-based boards maintainers: - Conor Dooley - Daire McNamara description: - Microchip PolarFire SoC-based boards + Microchip SoC-based boards properties: $nodename: @@ -33,6 +33,9 @@ properties: - microchip,mpfs-sev-kit - sundance,polarberry - const: microchip,mpfs + - items: + - const: microchip,pic64gx-curiosity-kit + - const: microchip,pic64gx additionalProperties: true From patchwork Mon Sep 30 09:54:45 2024 Content-Type: text/plain; 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30 Sep 2024 02:55:58 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 30 Sep 2024 02:55:44 -0700 Received: from ph-emdalo.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Mon, 30 Sep 2024 02:55:42 -0700 From: To: , Ulf Hansson , "Rob Herring" , Krzysztof Kozlowski , "Conor Dooley" , Masahiro Yamada CC: Pierre-Henry Moussay , , , Subject: [linux][PATCH v2 16/20] dt-bindings: mmc: cdns,sdhci: ref sdhci-common.yaml Date: Mon, 30 Sep 2024 10:54:45 +0100 Message-ID: <20240930095449.1813195-17-pierre-henry.moussay@microchip.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> References: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Pierre-Henry Moussay Since the Cadence sdhci controller is sdhci compatible, the cdns,sdhci.yaml should ref sdhci-common.yaml to use 'sdhci-caps-mask' property. Signed-off-by: Pierre-Henry Moussay --- Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml index ee3a838f7f06..0432cc96f7ca 100644 --- a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml @@ -121,7 +121,7 @@ required: - clocks allOf: - - $ref: mmc-controller.yaml + - $ref: sdhci-common.yaml - if: properties: compatible: From patchwork Mon Sep 30 09:54:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: pierre-henry.moussay@microchip.com X-Patchwork-Id: 1990890 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=microchip.com header.i=@microchip.com header.a=rsa-sha256 header.s=mchp header.b=tQikSCfQ; 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Mon, 30 Sep 2024 02:55:45 -0700 From: To: , Daniel Lezcano , Thomas Gleixner , "Rob Herring" , Krzysztof Kozlowski , "Conor Dooley" , Paul Walmsley , Samuel Holland , Palmer Dabbelt , Anup Patel CC: Pierre-Henry Moussay , , , Subject: [linux][PATCH v2 17/20] dt-bindings: timer: sifive,clint: add PIC64GX compatibility Date: Mon, 30 Sep 2024 10:54:46 +0100 Message-ID: <20240930095449.1813195-18-pierre-henry.moussay@microchip.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> References: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Pierre-Henry Moussay As mention in sifive,clint.yaml, a specific compatible should be used for PIC64GX, so here it is. Signed-off-by: Pierre-Henry Moussay Acked-by: Conor Dooley --- Documentation/devicetree/bindings/timer/sifive,clint.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/timer/sifive,clint.yaml b/Documentation/devicetree/bindings/timer/sifive,clint.yaml index b42d43d2de48..60f03c5ed073 100644 --- a/Documentation/devicetree/bindings/timer/sifive,clint.yaml +++ b/Documentation/devicetree/bindings/timer/sifive,clint.yaml @@ -30,6 +30,7 @@ properties: - items: - enum: - canaan,k210-clint # Canaan Kendryte K210 + - microchip,pic64gx-clint # Microchip PIC64GX - sifive,fu540-c000-clint # SiFive FU540 - starfive,jh7100-clint # StarFive JH7100 - starfive,jh7110-clint # StarFive JH7110 From patchwork Mon Sep 30 09:54:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: pierre-henry.moussay@microchip.com X-Patchwork-Id: 1990891 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Mon, 30 Sep 2024 02:55:51 -0700 Received: from ph-emdalo.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Mon, 30 Sep 2024 02:55:48 -0700 From: To: , Thomas Gleixner , "Rob Herring" , Krzysztof Kozlowski , "Conor Dooley" , Paul Walmsley , Samuel Holland , Palmer Dabbelt CC: Pierre-Henry Moussay , , , Subject: [linux][PATCH v2 18/20] dt-bindings: interrupt-controller: sifive,plic: Add PIC64GX compatibility Date: Mon, 30 Sep 2024 10:54:47 +0100 Message-ID: <20240930095449.1813195-19-pierre-henry.moussay@microchip.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> References: <20240930095449.1813195-1-pierre-henry.moussay@microchip.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Pierre-Henry Moussay As mention in sifive,plic-1.0.0.yaml, a specific compatible should be used for PIC64GX, so here it is. Signed-off-by: Pierre-Henry Moussay Acked-by: Conor Dooley --- .../bindings/interrupt-controller/sifive,plic-1.0.0.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml index 709b2211276b..44668318a8e6 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml @@ -58,6 +58,7 @@ properties: - items: - enum: - canaan,k210-plic + - microchip,pic64gx-plic - sifive,fu540-c000-plic - starfive,jh7100-plic - starfive,jh7110-plic