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The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: From: Quan Zhou Sync Linux-6.11 headers to get the latest RISC-V KVM caps. Signed-off-by: Quan Zhou --- include/linux/kvm.h | 27 ++++++++++++++++++++- powerpc/include/asm/kvm.h | 3 +++ riscv/include/asm/kvm.h | 7 ++++++ x86/include/asm/kvm.h | 49 +++++ [...] Content analysis details: (-1.9 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 RCVD_IN_VALIDITY_RPBL_BLOCKED RBL: ADMINISTRATOR NOTICE: The query to Validity was blocked. See https://knowledge.validity.com/hc/en-us/articles/20961730681243 for more information. [159.226.251.81 listed in bl.score.senderscore.com] 0.0 RCVD_IN_VALIDITY_CERTIFIED_BLOCKED RBL: ADMINISTRATOR NOTICE: The query to Validity was blocked. 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[159.226.251.81 listed in sa-accredit.habeas.com] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] X-BeenThere: kvm-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "kvm-riscv" Errors-To: kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org From: Quan Zhou Sync Linux-6.11 headers to get the latest RISC-V KVM caps. Signed-off-by: Quan Zhou --- include/linux/kvm.h | 27 ++++++++++++++++++++- powerpc/include/asm/kvm.h | 3 +++ riscv/include/asm/kvm.h | 7 ++++++ x86/include/asm/kvm.h | 49 +++++++++++++++++++++++++++++++++++++++ 4 files changed, 85 insertions(+), 1 deletion(-) diff --git a/include/linux/kvm.h b/include/linux/kvm.h index d03842a..637efc0 100644 --- a/include/linux/kvm.h +++ b/include/linux/kvm.h @@ -192,11 +192,24 @@ struct kvm_xen_exit { /* Flags that describe what fields in emulation_failure hold valid data. */ #define KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES (1ULL << 0) +/* + * struct kvm_run can be modified by userspace at any time, so KVM must be + * careful to avoid TOCTOU bugs. In order to protect KVM, HINT_UNSAFE_IN_KVM() + * renames fields in struct kvm_run from to __unsafe when + * compiled into the kernel, ensuring that any use within KVM is obvious and + * gets extra scrutiny. + */ +#ifdef __KERNEL__ +#define HINT_UNSAFE_IN_KVM(_symbol) _symbol##__unsafe +#else +#define HINT_UNSAFE_IN_KVM(_symbol) _symbol +#endif + /* for KVM_RUN, returned by mmap(vcpu_fd, offset=0) */ struct kvm_run { /* in */ __u8 request_interrupt_window; - __u8 immediate_exit; + __u8 HINT_UNSAFE_IN_KVM(immediate_exit); __u8 padding1[6]; /* out */ @@ -917,6 +930,9 @@ struct kvm_enable_cap { #define KVM_CAP_MEMORY_ATTRIBUTES 233 #define KVM_CAP_GUEST_MEMFD 234 #define KVM_CAP_VM_TYPES 235 +#define KVM_CAP_PRE_FAULT_MEMORY 236 +#define KVM_CAP_X86_APIC_BUS_CYCLES_NS 237 +#define KVM_CAP_X86_GUEST_MODE 238 struct kvm_irq_routing_irqchip { __u32 irqchip; @@ -1548,4 +1564,13 @@ struct kvm_create_guest_memfd { __u64 reserved[6]; }; +#define KVM_PRE_FAULT_MEMORY _IOWR(KVMIO, 0xd5, struct kvm_pre_fault_memory) + +struct kvm_pre_fault_memory { + __u64 gpa; + __u64 size; + __u64 flags; + __u64 padding[5]; +}; + #endif /* __LINUX_KVM_H */ diff --git a/powerpc/include/asm/kvm.h b/powerpc/include/asm/kvm.h index 1691297..eaeda00 100644 --- a/powerpc/include/asm/kvm.h +++ b/powerpc/include/asm/kvm.h @@ -645,6 +645,9 @@ struct kvm_ppc_cpu_char { #define KVM_REG_PPC_SIER3 (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc3) #define KVM_REG_PPC_DAWR1 (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc4) #define KVM_REG_PPC_DAWRX1 (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc5) +#define KVM_REG_PPC_DEXCR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc6) +#define KVM_REG_PPC_HASHKEYR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc7) +#define KVM_REG_PPC_HASHPKEYR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc8) /* Transactional Memory checkpointed state: * This is all GPRs, all VSX regs and a subset of SPRs diff --git a/riscv/include/asm/kvm.h b/riscv/include/asm/kvm.h index e878e7c..e97db32 100644 --- a/riscv/include/asm/kvm.h +++ b/riscv/include/asm/kvm.h @@ -168,6 +168,13 @@ enum KVM_RISCV_ISA_EXT_ID { KVM_RISCV_ISA_EXT_ZTSO, KVM_RISCV_ISA_EXT_ZACAS, KVM_RISCV_ISA_EXT_SSCOFPMF, + KVM_RISCV_ISA_EXT_ZIMOP, + KVM_RISCV_ISA_EXT_ZCA, + KVM_RISCV_ISA_EXT_ZCB, + KVM_RISCV_ISA_EXT_ZCD, + KVM_RISCV_ISA_EXT_ZCF, + KVM_RISCV_ISA_EXT_ZCMOP, + KVM_RISCV_ISA_EXT_ZAWRS, KVM_RISCV_ISA_EXT_MAX, }; diff --git a/x86/include/asm/kvm.h b/x86/include/asm/kvm.h index 9fae1b7..bf57a82 100644 --- a/x86/include/asm/kvm.h +++ b/x86/include/asm/kvm.h @@ -106,6 +106,7 @@ struct kvm_ioapic_state { #define KVM_RUN_X86_SMM (1 << 0) #define KVM_RUN_X86_BUS_LOCK (1 << 1) +#define KVM_RUN_X86_GUEST_MODE (1 << 2) /* for KVM_GET_REGS and KVM_SET_REGS */ struct kvm_regs { @@ -697,6 +698,11 @@ enum sev_cmd_id { /* Second time is the charm; improved versions of the above ioctls. */ KVM_SEV_INIT2, + /* SNP-specific commands */ + KVM_SEV_SNP_LAUNCH_START = 100, + KVM_SEV_SNP_LAUNCH_UPDATE, + KVM_SEV_SNP_LAUNCH_FINISH, + KVM_SEV_NR_MAX, }; @@ -824,6 +830,48 @@ struct kvm_sev_receive_update_data { __u32 pad2; }; +struct kvm_sev_snp_launch_start { + __u64 policy; + __u8 gosvw[16]; + __u16 flags; + __u8 pad0[6]; + __u64 pad1[4]; +}; + +/* Kept in sync with firmware values for simplicity. */ +#define KVM_SEV_SNP_PAGE_TYPE_NORMAL 0x1 +#define KVM_SEV_SNP_PAGE_TYPE_ZERO 0x3 +#define KVM_SEV_SNP_PAGE_TYPE_UNMEASURED 0x4 +#define KVM_SEV_SNP_PAGE_TYPE_SECRETS 0x5 +#define KVM_SEV_SNP_PAGE_TYPE_CPUID 0x6 + +struct kvm_sev_snp_launch_update { + __u64 gfn_start; + __u64 uaddr; + __u64 len; + __u8 type; + __u8 pad0; + __u16 flags; + __u32 pad1; + __u64 pad2[4]; +}; + +#define KVM_SEV_SNP_ID_BLOCK_SIZE 96 +#define KVM_SEV_SNP_ID_AUTH_SIZE 4096 +#define KVM_SEV_SNP_FINISH_DATA_SIZE 32 + +struct kvm_sev_snp_launch_finish { + __u64 id_block_uaddr; + __u64 id_auth_uaddr; + __u8 id_block_en; + __u8 auth_key_en; + __u8 vcek_disabled; + __u8 host_data[KVM_SEV_SNP_FINISH_DATA_SIZE]; + __u8 pad0[3]; + __u16 flags; + __u64 pad1[4]; +}; + #define KVM_X2APIC_API_USE_32BIT_IDS (1ULL << 0) #define KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK (1ULL << 1) @@ -874,5 +922,6 @@ struct kvm_hyperv_eventfd { #define KVM_X86_SW_PROTECTED_VM 1 #define KVM_X86_SEV_VM 2 #define KVM_X86_SEV_ES_VM 3 +#define KVM_X86_SNP_VM 4 #endif /* _ASM_X86_KVM_H */ From patchwork Tue Sep 24 11:03:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quan Zhou X-Patchwork-Id: 1988887 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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(unknown [180.111.100.113]) by APP-03 (Coremail) with SMTP id rQCowACnrKyZnPJmGWmlAA--.936S2; Tue, 24 Sep 2024 19:03:54 +0800 (CST) From: zhouquan@iscas.ac.cn To: kvm@vger.kernel.org, kvm-riscv@lists.infradead.org Cc: will@kernel.org, julien.thierry.kdev@gmail.com, pbonzini@redhat.com, anup@brainfault.org, ajones@ventanamicro.com, zhouquan@iscas.ac.cn Subject: [kvmtool PATCH 2/2] riscv: Add Zc*/Zimop/Zcmop/Zawrs exts support Date: Tue, 24 Sep 2024 19:03:53 +0800 Message-Id: <2b02ee03d0a952ff876d8423cf66031436dfaadf.1727174321.git.zhouquan@iscas.ac.cn> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 X-CM-TRANSID: rQCowACnrKyZnPJmGWmlAA--.936S2 X-Coremail-Antispam: 1UD129KBjvJXoWxAFy3uFykuF15tF43tF1fWFg_yoW5CryDpr n2y343KrZ8XasI9ayxtr98Cw15XrW5Z393Gw429rs3try3AryfJF95G3ZxW3WDJa4F9F9I vF4kXr1Ivr4Fyr7anT9S1TB71UUUUUDqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUvm14x267AKxVW8JVW5JwAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK02 1l84ACjcxK6xIIjxv20xvE14v26r1I6r4UM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26r4j 6F4UM28EF7xvwVC2z280aVAFwI0_Cr1j6rxdM28EF7xvwVC2z280aVCY1x0267AKxVW0oV Cq3wAS0I0E0xvYzxvE52x082IY62kv0487Mc02F40EFcxC0VAKzVAqx4xG6I80ewAv7VC0 I7IYx2IY67AKxVWUAVWUtwAv7VC2z280aVAFwI0_Cr0_Gr1UMcvjeVCFs4IE7xkEbVWUJV W8JwACjcxG0xvY0x0EwIxGrwACjI8F5VA0II8E6IAqYI8I648v4I1lw4CEc2x0rVAKj4xx MxkF7I0En4kS14v26r1q6r43MxAIw28IcxkI7VAKI48JMxC20s026xCaFVCjc4AY6r1j6r 4UMI8I3I0E5I8CrVAFwI0_Jr0_Jr4lx2IqxVCjr7xvwVAFwI0_JrI_JrWlx4CE17CEb7AF 67AKxVWUtVW8ZwCIc40Y0x0EwIxGrwCI42IY6xIIjxv20xvE14v26r1I6r4UMIIF0xvE2I x0cI8IcVCY1x0267AKxVW8JVWxJwCI42IY6xAIw20EY4v20xvaj40_Jr0_JF4lIxAIcVC2 z280aVAFwI0_Gr0_Cr1lIxAIcVC2z280aVCY1x0267AKxVW8JVW8JrUvcSsGvfC2KfnxnU UI43ZEXa7VU1x9NDUUUUU== X-Originating-IP: [180.111.100.113] X-CM-SenderInfo: 52kr31xxdqqxpvfd2hldfou0/1tbiBwwKBmbyg6BWdwAAsR X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240924_120405_467508_C71FA5D0 X-CRM114-Status: UNSURE ( 7.29 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.0 (/) X-Spam-Report: Spam detection software, running on the system "desiato.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: From: Quan Zhou When the Zc*/Zimop/Zcmop/Zawrs extensions are available expose them to the guest via device tree so that guest can use it. Signed-off-by: Quan Zhou --- riscv/fdt.c | 7 +++++++ riscv/include/kvm/kvm-config-arch.h | 21 +++++++++++++++++++++ 2 files changed, 28 insertions(+) Content analysis details: (-0.0 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [159.226.251.81 listed in list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record X-BeenThere: kvm-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "kvm-riscv" Errors-To: kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org From: Quan Zhou When the Zc*/Zimop/Zcmop/Zawrs extensions are available expose them to the guest via device tree so that guest can use it. Signed-off-by: Quan Zhou --- riscv/fdt.c | 7 +++++++ riscv/include/kvm/kvm-config-arch.h | 21 +++++++++++++++++++++ 2 files changed, 28 insertions(+) diff --git a/riscv/fdt.c b/riscv/fdt.c index e331f80..6af639f 100644 --- a/riscv/fdt.c +++ b/riscv/fdt.c @@ -24,6 +24,7 @@ struct isa_ext_info isa_info_arr[] = { {"svnapot", KVM_RISCV_ISA_EXT_SVNAPOT}, {"svpbmt", KVM_RISCV_ISA_EXT_SVPBMT}, {"zacas", KVM_RISCV_ISA_EXT_ZACAS}, + {"zawrs", KVM_RISCV_ISA_EXT_ZAWRS}, {"zba", KVM_RISCV_ISA_EXT_ZBA}, {"zbb", KVM_RISCV_ISA_EXT_ZBB}, {"zbc", KVM_RISCV_ISA_EXT_ZBC}, @@ -31,6 +32,12 @@ struct isa_ext_info isa_info_arr[] = { {"zbkc", KVM_RISCV_ISA_EXT_ZBKC}, {"zbkx", KVM_RISCV_ISA_EXT_ZBKX}, {"zbs", KVM_RISCV_ISA_EXT_ZBS}, + {"zca", KVM_RISCV_ISA_EXT_ZCA}, + {"zcb", KVM_RISCV_ISA_EXT_ZCB}, + {"zcd", KVM_RISCV_ISA_EXT_ZCD}, + {"zcf", KVM_RISCV_ISA_EXT_ZCF}, + {"zcmop", KVM_RISCV_ISA_EXT_ZCMOP}, + {"zimop", KVM_RISCV_ISA_EXT_ZIMOP}, {"zfa", KVM_RISCV_ISA_EXT_ZFA}, {"zfh", KVM_RISCV_ISA_EXT_ZFH}, {"zfhmin", KVM_RISCV_ISA_EXT_ZFHMIN}, diff --git a/riscv/include/kvm/kvm-config-arch.h b/riscv/include/kvm/kvm-config-arch.h index 3fbc4f7..ed9b9e5 100644 --- a/riscv/include/kvm/kvm-config-arch.h +++ b/riscv/include/kvm/kvm-config-arch.h @@ -49,6 +49,9 @@ struct kvm_config_arch { OPT_BOOLEAN('\0', "disable-zacas", \ &(cfg)->ext_disabled[KVM_RISCV_ISA_EXT_ZACAS], \ "Disable Zacas Extension"), \ + OPT_BOOLEAN('\0', "disable-zawrs", \ + &(cfg)->ext_disabled[KVM_RISCV_ISA_EXT_ZAWRS], \ + "Disable Zawrs Extension"), \ OPT_BOOLEAN('\0', "disable-zba", \ &(cfg)->ext_disabled[KVM_RISCV_ISA_EXT_ZBA], \ "Disable Zba Extension"), \ @@ -70,6 +73,24 @@ struct kvm_config_arch { OPT_BOOLEAN('\0', "disable-zbs", \ &(cfg)->ext_disabled[KVM_RISCV_ISA_EXT_ZBS], \ "Disable Zbs Extension"), \ + OPT_BOOLEAN('\0', "disable-zca", \ + &(cfg)->ext_disabled[KVM_RISCV_ISA_EXT_ZCA], \ + "Disable Zca Extension"), \ + OPT_BOOLEAN('\0', "disable-zcb", \ + &(cfg)->ext_disabled[KVM_RISCV_ISA_EXT_ZCB], \ + "Disable Zcb Extension"), \ + OPT_BOOLEAN('\0', "disable-zcd", \ + &(cfg)->ext_disabled[KVM_RISCV_ISA_EXT_ZCD], \ + "Disable Zcd Extension"), \ + OPT_BOOLEAN('\0', "disable-zcf", \ + &(cfg)->ext_disabled[KVM_RISCV_ISA_EXT_ZCF], \ + "Disable Zcf Extension"), \ + OPT_BOOLEAN('\0', "disable-zcmop", \ + &(cfg)->ext_disabled[KVM_RISCV_ISA_EXT_ZCMOP], \ + "Disable Zcmop Extension"), \ + OPT_BOOLEAN('\0', "disable-zimop", \ + &(cfg)->ext_disabled[KVM_RISCV_ISA_EXT_ZIMOP], \ + "Disable Zimop Extension"), \ OPT_BOOLEAN('\0', "disable-zfa", \ &(cfg)->ext_disabled[KVM_RISCV_ISA_EXT_ZFA], \ "Disable Zfa Extension"), \