From patchwork Tue Sep 24 09:23:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: liuhongt X-Patchwork-Id: 1988824 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=jP+ZCuU9; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4XCZD80K0xz1xsN for ; Tue, 24 Sep 2024 19:23:34 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id EEF03385DDCE for ; Tue, 24 Sep 2024 09:23:31 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.9]) by sourceware.org (Postfix) with ESMTPS id 6E3F73858D26 for ; Tue, 24 Sep 2024 09:23:11 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 6E3F73858D26 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 6E3F73858D26 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=192.198.163.9 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1727169793; cv=none; b=Ug8ScvyQwcj4uuPm5/HqmGgwLNRqeK9FdSSyU0ralTt/fhc3Y5xxPN2J7RgnvaM3+8RiAF/O8SBaKAIyjKx/CouaAg9Tf7tARqUocIWwCLXUQ25vvT6LMVMsr8JsdBiexerBeDuZ4XoFZ2OTFsxwh/knzShwFUgz9g/lV5BOxQM= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1727169793; c=relaxed/simple; bh=fUohwk3hBn6QzmZYwB5zEdknoBD3KylrxddUNloQ43I=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=GBCVPdwuKYVx4Lti184AXJiXD3UkmlMnIYgIyS/1AkdA0r9fBx1XQ+Om4wVG20jHEQRfWGS37b2+qwtK4im4grKNbqVjoS+HHvGTDroITPts+gH6QpgksX9GJDRVoMlPVsQQFuJzPhKl8RImlIfDFY7Zb7snNf2pEq2alJf/jc8= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1727169792; x=1758705792; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=fUohwk3hBn6QzmZYwB5zEdknoBD3KylrxddUNloQ43I=; b=jP+ZCuU9i7QGlmlfwpn0h40WPEC7Gbp/putEvfSr0WidmrGz8/89epTo 6OC5yflVIjgvDNAzP4CT/vKLZOolIvuTdICN3zEB1r1B1gmf6R7qcnFvD 45ym4ksDrBFMnuavL95BS5xjoww0XL6QmQXLY5O5EEdL9rfVtlW82gMOp DTIwLNL46oLI49QpwVP2YP9AjUtqPcJ8TvbVdKgz69TUw+KJWTkHYrfT9 VHPgwwehI5Cx+tQqtWYKhye7YuH5ya7kZsdSelB/lZqtnq7sbfkZbPbXz GhvKo7vwkiL5W4aU1fWENrZ3hynrvdCcOy8QG/saSayYDtTzyLZ4sEETZ g==; X-CSE-ConnectionGUID: NO0+5eW7Ru+fqycyoQmL8w== X-CSE-MsgGUID: i45hEyn8SgSgdCV/PnIWuw== X-IronPort-AV: E=McAfee;i="6700,10204,11204"; a="36819315" X-IronPort-AV: E=Sophos;i="6.10,254,1719903600"; d="scan'208";a="36819315" Received: from fmviesa006.fm.intel.com ([10.60.135.146]) by fmvoesa103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Sep 2024 02:23:10 -0700 X-CSE-ConnectionGUID: EN5zRf+rQ6y7InaqkkxX7Q== X-CSE-MsgGUID: /uUua1bySLmPTbedfMdYQg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,254,1719903600"; d="scan'208";a="70962305" Received: from shliclel4217.sh.intel.com ([10.239.240.127]) by fmviesa006.fm.intel.com with ESMTP; 24 Sep 2024 02:23:08 -0700 From: liuhongt To: gcc-patches@gcc.gnu.org Cc: crazylht@gmail.com, hjl.tools@gmail.com Subject: [PATCH] [x86] Define VECTOR_STORE_FLAG_VALUE Date: Tue, 24 Sep 2024 17:23:07 +0800 Message-Id: <20240924092307.173849-1-hongtao.liu@intel.com> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org Return constm1_rtx when GET_MODE_CLASS (MODE) == MODE_VECTOR_INT. Otherwise NULL_RTX. Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}. Ready push to trunk. gcc/ChangeLog: * config/i386/i386.h (VECTOR_STORE_FLAG_VALUE): New macro. gcc/testsuite/ChangeLog: * gcc.dg/rtl/x86_64/vector_eq.c: New test. --- gcc/config/i386/i386.h | 5 +++- gcc/testsuite/gcc.dg/rtl/x86_64/vector_eq.c | 26 +++++++++++++++++++++ 2 files changed, 30 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.dg/rtl/x86_64/vector_eq.c diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index c1ec92ffb15..b12be41424f 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -899,7 +899,10 @@ extern const char *host_detect_local_cpu (int argc, const char **argv); and give entire struct the alignment of an int. */ /* Required on the 386 since it doesn't have bit-field insns. */ #define PCC_BITFIELD_TYPE_MATTERS 1 - + +#define VECTOR_STORE_FLAG_VALUE(MODE) \ + (GET_MODE_CLASS (MODE) == MODE_VECTOR_INT ? constm1_rtx : NULL_RTX) + /* Standard register usage. */ /* This processor has special stack-like registers. See reg-stack.cc diff --git a/gcc/testsuite/gcc.dg/rtl/x86_64/vector_eq.c b/gcc/testsuite/gcc.dg/rtl/x86_64/vector_eq.c new file mode 100644 index 00000000000..b82603d0b64 --- /dev/null +++ b/gcc/testsuite/gcc.dg/rtl/x86_64/vector_eq.c @@ -0,0 +1,26 @@ +/* { dg-do compile { target x86_64-*-* } } */ +/* { dg-additional-options "-O2 -march=x86-64-v3" } */ + +typedef int v4si __attribute__((vector_size(16))); + +v4si __RTL (startwith ("vregs")) foo (void) +{ +(function "foo" + (insn-chain + (block 2 + (edge-from entry (flags "FALLTHRU")) + (cnote 1 [bb 2] NOTE_INSN_BASIC_BLOCK) + (cnote 2 NOTE_INSN_FUNCTION_BEG) + (cinsn 3 (set (reg:V4SI <0>) (const_vector:V4SI [(const_int 0) (const_int 0) (const_int 0) (const_int 0)]))) + (cinsn 5 (set (reg:V4SI <2>) + (eq:V4SI (reg:V4SI <0>) (reg:V4SI <1>)))) + (cinsn 6 (set (reg:V4SI <3>) (reg:V4SI <2>))) + (cinsn 7 (set (reg:V4SI xmm0) (reg:V4SI <3>))) + (edge-to exit (flags "FALLTHRU")) + ) + ) + (crtl (return_rtx (reg/i:V4SI xmm0))) +) +} + +/* { dg-final { scan-assembler-not "vpxor" } } */