From patchwork Thu Sep 12 22:41:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Li, Pan2" X-Patchwork-Id: 1984900 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=iff8wNiO; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4X4XX437LFz1y2H for ; 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X-CSE-ConnectionGUID: NDDwoZ16SjiPhCiR0qdXcQ== X-CSE-MsgGUID: lj7Q9bUUThOq24Zf3k6elw== X-IronPort-AV: E=McAfee;i="6700,10204,11193"; a="50482935" X-IronPort-AV: E=Sophos;i="6.10,224,1719903600"; d="scan'208";a="50482935" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Sep 2024 15:42:37 -0700 X-CSE-ConnectionGUID: k8alf+lvSBy4vBJYlJjI6g== X-CSE-MsgGUID: HB/uT6MHSdusiGgfFURuLA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,224,1719903600"; d="scan'208";a="72853755" Received: from panli.sh.intel.com ([10.239.154.73]) by orviesa004.jf.intel.com with ESMTP; 12 Sep 2024 15:42:34 -0700 From: pan2.li@intel.com To: gcc-patches@gcc.gnu.org Cc: richard.guenther@gmail.com, Tamar.Christina@arm.com, juzhe.zhong@rivai.ai, kito.cheng@gmail.com, jeffreyalaw@gmail.com, rdapp.gcc@gmail.com, Pan Li Subject: [PATCH v4 1/4] Match: Add interface match_cond_with_binary_phi for true/false arg Date: Fri, 13 Sep 2024 06:41:39 +0800 Message-ID: <20240912224139.801903-1-pan2.li@intel.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 X-Spam-Status: No, score=-11.5 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org From: Pan Li When matching the cond with 2 args phi node, we need to figure out which arg of phi node comes from the true edge of cond block, as well as the false edge. This patch would like to add interface to perform the action and return the true and false arg in TREE type. There will be some additional handling if one of the arg is INTEGER_CST. Because the INTEGER_CST args may have no source block, thus its' edge source points to the condition block. See below example in line 31, the 255 INTEGER_CST has block 2 as source. Thus, we need to find the non-INTEGER_CST (aka _1) to tell which one is the true/false edge. For example, the _1(3) takes block 3 as source, which is the dest of false edge of the condition block. 4 │ __attribute__((noinline)) 5 │ uint8_t sat_u_add_imm_type_check_uint8_t_fmt_2 (uint8_t x) 6 │ { 7 │ unsigned char _1; 8 │ unsigned char _2; 9 │ uint8_t _3; 10 │ __complex__ unsigned char _5; 11 │ 12 │ ;; basic block 2, loop depth 0 13 │ ;; pred: ENTRY 14 │ _5 = .ADD_OVERFLOW (x_4(D), 9); 15 │ _2 = IMAGPART_EXPR <_5>; 16 │ if (_2 != 0) 17 │ goto ; [35.00%] 18 │ else 19 │ goto ; [65.00%] 20 │ ;; succ: 3 21 │ ;; 4 22 │ 23 │ ;; basic block 3, loop depth 0 24 │ ;; pred: 2 25 │ _1 = REALPART_EXPR <_5>; 26 │ ;; succ: 4 27 │ 28 │ ;; basic block 4, loop depth 0 29 │ ;; pred: 2 30 │ ;; 3 31 │ # _3 = PHI <255(2), _1(3)> 32 │ return _3; 33 │ ;; succ: EXIT 34 │ 35 │ } The below test suites are passed for this patch. * The rv64gcv fully regression test. * The x86 bootstrap test. * The x86 fully regression test. gcc/ChangeLog: * gimple-match-head.cc (match_cond_with_binary_phi): Add new func impl to match binary phi for true and false arg. Signed-off-by: Pan Li --- gcc/gimple-match-head.cc | 118 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 118 insertions(+) diff --git a/gcc/gimple-match-head.cc b/gcc/gimple-match-head.cc index 924d3f1e710..6e7a3a0d62e 100644 --- a/gcc/gimple-match-head.cc +++ b/gcc/gimple-match-head.cc @@ -375,3 +375,121 @@ gimple_bitwise_inverted_equal_p (tree expr1, tree expr2, bool &wascmp, tree (*va return true; return false; } + +/* + * Return the relevant gcond * of the given phi, as well as the true + * and false TREE args of the phi. Or return NULL. + * + * If matched the gcond *, the output argument TREE true_arg and false_arg + * will be updated to the relevant args of phi. + * + * If failed to match, NULL gcond * will be returned, as well as the output + * arguments will be set to NULL_TREE. + */ + +static inline gcond * +match_cond_with_binary_phi (gphi *phi, tree *true_arg, tree *false_arg) +{ + *true_arg = *false_arg = NULL_TREE; + + if (gimple_phi_num_args (phi) != 2 + || EDGE_COUNT (gimple_bb (phi)->preds) != 2) + return NULL; + + basic_block pred_0 = EDGE_PRED (gimple_bb (phi), 0)->src; + basic_block pred_1 = EDGE_PRED (gimple_bb (phi), 1)->src; + basic_block cond_block = NULL; + + if ((EDGE_COUNT (pred_0->succs) == 2 && EDGE_COUNT (pred_1->succs) == 1) + || (EDGE_COUNT (pred_0->succs) == 1 && EDGE_COUNT (pred_1->succs) == 2)) + { + /* For below control flow graph: + * | + * v + * +------+ + * | b0: | + * | def | +-----+ + * | ... | | b1: | + * | cond |------>| def | + * +------+ | ... | + * | +-----+ + * | | + * v | + * +-----+ | + * | b2: | | + * | def |<----------+ + * +-----+ + */ + basic_block b0 = EDGE_COUNT (pred_0->succs) == 2 ? pred_0 : pred_1; + basic_block b1 = EDGE_COUNT (pred_0->succs) == 1 ? pred_0 : pred_1; + + if (EDGE_COUNT (b1->preds) == 1 && EDGE_PRED (b1, 0)->src == b0) + cond_block = b0; + } + + if (EDGE_COUNT (pred_0->succs) == 1 && EDGE_COUNT (pred_0->preds) == 1 + && EDGE_COUNT (pred_1->succs) == 1 && EDGE_COUNT (pred_1->preds) == 1) + { + /* For below control flow graph: + * | + * v + * +------+ + * | b0: | + * | ... | +-----+ + * | cond |------>| b2: | + * +------+ | ... | + * | +-----+ + * | | + * v | + * +-----+ | + * | b1: | | + * | ... | | + * +-----+ | + * | | + * | | + * v | + * +-----+ | + * | b3: |<----------+ + * | ... | + * +-----+ + */ + basic_block b0 = EDGE_PRED (pred_0, 0)->src; + + if (EDGE_COUNT (b0->succs) == 2 && EDGE_PRED (pred_1, 0)->src == b0) + cond_block = b0; + } + + if (cond_block == NULL) + return NULL; + + /* Now we locate the cond_block for phi node. */ + tree t0 = gimple_phi_arg_def (phi, 0); + tree t1 = gimple_phi_arg_def (phi, 1); + edge e0 = gimple_phi_arg_edge (phi, 0); + edge e1 = gimple_phi_arg_edge (phi, 1); + + if (TREE_CODE (t0) == INTEGER_CST && TREE_CODE (t1) == INTEGER_CST) + return NULL; + + bool arg_0_cst_p = TREE_CODE (t0) == INTEGER_CST; + edge arg_edge = arg_0_cst_p ? e1 : e0; + tree arg = arg_0_cst_p ? t1 : t0; + tree other_arg = arg_0_cst_p ? t0 : t1; + + edge cond_e0 = EDGE_SUCC (cond_block, 0); + edge cond_e1 = EDGE_SUCC (cond_block, 1); + edge matched_edge = arg_edge->src == cond_e0->dest ? cond_e0 : cond_e1; + + if (matched_edge->flags & EDGE_TRUE_VALUE) + { + *true_arg = arg; + *false_arg = other_arg; + } + else + { + *false_arg = arg; + *true_arg = other_arg; + } + + return safe_dyn_cast (*gsi_last_bb (cond_block)); +} From patchwork Thu Sep 12 22:41:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Li, Pan2" X-Patchwork-Id: 1984901 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; 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d="scan'208";a="72853857" Received: from panli.sh.intel.com ([10.239.154.73]) by orviesa004.jf.intel.com with ESMTP; 12 Sep 2024 15:42:47 -0700 From: pan2.li@intel.com To: gcc-patches@gcc.gnu.org Cc: richard.guenther@gmail.com, Tamar.Christina@arm.com, juzhe.zhong@rivai.ai, kito.cheng@gmail.com, jeffreyalaw@gmail.com, rdapp.gcc@gmail.com, Pan Li Subject: [PATCH v4 2/4] Genmatch: Refine the gen_phi_on_cond by match_cond_with_binary_phi Date: Fri, 13 Sep 2024 06:41:52 +0800 Message-ID: <20240912224152.802287-1-pan2.li@intel.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 X-Spam-Status: No, score=-11.5 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org From: Pan Li This patch would like to leverage the match_cond_with_binary_phi to match the phi on cond, and get the true/false arg if matched. This helps a lot to simplify the implementation of gen_phi_on_cond. Before this patch: basic_block _b1 = gimple_bb (_a1); if (gimple_phi_num_args (_a1) == 2) { basic_block _pb_0_1 = EDGE_PRED (_b1, 0)->src; basic_block _pb_1_1 = EDGE_PRED (_b1, 1)->src; basic_block _db_1 = safe_dyn_cast (*gsi_last_bb (_pb_0_1)) ? _pb_0_1 : _pb_1_1; basic_block _other_db_1 = safe_dyn_cast (*gsi_last_bb (_pb_0_1)) ? _pb_1_1 : _pb_0_1; gcond *_ct_1 = safe_dyn_cast (*gsi_last_bb (_db_1)); if (_ct_1 && EDGE_COUNT (_other_db_1->preds) == 1 && EDGE_COUNT (_other_db_1->succs) == 1 && EDGE_PRED (_other_db_1, 0)->src == _db_1) { tree _cond_lhs_1 = gimple_cond_lhs (_ct_1); tree _cond_rhs_1 = gimple_cond_rhs (_ct_1); tree _p0 = build2 (gimple_cond_code (_ct_1), boolean_type_node, _cond_lhs_1, _cond_rhs_1); bool _arg_0_is_true_1 = gimple_phi_arg_edge (_a1, 0)->flags & EDGE_TRUE_VALUE; tree _p1 = gimple_phi_arg_def (_a1, _arg_0_is_true_1 ? 0 : 1); tree _p2 = gimple_phi_arg_def (_a1, _arg_0_is_true_1 ? 1 : 0); ... After this patch: basic_block _b1 = gimple_bb (_a1); tree _p1, _p2; gcond *_cond_1 = match_cond_with_binary_phi (_a1, &_p1, &_p2); if (_cond_1 && _p1 && _p2) { tree _cond_lhs_1 = gimple_cond_lhs (_cond_1); tree _cond_rhs_1 = gimple_cond_rhs (_cond_1); tree _p0 = build2 (gimple_cond_code (_cond_1), boolean_type_node, _cond_lhs_1, _cond_rhs_1); ... The below test suites are passed for this patch. * The rv64gcv fully regression test. * The x86 bootstrap test. * The x86 fully regression test. gcc/ChangeLog: * genmatch.cc (dt_operand::gen_phi_on_cond): Leverage the match_cond_with_binary_phi API to get cond gimple, true and false TREE arg. Signed-off-by: Pan Li --- gcc/genmatch.cc | 67 +++++++++++-------------------------------------- 1 file changed, 15 insertions(+), 52 deletions(-) diff --git a/gcc/genmatch.cc b/gcc/genmatch.cc index a56bd90cb2c..e3d2ecc6266 100644 --- a/gcc/genmatch.cc +++ b/gcc/genmatch.cc @@ -3516,79 +3516,42 @@ dt_operand::gen (FILE *f, int indent, bool gimple, int depth) void dt_operand::gen_phi_on_cond (FILE *f, int indent, int depth) { - fprintf_indent (f, indent, - "basic_block _b%d = gimple_bb (_a%d);\n", depth, depth); - - fprintf_indent (f, indent, "if (gimple_phi_num_args (_a%d) == 2)\n", depth); + char opname_0[20]; + char opname_1[20]; + char opname_2[20]; - indent += 2; - fprintf_indent (f, indent, "{\n"); - indent += 2; + gen_opname (opname_0, 0); + gen_opname (opname_1, 1); + gen_opname (opname_2, 2); fprintf_indent (f, indent, - "basic_block _pb_0_%d = EDGE_PRED (_b%d, 0)->src;\n", depth, depth); - fprintf_indent (f, indent, - "basic_block _pb_1_%d = EDGE_PRED (_b%d, 1)->src;\n", depth, depth); - fprintf_indent (f, indent, - "basic_block _db_%d = safe_dyn_cast (*gsi_last_bb (_pb_0_%d)) ? " - "_pb_0_%d : _pb_1_%d;\n", depth, depth, depth, depth); + "basic_block _b%d = gimple_bb (_a%d);\n", depth, depth); + fprintf_indent (f, indent, "tree %s, %s;\n", opname_1, opname_2); fprintf_indent (f, indent, - "basic_block _other_db_%d = safe_dyn_cast " - "(*gsi_last_bb (_pb_0_%d)) ? _pb_1_%d : _pb_0_%d;\n", - depth, depth, depth, depth); + "gcond *_cond_%d = match_cond_with_binary_phi (_a%d, &%s, &%s);\n", + depth, depth, opname_1, opname_2); - fprintf_indent (f, indent, - "gcond *_ct_%d = safe_dyn_cast (*gsi_last_bb (_db_%d));\n", - depth, depth); - fprintf_indent (f, indent, "if (_ct_%d" - " && EDGE_COUNT (_other_db_%d->preds) == 1\n", depth, depth); - fprintf_indent (f, indent, - " && EDGE_COUNT (_other_db_%d->succs) == 1\n", depth); - fprintf_indent (f, indent, - " && EDGE_PRED (_other_db_%d, 0)->src == _db_%d)\n", depth, depth); + fprintf_indent (f, indent, "if (_cond_%d && %s && %s)\n", + depth, opname_1, opname_2); indent += 2; fprintf_indent (f, indent, "{\n"); indent += 2; fprintf_indent (f, indent, - "tree _cond_lhs_%d = gimple_cond_lhs (_ct_%d);\n", depth, depth); + "tree _cond_lhs_%d = gimple_cond_lhs (_cond_%d);\n", depth, depth); fprintf_indent (f, indent, - "tree _cond_rhs_%d = gimple_cond_rhs (_ct_%d);\n", depth, depth); - - char opname_0[20]; - char opname_1[20]; - char opname_2[20]; - gen_opname (opname_0, 0); - + "tree _cond_rhs_%d = gimple_cond_rhs (_cond_%d);\n", depth, depth); fprintf_indent (f, indent, - "tree %s = build2 (gimple_cond_code (_ct_%d), " + "tree %s = build2 (gimple_cond_code (_cond_%d), " "boolean_type_node, _cond_lhs_%d, _cond_rhs_%d);\n", opname_0, depth, depth, depth); - fprintf_indent (f, indent, - "bool _arg_0_is_true_%d = gimple_phi_arg_edge (_a%d, 0)->flags" - " & EDGE_TRUE_VALUE;\n", depth, depth); - - gen_opname (opname_1, 1); - fprintf_indent (f, indent, - "tree %s = gimple_phi_arg_def (_a%d, _arg_0_is_true_%d ? 0 : 1);\n", - opname_1, depth, depth); - - gen_opname (opname_2, 2); - fprintf_indent (f, indent, - "tree %s = gimple_phi_arg_def (_a%d, _arg_0_is_true_%d ? 1 : 0);\n", - opname_2, depth, depth); - gen_kids (f, indent, true, depth); indent -= 2; fprintf_indent (f, indent, "}\n"); indent -= 2; - - indent -= 2; - fprintf_indent (f, indent, "}\n"); - indent -= 2; } /* Emit a logging call to the debug file to the file F, with the INDENT from From patchwork Thu Sep 12 22:42:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Li, Pan2" X-Patchwork-Id: 1984902 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=neMuME7p; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4X4XXm3w5Nz1y2H for ; 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X-CSE-ConnectionGUID: 9USCmXeTSXuayGuvt6HosQ== X-CSE-MsgGUID: 6T1lHr/QRDmZRqTfyE5X6Q== X-IronPort-AV: E=McAfee;i="6700,10204,11193"; a="42578781" X-IronPort-AV: E=Sophos;i="6.10,224,1719903600"; d="scan'208";a="42578781" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Sep 2024 15:43:00 -0700 X-CSE-ConnectionGUID: 4Q7TyapnQsyjrHB4oncO2A== X-CSE-MsgGUID: SDgD2IPMQ/qRojNQ2SBh4Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,224,1719903600"; d="scan'208";a="68636016" Received: from panli.sh.intel.com ([10.239.154.73]) by orviesa008.jf.intel.com with ESMTP; 12 Sep 2024 15:42:58 -0700 From: pan2.li@intel.com To: gcc-patches@gcc.gnu.org Cc: richard.guenther@gmail.com, Tamar.Christina@arm.com, juzhe.zhong@rivai.ai, kito.cheng@gmail.com, jeffreyalaw@gmail.com, rdapp.gcc@gmail.com, Pan Li Subject: [PATCH v4 3/4] Match: Support form 3 for scalar signed integer .SAT_ADD Date: Fri, 13 Sep 2024 06:42:03 +0800 Message-ID: <20240912224203.802664-1-pan2.li@intel.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 X-Spam-Status: No, score=-11.5 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org From: Pan Li This patch would like to support the form 3 of the scalar signed integer .SAT_ADD. Aka below example: Form 3: #define DEF_SAT_S_ADD_FMT_3(T, UT, MIN, MAX) \ T __attribute__((noinline)) \ sat_s_add_##T##_fmt_3 (T x, T y) \ { \ T sum; \ bool overflow = __builtin_add_overflow (x, y, &sum); \ return overflow ? x < 0 ? MIN : MAX : sum; \ } DEF_SAT_S_ADD_FMT_3(int8_t, uint8_t, INT8_MIN, INT8_MAX) We can tell the difference before and after this patch if backend implemented the ssadd3 pattern similar as below. Before this patch: 4 │ __attribute__((noinline)) 5 │ int8_t sat_s_add_int8_t_fmt_3 (int8_t x, int8_t y) 6 │ { 7 │ signed char _1; 8 │ signed char _2; 9 │ int8_t _3; 10 │ __complex__ signed char _6; 11 │ _Bool _8; 12 │ signed char _9; 13 │ signed char _10; 14 │ signed char _11; 15 │ 16 │ ;; basic block 2, loop depth 0 17 │ ;; pred: ENTRY 18 │ _6 = .ADD_OVERFLOW (x_4(D), y_5(D)); 19 │ _2 = IMAGPART_EXPR <_6>; 20 │ if (_2 != 0) 21 │ goto ; [50.00%] 22 │ else 23 │ goto ; [50.00%] 24 │ ;; succ: 4 25 │ ;; 3 26 │ 27 │ ;; basic block 3, loop depth 0 28 │ ;; pred: 2 29 │ _1 = REALPART_EXPR <_6>; 30 │ goto ; [100.00%] 31 │ ;; succ: 5 32 │ 33 │ ;; basic block 4, loop depth 0 34 │ ;; pred: 2 35 │ _8 = x_4(D) < 0; 36 │ _9 = (signed char) _8; 37 │ _10 = -_9; 38 │ _11 = _10 ^ 127; 39 │ ;; succ: 5 40 │ 41 │ ;; basic block 5, loop depth 0 42 │ ;; pred: 3 43 │ ;; 4 44 │ # _3 = PHI <_1(3), _11(4)> 45 │ return _3; 46 │ ;; succ: EXIT 47 │ 48 │ } After this patch: 4 │ __attribute__((noinline)) 5 │ int8_t sat_s_add_int8_t_fmt_3 (int8_t x, int8_t y) 6 │ { 7 │ int8_t _3; 8 │ 9 │ ;; basic block 2, loop depth 0 10 │ ;; pred: ENTRY 11 │ _3 = .SAT_ADD (x_4(D), y_5(D)); [tail call] 12 │ return _3; 13 │ ;; succ: EXIT 14 │ 15 │ } The below test suites are passed for this patch. * The rv64gcv fully regression test. * The x86 bootstrap test. * The x86 fully regression test. gcc/ChangeLog: * match.pd: Add the form 3 of signed .SAT_ADD matching. Signed-off-by: Pan Li --- gcc/match.pd | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/gcc/match.pd b/gcc/match.pd index 4cef965c9c7..167b1b106dd 100644 --- a/gcc/match.pd +++ b/gcc/match.pd @@ -3237,6 +3237,16 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) @2) (if (INTEGRAL_TYPE_P (type) && !TYPE_UNSIGNED (type)))) +/* Signed saturation add, case 4: + Z = .ADD_OVERFLOW (X, Y) + SAT_S_ADD = IMAGPART_EXPR (Z) != 0 ? (-(T)(X < 0) ^ MAX) : sum; */ +(match (signed_integer_sat_add @0 @1) + (cond^ (ne (imagpart (IFN_ADD_OVERFLOW:c@2 @0 @1)) integer_zerop) + (bit_xor:c (negate (convert (lt @0 integer_zerop))) max_value) + (realpart @2)) + (if (INTEGRAL_TYPE_P (type) && !TYPE_UNSIGNED (type) + && types_match (type, @0, @1)))) + /* Unsigned saturation sub, case 1 (branch with gt): SAT_U_SUB = X > Y ? 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X-CSE-ConnectionGUID: ayS3QdvrTiiegZTEOXeSXw== X-CSE-MsgGUID: Vs3xkw07RFixsbTJDMHApg== X-IronPort-AV: E=McAfee;i="6700,10204,11193"; a="42578799" X-IronPort-AV: E=Sophos;i="6.10,224,1719903600"; d="scan'208";a="42578799" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Sep 2024 15:43:10 -0700 X-CSE-ConnectionGUID: IqqdbtGtTqaI1WbuBdW1TQ== X-CSE-MsgGUID: E4CaaVIUS5KW2kn3Y1+8kQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,224,1719903600"; d="scan'208";a="68636042" Received: from panli.sh.intel.com ([10.239.154.73]) by orviesa008.jf.intel.com with ESMTP; 12 Sep 2024 15:43:08 -0700 From: pan2.li@intel.com To: gcc-patches@gcc.gnu.org Cc: richard.guenther@gmail.com, Tamar.Christina@arm.com, juzhe.zhong@rivai.ai, kito.cheng@gmail.com, jeffreyalaw@gmail.com, rdapp.gcc@gmail.com, Pan Li Subject: [PATCH v4 4/4] RISC-V: Fix vector SAT_ADD dump check due to middle-end change Date: Fri, 13 Sep 2024 06:42:12 +0800 Message-ID: <20240912224212.803040-1-pan2.li@intel.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 X-Spam-Status: No, score=-11.5 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org From: Pan Li This patch would like fix the dump check times of vector SAT_ADD. The middle-end change makes the match times from 2 to 4 times. The below test suites are passed for this patch. * The rv64gcv fully regression test. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-21.c: Adjust the dump check times from 2 to 4. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-22.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-23.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-24.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-25.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-26.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-27.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-28.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-29.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-30.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-31.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-32.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-5.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-6.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-7.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-8.c: Ditto. Signed-off-by: Pan Li --- .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-21.c | 2 +- .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-22.c | 2 +- .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-23.c | 2 +- .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-24.c | 2 +- .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-25.c | 2 +- .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-26.c | 2 +- .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-27.c | 2 +- .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-28.c | 2 +- .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-29.c | 2 +- .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-30.c | 2 +- .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-31.c | 2 +- .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-32.c | 2 +- .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-5.c | 2 +- .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-6.c | 2 +- .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-7.c | 2 +- .../gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-8.c | 2 +- 16 files changed, 16 insertions(+), 16 deletions(-) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-21.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-21.c index c525ba97c52..47dd5012cc6 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-21.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-21.c @@ -15,4 +15,4 @@ */ DEF_VEC_SAT_U_ADD_FMT_6(uint8_t) -/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */ +/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 4 "expand" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-22.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-22.c index 41372d08e52..df8d5a8d275 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-22.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-22.c @@ -15,4 +15,4 @@ */ DEF_VEC_SAT_U_ADD_FMT_6(uint16_t) -/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */ +/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 4 "expand" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-23.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-23.c index dddebb54426..f286bd10e4b 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-23.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-23.c @@ -15,4 +15,4 @@ */ DEF_VEC_SAT_U_ADD_FMT_6(uint32_t) -/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */ +/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 4 "expand" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-24.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-24.c index ad5162d10a0..307ff36cc35 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-24.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-24.c @@ -15,4 +15,4 @@ */ DEF_VEC_SAT_U_ADD_FMT_6(uint64_t) -/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */ +/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 4 "expand" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-25.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-25.c index 39c20b3cea6..3218962724c 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-25.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-25.c @@ -15,4 +15,4 @@ */ DEF_VEC_SAT_U_ADD_FMT_7(uint8_t) -/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */ +/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 4 "expand" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-26.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-26.c index 6eefaeebf31..922df02278d 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-26.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-26.c @@ -15,4 +15,4 @@ */ DEF_VEC_SAT_U_ADD_FMT_7(uint16_t) -/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */ +/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 4 "expand" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-27.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-27.c index 78beb1bd39e..7653f81531c 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-27.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-27.c @@ -15,4 +15,4 @@ */ DEF_VEC_SAT_U_ADD_FMT_7(uint32_t) -/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */ +/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 4 "expand" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-28.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-28.c index 369fa296d08..18803afd19a 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-28.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-28.c @@ -15,4 +15,4 @@ */ DEF_VEC_SAT_U_ADD_FMT_7(uint64_t) -/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */ +/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 4 "expand" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-29.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-29.c index e827cdd1657..e95d6f73c38 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-29.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-29.c @@ -15,4 +15,4 @@ */ DEF_VEC_SAT_U_ADD_FMT_8(uint8_t) -/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */ +/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 4 "expand" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-30.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-30.c index af16f48e228..34e10236381 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-30.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-30.c @@ -15,4 +15,4 @@ */ DEF_VEC_SAT_U_ADD_FMT_8(uint16_t) -/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */ +/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 4 "expand" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-31.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-31.c index 0a8eabfbad1..7fc5e73fe1d 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-31.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-31.c @@ -15,4 +15,4 @@ */ DEF_VEC_SAT_U_ADD_FMT_8(uint32_t) -/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */ +/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 4 "expand" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-32.c index 38cbdfbcf07..9684fdf37f7 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-32.c @@ -15,4 +15,4 @@ */ DEF_VEC_SAT_U_ADD_FMT_8(uint64_t) -/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */ +/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 4 "expand" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-5.c index fe8a5a8262d..96787fc15e2 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-5.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-5.c @@ -15,4 +15,4 @@ */ DEF_VEC_SAT_U_ADD_FMT_2(uint8_t) -/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */ +/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 4 "expand" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-6.c index 1aeb24eed0d..f155d7c47c7 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-6.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-6.c @@ -15,4 +15,4 @@ */ DEF_VEC_SAT_U_ADD_FMT_2(uint16_t) -/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */ +/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 4 "expand" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-7.c index 0d2b0e4ab80..5fdb67cc1ca 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-7.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-7.c @@ -15,4 +15,4 @@ */ DEF_VEC_SAT_U_ADD_FMT_2(uint32_t) -/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */ +/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 4 "expand" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-8.c index 168c269f75e..eee4d902fb5 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-8.c @@ -15,4 +15,4 @@ */ DEF_VEC_SAT_U_ADD_FMT_2(uint64_t) -/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */ +/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 4 "expand" } } */