From patchwork Thu May 3 08:52:16 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shilpasri G Bhat X-Patchwork-Id: 907892 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 40c86l43tQz9s3q for ; Thu, 3 May 2018 18:52:47 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.vnet.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 40c86l2pNxzF2VV for ; Thu, 3 May 2018 18:52:47 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.vnet.ibm.com X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=none (mailfrom) smtp.mailfrom=linux.vnet.ibm.com (client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com; envelope-from=shilpa.bhat@linux.vnet.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.vnet.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 40c86N4MSNzF2TZ for ; Thu, 3 May 2018 18:52:27 +1000 (AEST) Received: from pps.filterd (m0098393.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w438nKZw027175 for ; Thu, 3 May 2018 04:52:25 -0400 Received: from e06smtp12.uk.ibm.com (e06smtp12.uk.ibm.com [195.75.94.108]) by mx0a-001b2d01.pphosted.com with ESMTP id 2hqu2fhrf7-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 03 May 2018 04:52:25 -0400 Received: from localhost by e06smtp12.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Thu, 3 May 2018 09:52:20 +0100 Received: from d06av26.portsmouth.uk.ibm.com (d06av26.portsmouth.uk.ibm.com [9.149.105.62]) by b06cxnps4075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w438qKlt66912430; Thu, 3 May 2018 08:52:20 GMT Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 0E04EAE056; Thu, 3 May 2018 09:41:54 +0100 (BST) Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 88BB8AE053; Thu, 3 May 2018 09:41:53 +0100 (BST) Received: from oc4502181600.in.ibm.com (unknown [9.124.35.26]) by d06av26.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 3 May 2018 09:41:53 +0100 (BST) From: Shilpasri G Bhat To: skiboot@lists.ozlabs.org Date: Thu, 3 May 2018 14:22:16 +0530 X-Mailer: git-send-email 1.8.3.1 X-TM-AS-GCONF: 00 x-cbid: 18050308-0008-0000-0000-000004F2762F X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18050308-0009-0000-0000-00001E869B55 Message-Id: <1525337536-4910-1-git-send-email-shilpa.bhat@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-05-03_04:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=3 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1805030084 Subject: [Skiboot] [PATCH V2] occ: Use major version number while checking the pstate table format X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" The minor version increments of the pstate table are backward compatible. The minor version is changed when the pstate table remains same and the existing reserved bytes are used for pointing new data. So use only major version number while parsing the pstate table. This will allow old skiboot to parse the pstate table and handle minor version updates. Signed-off-by: Shilpasri G Bhat --- Changes from V1: - Add the check for major version in the remaining places hw/occ.c | 47 +++++++++++++++++++++++------------------------ 1 file changed, 23 insertions(+), 24 deletions(-) diff --git a/hw/occ.c b/hw/occ.c index c89d4d7..29eb4bd 100644 --- a/hw/occ.c +++ b/hw/occ.c @@ -66,7 +66,7 @@ * * struct occ_pstate_table - Pstate table layout * @valid: Indicates if data is valid - * @version: Layout version + * @version: Layout version [Major/Minor] * @v2.throttle: Reason for limiting the max pstate * @v9.occ_role: OCC role (Master/Slave) * @v#.pstate_min: Minimum pstate ever allowed @@ -488,7 +488,7 @@ static bool add_cpu_pstate_properties(int *pstate_nom) int pmax, pmin, pnom; u8 nr_pstates; bool ultra_turbo_supported; - int i; + int i, major, minor; prlog(PR_DEBUG, "OCC: CPU pstate state device tree init\n"); @@ -526,12 +526,12 @@ static bool add_cpu_pstate_properties(int *pstate_nom) */ ultra_turbo_supported = true; + major = occ_data->version >> 4; + minor = occ_data->version & 0xF; + /* Parse Pmax, Pmin and Pnominal */ - switch (occ_data->version) { - case 0x01: - ultra_turbo_supported = false; - /* fallthrough */ - case 0x02: + switch (major) { + case 0: if (proc_gen == proc_gen_p9) { /** * @fwts-label OCCInvalidVersion02 @@ -544,6 +544,8 @@ static bool add_cpu_pstate_properties(int *pstate_nom) occ_data->version); return false; } + if (minor == 0x1) + ultra_turbo_supported = false; pmin = occ_data->v2.pstate_min; pnom = occ_data->v2.pstate_nom; if (ultra_turbo_supported) @@ -551,7 +553,7 @@ static bool add_cpu_pstate_properties(int *pstate_nom) else pmax = occ_data->v2.pstate_turbo; break; - case 0x90: + case 0x9: if (proc_gen == proc_gen_p8) { /** * @fwts-label OCCInvalidVersion90 @@ -613,9 +615,8 @@ static bool add_cpu_pstate_properties(int *pstate_nom) nr_pstates = labs(pmax - pmin) + 1; prlog(PR_DEBUG, "OCC: Version %x Min %d Nom %d Max %d Nr States %d\n", occ_data->version, pmin, pnom, pmax, nr_pstates); - if ((occ_data->version == 0x90 && (nr_pstates <= 1)) || - (occ_data->version <= 0x02 && - (nr_pstates <= 1 || nr_pstates > 128))) { + if ((major == 0x9 && nr_pstates <= 1) || + (major == 0 && (nr_pstates <= 1 || nr_pstates > 128))) { /** * @fwts-label OCCInvalidPStateRange * @fwts-advice The number of pstates is outside the valid @@ -647,13 +648,12 @@ static bool add_cpu_pstate_properties(int *pstate_nom) dt_freq = malloc(nr_pstates * sizeof(u32)); assert(dt_freq); - switch (occ_data->version) { - case 0x01: - case 0x02: + switch (major) { + case 0: parse_pstates_v2(occ_data, dt_id, dt_freq, nr_pstates, pmax, pmin); break; - case 0x90: + case 0x9: parse_pstates_v9(occ_data, dt_id, dt_freq, nr_pstates, pmax, pmin); break; @@ -685,14 +685,14 @@ static bool add_cpu_pstate_properties(int *pstate_nom) dt_cmax = malloc(nr_cores * sizeof(u32)); assert(dt_cmax); - switch (occ_data->version) { - case 0x02: + switch (major) { + case 0: pturbo = occ_data->v2.pstate_turbo; pultra_turbo = occ_data->v2.pstate_ultra_turbo; for (i = 0; i < nr_cores; i++) dt_cmax[i] = occ_data->v2.core_max[i]; break; - case 0x90: + case 0x9: pturbo = occ_data->v9.pstate_turbo; pultra_turbo = occ_data->v9.pstate_ultra_turbo; for (i = 0; i < nr_cores; i++) @@ -720,7 +720,7 @@ static bool add_cpu_pstate_properties(int *pstate_nom) free(dt_cmax); } - if (occ_data->version > 0x02) + if (major == 0x9) goto out; dt_add_property_cells(power_mgt, "#address-cells", 2); @@ -862,11 +862,10 @@ static inline u8 get_cpu_throttle(struct proc_chip *chip) struct occ_pstate_table *pdata = get_occ_pstate_table(chip); struct occ_dynamic_data *data; - switch (pdata->version) { - case 0x01: - case 0x02: + switch (pdata->version >> 4) { + case 0: return pdata->v2.throttle; - case 0x90: + case 0x9: data = get_occ_dynamic_data(chip); return data->cpu_throttle; default: @@ -1251,7 +1250,7 @@ static void occ_cmd_interface_init(void) chip = next_chip(NULL); pdata = get_occ_pstate_table(chip); - if (pdata->version != 0x90) + if ((pdata->version >> 4) != 0x9) return; for_each_chip(chip)