From patchwork Thu Sep 5 12:00:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Li, Pan2" X-Patchwork-Id: 1981214 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=DFLtPja3; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Wzyds6ls9z1yXY for ; Thu, 5 Sep 2024 22:02:09 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id C1F093864879 for ; Thu, 5 Sep 2024 12:02:07 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) by sourceware.org (Postfix) with ESMTPS id CD02A384AB75 for ; Thu, 5 Sep 2024 12:01:36 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org CD02A384AB75 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org CD02A384AB75 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=198.175.65.17 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1725537699; cv=none; b=iGmRN1ngpXJPsjoo++EvZb8Omt9MMwwC7V7LOq+KK9c/q4le96p7JKyYG7WhFSycPrcrAcW7USVcAnewWiBNO/Lr5J/+QxEK0nrvKcUSUVPbzKiX5KOmYb2P7JvVE/rtxzM5PV1mGekiSLDLk802wTrdX2krP2qPEP4CNvAgU68= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1725537699; c=relaxed/simple; bh=9ywTeIz+ux6Zu1RRnHMrlNvagHbwc8uzelX1vO2dzDk=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=vOqWKKtIQKllpWIDKlWi9nqxESs2dxOG6sa9Hxgwhhi/zIK3fTADy+GFrdCoB2topGX5JOGUQ5agxCRfcO4ouy9A0LLTb+uKA/deKhzUkApxKYRnK3TNKFCRzcTyFbAM/T0zsYRWPigCqVG/Rhs+jmmLx//ph8ZMc6XqziU5zAk= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1725537697; x=1757073697; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=9ywTeIz+ux6Zu1RRnHMrlNvagHbwc8uzelX1vO2dzDk=; b=DFLtPja30j/TokHkYyyVZPa/K/h+w31FN/NDI8xq4QY9HTHER1bC+jEq rDcqQEloRkOAbs0vCsBJOUC6EjIQ+Jrx6hyp+PBYnmdjP08ajbM0D16uj 3Knn+KtERLoqGJ9ygUtMT595xyXY4f4BPgY/v5Jcw5fDMu/A3jHWIJiX8 V5E37mksOGc7WZlmqdcsw2qjXWlezmvZlplus9K3NTlzLE40Di/YRze3E dFqO4sdJDP16lPk6fgk/3kIi3I6IOjJxKnH0RkFAKeLT7QUKKUseM172k QWbA2AQl2QoNBxos+FPm0BsVW/vZX58JW2pVMnXnZfDd+SGu64RbMDxn+ g==; X-CSE-ConnectionGUID: f8foVHDTQt+r5A2W7zuvIA== X-CSE-MsgGUID: R1UwLwGsT/ezT1ZBZ0tk4Q== X-IronPort-AV: E=McAfee;i="6700,10204,11185"; a="24406822" X-IronPort-AV: E=Sophos;i="6.10,204,1719903600"; d="scan'208";a="24406822" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Sep 2024 05:01:36 -0700 X-CSE-ConnectionGUID: PX4tQW+gT8GG/eqpdPai2Q== X-CSE-MsgGUID: THd6ydsZTFOVR0xeFA6nzA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,204,1719903600"; d="scan'208";a="65921045" Received: from panli.sh.intel.com ([10.239.154.73]) by orviesa006.jf.intel.com with ESMTP; 05 Sep 2024 05:01:33 -0700 From: pan2.li@intel.com To: gcc-patches@gcc.gnu.org Cc: richard.guenther@gmail.com, Tamar.Christina@arm.com, juzhe.zhong@rivai.ai, kito.cheng@gmail.com, jeffreyalaw@gmail.com, rdapp.gcc@gmail.com, Pan Li Subject: [PATCH v2 1/2] Genmatch: Support control flow graph case 1 for phi on condition Date: Thu, 5 Sep 2024 20:00:46 +0800 Message-ID: <20240905120047.3163255-1-pan2.li@intel.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 X-Spam-Status: No, score=-11.6 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org From: Pan Li The gen_phi_on_cond can only support below control flow for cond from day 1. Aka: +------+ | def | | ... | +-----+ | cond |------>| def | +------+ | ... | | +-----+ | | v | +-----+ | | PHI |<----------+ +-----+ Unfortunately, there will be more scenarios of control flow on PHI. For example as below: T __attribute__((noinline)) \ sat_s_add_##T##_fmt_3 (T x, T y) \ { \ T sum; \ bool overflow = __builtin_add_overflow (x, y, &sum); \ return overflow ? x < 0 ? MIN : MAX : sum; \ } DEF_SAT_S_ADD_FMT_3(int8_t, uint8_t, INT8_MIN, INT8_MAX) With expanded RTL like below. 3 │ 4 │ __attribute__((noinline)) 5 │ int8_t sat_s_add_int8_t_fmt_3 (int8_t x, int8_t y) 6 │ { 7 │ signed char _1; 8 │ signed char _2; 9 │ int8_t _3; 10 │ __complex__ signed char _6; 11 │ _Bool _8; 12 │ signed char _9; 13 │ signed char _10; 14 │ signed char _11; 15 │ 16 │ ;; basic block 2, loop depth 0 17 │ ;; pred: ENTRY 18 │ _6 = .ADD_OVERFLOW (x_4(D), y_5(D)); 19 │ _2 = IMAGPART_EXPR <_6>; 20 │ if (_2 != 0) 21 │ goto ; [50.00%] 22 │ else 23 │ goto ; [50.00%] 24 │ ;; succ: 4 25 │ ;; 3 26 │ 27 │ ;; basic block 3, loop depth 0 28 │ ;; pred: 2 29 │ _1 = REALPART_EXPR <_6>; 30 │ goto ; [100.00%] 31 │ ;; succ: 5 32 │ 33 │ ;; basic block 4, loop depth 0 34 │ ;; pred: 2 35 │ _8 = x_4(D) < 0; 36 │ _9 = (signed char) _8; 37 │ _10 = -_9; 38 │ _11 = _10 ^ 127; 39 │ ;; succ: 5 40 │ 41 │ ;; basic block 5, loop depth 0 42 │ ;; pred: 3 43 │ ;; 4 44 │ # _3 = PHI <_1(3), _11(4)> 45 │ return _3; 46 │ ;; succ: EXIT 47 │ 48 │ } The above code will have below control flow which is not supported by the gen_phi_on_cond. +------+ | def | | ... | +-----+ | cond |------>| def | +------+ | ... | | +-----+ | | v | +-----+ | | def | | | ... | | +-----+ | | | | | v | +-----+ | | PHI |<----------+ +-----+ This patch would like to add support above control flow for the gen_phi_on_cond. The generated match code looks like below. Before this patch: basic_block _b1 = gimple_bb (_a1); if (gimple_phi_num_args (_a1) == 2) { basic_block _pb_0_1 = EDGE_PRED (_b1, 0)->src; basic_block _pb_1_1 = EDGE_PRED (_b1, 1)->src; basic_block _db_1 = safe_dyn_cast (*gsi_last_bb (_pb_0_1)) ? _pb_0_1 : _pb_1_1; basic_block _other_db_1 = safe_dyn_cast (*gsi_last_bb (_pb_0_1)) ? _pb_1_1 : _pb_0_1; gcond *_ct_1 = safe_dyn_cast (*gsi_last_bb (_db_1)); if (_ct_1 && EDGE_COUNT (_other_db_1->preds) == 1 && EDGE_COUNT (_other_db_1->succs) == 1 && EDGE_PRED (_other_db_1, 0)->src == _db_1) { ... After this patch: basic_block _b1 = gimple_bb (_a1); basic_block _b_cond_1; if (gimple_phi_num_args (_a1) == 2 && (control_flow_graph_case_0_match (_b1, &_b_cond_1) || control_flow_graph_case_1_match (_b1, &_b_cond_1))) { ... The below testsuites are passed for this patch: * The rv64gcv fully regression test. * The x86 bootstrap test. * The x86 fully regression test. gcc/ChangeLog: * genmatch.cc (dt_operand::gen_phi_on_cond): Add support control flow graph case 1 for gen phi on condition. * gimple-match-head.cc (control_flow_graph_case_0_match): Add new func impl to match case 0 of cfg. (control_flow_graph_case_1_match): Ditto but for case 1. Signed-off-by: Pan Li --- gcc/genmatch.cc | 37 +++++-------- gcc/gimple-match-head.cc | 115 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 130 insertions(+), 22 deletions(-) diff --git a/gcc/genmatch.cc b/gcc/genmatch.cc index a56bd90cb2c..e0ec1c0e928 100644 --- a/gcc/genmatch.cc +++ b/gcc/genmatch.cc @@ -3518,43 +3518,36 @@ dt_operand::gen_phi_on_cond (FILE *f, int indent, int depth) { fprintf_indent (f, indent, "basic_block _b%d = gimple_bb (_a%d);\n", depth, depth); + fprintf_indent (f, indent, "basic_block _b_cond_%d;\n", depth); - fprintf_indent (f, indent, "if (gimple_phi_num_args (_a%d) == 2)\n", depth); + fprintf_indent (f, indent, "if (gimple_phi_num_args (_a%d) == 2\n", depth); - indent += 2; - fprintf_indent (f, indent, "{\n"); indent += 2; fprintf_indent (f, indent, - "basic_block _pb_0_%d = EDGE_PRED (_b%d, 0)->src;\n", depth, depth); - fprintf_indent (f, indent, - "basic_block _pb_1_%d = EDGE_PRED (_b%d, 1)->src;\n", depth, depth); - fprintf_indent (f, indent, - "basic_block _db_%d = safe_dyn_cast (*gsi_last_bb (_pb_0_%d)) ? " - "_pb_0_%d : _pb_1_%d;\n", depth, depth, depth, depth); + " && (control_flow_graph_case_0_match (_b%d, &_b_cond_%d)\n", + depth, depth); fprintf_indent (f, indent, - "basic_block _other_db_%d = safe_dyn_cast " - "(*gsi_last_bb (_pb_0_%d)) ? _pb_1_%d : _pb_0_%d;\n", - depth, depth, depth, depth); + " || control_flow_graph_case_1_match (_b%d, &_b_cond_%d)))\n", + depth, depth); + + indent += 2; + fprintf_indent (f, indent, "{\n"); + indent += 2; fprintf_indent (f, indent, - "gcond *_ct_%d = safe_dyn_cast (*gsi_last_bb (_db_%d));\n", + "gcond *_cond_%d = safe_dyn_cast (*gsi_last_bb (_b_cond_%d));\n", depth, depth); - fprintf_indent (f, indent, "if (_ct_%d" - " && EDGE_COUNT (_other_db_%d->preds) == 1\n", depth, depth); - fprintf_indent (f, indent, - " && EDGE_COUNT (_other_db_%d->succs) == 1\n", depth); - fprintf_indent (f, indent, - " && EDGE_PRED (_other_db_%d, 0)->src == _db_%d)\n", depth, depth); + fprintf_indent (f, indent, "if (_cond_%d)\n", depth); indent += 2; fprintf_indent (f, indent, "{\n"); indent += 2; fprintf_indent (f, indent, - "tree _cond_lhs_%d = gimple_cond_lhs (_ct_%d);\n", depth, depth); + "tree _cond_lhs_%d = gimple_cond_lhs (_cond_%d);\n", depth, depth); fprintf_indent (f, indent, - "tree _cond_rhs_%d = gimple_cond_rhs (_ct_%d);\n", depth, depth); + "tree _cond_rhs_%d = gimple_cond_rhs (_cond_%d);\n", depth, depth); char opname_0[20]; char opname_1[20]; @@ -3562,7 +3555,7 @@ dt_operand::gen_phi_on_cond (FILE *f, int indent, int depth) gen_opname (opname_0, 0); fprintf_indent (f, indent, - "tree %s = build2 (gimple_cond_code (_ct_%d), " + "tree %s = build2 (gimple_cond_code (_cond_%d), " "boolean_type_node, _cond_lhs_%d, _cond_rhs_%d);\n", opname_0, depth, depth, depth); diff --git a/gcc/gimple-match-head.cc b/gcc/gimple-match-head.cc index 924d3f1e710..eb43e5c58cb 100644 --- a/gcc/gimple-match-head.cc +++ b/gcc/gimple-match-head.cc @@ -375,3 +375,118 @@ gimple_bitwise_inverted_equal_p (tree expr1, tree expr2, bool &wascmp, tree (*va return true; return false; } + +/* + * Return TRUE if the cfg matches the below layout by the given b2 in + * the first argument. Or return FALSE. + * + * If return TRUE, the output argument b_out will be updated to the b0 + * block as below example. + * + * If return FALSE, the output argument b_out will be NULL_BLOCK. + * + * | + * | + * v + * +------+ + * | b0: | + * | def | +-----+ + * | ... | | b1: | + * | cond |------>| def | + * +------+ | ... | + * | +-----+ + * | | + * v | + * +-----+ | + * | b2: | | + * | def |<----------+ + * +-----+ + */ +static inline bool +control_flow_graph_case_0_match (basic_block b2, basic_block *b_out) +{ + *b_out = NULL; + + if (EDGE_COUNT (b2->preds) != 2) + return false; + + basic_block pred_0 = EDGE_PRED (b2, 0)->src; + basic_block pred_1 = EDGE_PRED (b2, 1)->src; + + if (pred_0 == NULL || pred_1 == NULL) + return false; + + if (!(EDGE_COUNT (pred_0->succs) == 2 && EDGE_COUNT (pred_1->succs) == 1) + && !(EDGE_COUNT (pred_0->succs) == 1 && EDGE_COUNT (pred_1->succs) == 2)) + return false; + + basic_block b0 = EDGE_COUNT (pred_0->succs) == 2 ? pred_0 : pred_1; + basic_block b1 = EDGE_COUNT (pred_0->succs) == 1 ? pred_0 : pred_1; + + if (EDGE_COUNT (b1->preds) != 1 || EDGE_PRED (b1, 0)->src != b0) + return false; + + *b_out = b0; + return true; +} + +/* + * Return TRUE if the cfg matches the below layout by the given b3 in + * the first argument. Or return FALSE. + * + * If return TRUE, the output argument b_out will be updated to the b0 + * block as below example. + * + * If return FALSE, the output argument b_out will be NULL. + * + * | + * | + * v + * +------+ + * | b0: | + * | ... | +-----+ + * | cond |------>| b2: | + * +------+ | ... | + * | +-----+ + * | | + * v | + * +-----+ | + * | b1: | | + * | ... | | + * +-----+ | + * | | + * | | + * v | + * +-----+ | + * | b3: |<----------+ + * | ... | + * +-----+ + */ +static inline bool +control_flow_graph_case_1_match (basic_block b3, basic_block *b_out) +{ + *b_out = NULL; + + if (EDGE_COUNT (b3->preds) != 2) + return false; + + basic_block b1 = EDGE_PRED (b3, 0)->src; + basic_block b2 = EDGE_PRED (b3, 1)->src; + + if (b1 == NULL || b2 == NULL) + return false; + + if (EDGE_COUNT (b1->succs) != 1 + || EDGE_COUNT (b1->preds) != 1 + || EDGE_COUNT (b2->succs) != 1 + || EDGE_COUNT (b2->preds) != 1) + return false; + + basic_block b0 = EDGE_PRED (b1, 0)->src; + + if (EDGE_COUNT (b0->succs) != 2 || EDGE_PRED (b2, 0)->src != b0) + return false; + + *b_out = b0; + return true; +} From patchwork Thu Sep 5 12:00:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Li, Pan2" X-Patchwork-Id: 1981215 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=Ytsop2SO; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Wzyfy6vdgz1yXY for ; Thu, 5 Sep 2024 22:03:06 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id BB27638654A1 for ; Thu, 5 Sep 2024 12:03:04 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) by sourceware.org (Postfix) with ESMTPS id 016973864879 for ; Thu, 5 Sep 2024 12:01:38 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 016973864879 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 016973864879 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=198.175.65.17 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1725537701; cv=none; b=card9cA6KAk+z1KkgBE65wpCJQ0x8tIzJcySqDyCMgfWp50nekzULwRcetFWp45dUL0/xtjwzccbi2imOF2isxYf0vAUcmuLz6MvB9kN1UJOV/il5NMzVn+AaBzmYjCS04kx7ir12gt5M7Ig7ZzHTLJRVR2pimQw4YoSR/VoVMA= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1725537701; c=relaxed/simple; bh=zlACtdS0H1stWGh/JhB+TZTTyOHSdmY9D++F7l2rDLI=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=SFaMOgUqnInRJW/S+9otgAFotI2efkoVs0j7IKostjc61OpBA6d7i2Mjjxpi+SIvVKwUc0pCzh0nBP9aqStosesW6cCJ/yP1MG/7fZbtbguYnpWtbFfm10Uuy57vItbHHiLRzji3TBJvDavSIWMGuMbP3guSYWZ51Q3CdfFaHnY= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1725537699; x=1757073699; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=zlACtdS0H1stWGh/JhB+TZTTyOHSdmY9D++F7l2rDLI=; b=Ytsop2SOHfQhSqHR46DiG3MEUv+V4wKLQJL2EJZYN7whJ9nKzo7chL4h FXwaFgy6O/xTvxUrE7reACYZA9MbC5fIUGLbt3xoTDr+M7D3Ghr0J1Ei3 yryoqIkH7Ua+mp7UTMr+qmEUdGr7fegN8xbW1eCg6CZ7xIB6+96f/JD8a BYKVX+AiZa8GKT5I1gJ6u0zvtwcSeYTZXCtgFIaMfadHujMmezQJvd4UW FMCzwaYsR2qHJ2FfJ8+6ShpGfLBXHWSsRo6aJLY2solH5MUya1hlBNEOP ueOSHemDYG3BjepfCg7rjdr7UAyW9TLCS2yjDuR59CFF5T5tzlBR//S/p g==; X-CSE-ConnectionGUID: OdwEIreQSGWO3NuD4xWaHw== X-CSE-MsgGUID: xtqeURfLTVWlMnwWKlA93g== X-IronPort-AV: E=McAfee;i="6700,10204,11185"; a="24406827" X-IronPort-AV: E=Sophos;i="6.10,204,1719903600"; d="scan'208";a="24406827" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Sep 2024 05:01:38 -0700 X-CSE-ConnectionGUID: GjArSQBNTMa3Z0TwnQM+nA== X-CSE-MsgGUID: 0mecBgNMR6eyOHFcVHlADg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,204,1719903600"; d="scan'208";a="65921071" Received: from panli.sh.intel.com ([10.239.154.73]) by orviesa006.jf.intel.com with ESMTP; 05 Sep 2024 05:01:35 -0700 From: pan2.li@intel.com To: gcc-patches@gcc.gnu.org Cc: richard.guenther@gmail.com, Tamar.Christina@arm.com, juzhe.zhong@rivai.ai, kito.cheng@gmail.com, jeffreyalaw@gmail.com, rdapp.gcc@gmail.com, Pan Li Subject: [PATCH v2 2/2] Match: Support form 3 for scalar signed integer .SAT_ADD Date: Thu, 5 Sep 2024 20:00:47 +0800 Message-ID: <20240905120047.3163255-2-pan2.li@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240905120047.3163255-1-pan2.li@intel.com> References: <20240905120047.3163255-1-pan2.li@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-11.6 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org From: Pan Li This patch would like to support the form 3 of the scalar signed integer .SAT_ADD. Aka below example: Form 3: #define DEF_SAT_S_ADD_FMT_3(T, UT, MIN, MAX) \ T __attribute__((noinline)) \ sat_s_add_##T##_fmt_3 (T x, T y) \ { \ T sum; \ bool overflow = __builtin_add_overflow (x, y, &sum); \ return overflow ? x < 0 ? MIN : MAX : sum; \ } DEF_SAT_S_ADD_FMT_3(int8_t, uint8_t, INT8_MIN, INT8_MAX) We can tell the difference before and after this patch if backend implemented the ssadd3 pattern similar as below. Before this patch: 4 │ __attribute__((noinline)) 5 │ int8_t sat_s_add_int8_t_fmt_3 (int8_t x, int8_t y) 6 │ { 7 │ signed char _1; 8 │ signed char _2; 9 │ int8_t _3; 10 │ __complex__ signed char _6; 11 │ _Bool _8; 12 │ signed char _9; 13 │ signed char _10; 14 │ signed char _11; 15 │ 16 │ ;; basic block 2, loop depth 0 17 │ ;; pred: ENTRY 18 │ _6 = .ADD_OVERFLOW (x_4(D), y_5(D)); 19 │ _2 = IMAGPART_EXPR <_6>; 20 │ if (_2 != 0) 21 │ goto ; [50.00%] 22 │ else 23 │ goto ; [50.00%] 24 │ ;; succ: 4 25 │ ;; 3 26 │ 27 │ ;; basic block 3, loop depth 0 28 │ ;; pred: 2 29 │ _1 = REALPART_EXPR <_6>; 30 │ goto ; [100.00%] 31 │ ;; succ: 5 32 │ 33 │ ;; basic block 4, loop depth 0 34 │ ;; pred: 2 35 │ _8 = x_4(D) < 0; 36 │ _9 = (signed char) _8; 37 │ _10 = -_9; 38 │ _11 = _10 ^ 127; 39 │ ;; succ: 5 40 │ 41 │ ;; basic block 5, loop depth 0 42 │ ;; pred: 3 43 │ ;; 4 44 │ # _3 = PHI <_1(3), _11(4)> 45 │ return _3; 46 │ ;; succ: EXIT 47 │ 48 │ } After this patch: 4 │ __attribute__((noinline)) 5 │ int8_t sat_s_add_int8_t_fmt_3 (int8_t x, int8_t y) 6 │ { 7 │ int8_t _3; 8 │ 9 │ ;; basic block 2, loop depth 0 10 │ ;; pred: ENTRY 11 │ _3 = .SAT_ADD (x_4(D), y_5(D)); [tail call] 12 │ return _3; 13 │ ;; succ: EXIT 14 │ 15 │ } The below test suites are passed for this patch. * The rv64gcv fully regression test. * The x86 bootstrap test. * The x86 fully regression test. gcc/ChangeLog: * match.pd: Add the form 3 of signed .SAT_ADD matching. Signed-off-by: Pan Li --- gcc/match.pd | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/gcc/match.pd b/gcc/match.pd index 621306213e4..1d478d42ed5 100644 --- a/gcc/match.pd +++ b/gcc/match.pd @@ -3207,6 +3207,16 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) (if (INTEGRAL_TYPE_P (type) && !TYPE_UNSIGNED (type) && types_match (type, @0, @1)))) +/* Signed saturation add, case 3: + Z = .ADD_OVERFLOW (X, Y) + SAT_S_ADD = IMAGPART_EXPR (Z) != 0 ? (-(T)(X < 0) ^ MAX) : sum; */ +(match (signed_integer_sat_add @0 @1) + (cond^ (ne (imagpart (IFN_ADD_OVERFLOW:c@2 @0 @1)) integer_zerop) + (bit_xor:c (negate (convert (lt @0 integer_zerop))) max_value) + (realpart @2)) + (if (INTEGRAL_TYPE_P (type) && !TYPE_UNSIGNED (type) + && types_match (type, @0, @1)))) + /* Unsigned saturation sub, case 1 (branch with gt): SAT_U_SUB = X > Y ? X - Y : 0 */ (match (unsigned_integer_sat_sub @0 @1)