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Thu, 05 Sep 2024 04:26:37 -0700 (PDT) From: Pavitrakumar M To: devicetree@vger.kernel.org, herbert@gondor.apana.org.au, linux-crypto@vger.kernel.org, robh@kernel.org Cc: Ruud.Derwig@synopsys.com, manjunath.hadli@vayavyalabs.com, bhoomikak@vayavyalabs.com, Pavitrakumar M Subject: [PATCH 1/1] dt-bindings: crypto: Document support for SPAcc Date: Thu, 5 Sep 2024 16:56:22 +0530 Message-Id: <20240905112622.237681-2-pavitrakumarm@vayavyalabs.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240905112622.237681-1-pavitrakumarm@vayavyalabs.com> References: <20240905112622.237681-1-pavitrakumarm@vayavyalabs.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add DT bindings related to the SPAcc driver for Documentation. DWC Synopsys Security Protocol Accelerator(SPAcc) Hardware Crypto Engine is a crypto IP designed by Synopsys. Signed-off-by: Bhoomika K Signed-off-by: Pavitrakumar M Acked-by: Ruud Derwig --- .../bindings/crypto/snps,dwc-spacc.yaml | 79 +++++++++++++++++++ 1 file changed, 79 insertions(+) create mode 100644 Documentation/devicetree/bindings/crypto/snps,dwc-spacc.yaml diff --git a/Documentation/devicetree/bindings/crypto/snps,dwc-spacc.yaml b/Documentation/devicetree/bindings/crypto/snps,dwc-spacc.yaml new file mode 100644 index 000000000000..dc5b38cd5e1e --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/snps,dwc-spacc.yaml @@ -0,0 +1,79 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/crypto/snps,dwc-spacc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Synopsys DesignWare Security Protocol Accelerator(SPAcc) Crypto Engine + +maintainers: + - Ruud Derwig + +description: + DWC Synopsys Security Protocol Accelerator(SPAcc) Hardware Crypto Engine is + a crypto IP designed by Synopsys, that can accelerate cryptographic + operations. + +properties: + compatible: + contains: + enum: + - snps,dwc-spacc + - snps,dwc-spacc-6.0 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + maxItems: 1 + + little-endian: true + + vspacc-priority: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Set priority mode on the Virtual SPAcc. This is Virtual SPAcc priority + weight. Its used in priority arbitration of the Virtual SPAccs. + minimum: 0 + maximum: 15 + default: 0 + + vspacc-index: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Virtual spacc index for validation and driver functioning. + minimum: 0 + maximum: 7 + + spacc-wdtimer: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Watchdog timer count to replace the default value in driver. + minimum: 0x19000 + maximum: 0xFFFFF + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + spacc@40000000 { + compatible = "snps,dwc-spacc"; + reg = <0x40000000 0x3FFFF>; + interrupt-parent = <&gic>; + interrupts = <0 89 4>; + clocks = <&clock>; + clock-names = "ref_clk"; + vspacc-priority = <4>; + spacc-wdtimer = <10000>; + vspacc-index = <0>; + little-endian; + };