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bh=RDY88ra94JBb+IuiAIyKiYCW1DH2SA5E50yh/vMkXuw=; b=EiUcFSm2grXFwHQyuGWeu/Ntmy Pci/WR+to7JAHf38OpkLoY9kHBkuT3PMLqhcr0ewOi/zZDBNl1urlDqsnbUEU5WhQ3XfTtqukp55H o6NOCXT/rD6NyqkbWU5Yodf5iHHZrsaL5h/o0zB4vdSdHI5SKr9ObL/djqxh5q0F1VkiHT76tYIUn GWSlDT+uV0RoaLhqCmXp8CP1wI5RpCIfyhcbDPQe6P1r9Dg1JrA1zBVf75jwGKqpg1sBkDxYGpt/w /T5uQlQTDWpMWHvLG+pgp9qGt8uXUhs/IrgmqZdhFSEuy4AjISFyB/kAtcKdncLnXKgFjH+dYYXMn y1RFBmBg==; Received: from [122.165.245.213] (port=41440 helo=localhost.localdomain) by md-in-79.webhostbox.net with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96.2) (envelope-from ) id 1slR9e-000Elu-1q; Tue, 03 Sep 2024 16:22:58 +0530 From: Karthikeyan Krishnasamy To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, heiko@sntech.de, alexandre.belloni@bootlin.com Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rtc@vger.kernel.org, Karthikeyan Krishnasamy Subject: [PATCH v2 1/8] ARM: dts: rockchip: Add i2c3 node for RV1126 Date: Tue, 3 Sep 2024 16:22:38 +0530 Message-Id: <20240903105245.715899-2-karthikeyan@linumiz.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240903105245.715899-1-karthikeyan@linumiz.com> References: <20240903105245.715899-1-karthikeyan@linumiz.com> Precedence: bulk X-Mailing-List: linux-rtc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - md-in-79.webhostbox.net X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - linumiz.com X-BWhitelist: no X-Source-IP: 122.165.245.213 X-Source-L: No X-Exim-ID: 1slR9e-000Elu-1q X-Source: X-Source-Args: X-Source-Dir: X-Source-Sender: (localhost.localdomain) [122.165.245.213]:41440 X-Source-Auth: karthikeyan@linumiz.com X-Email-Count: 12 X-Org: HG=dishared_whb_net_legacy;ORG=directi; X-Source-Cap: bGludW1jbWM7aG9zdGdhdG9yO21kLWluLTc5LndlYmhvc3Rib3gubmV0 X-Local-Domain: yes X-CMAE-Envelope: MS4xfIWJX2MhUcv7B5ziZt4OJIPRsaFf92OthQ+qwpn0UgcySpSjCwYN0z5XiAZrkXf5oWLCXNAsO4CIGgNTzjdhKAKyuTIIBJU6V5dZCU9mhe4+D9FJAqXP X0VyxiiGaDcIK6D8PEKhCLl9mMRUFULc4f3dQsKjFTtZRM2UQYcciw/ob1CoBKCr56keikqI8C/ifUygZ7ceA5FJVdazkXAVwn4= Add i2c3 node and possible pinctrl for Rockchip RV1126 Signed-off-by: Karthikeyan Krishnasamy --- Notes: v2: - No change .../arm/boot/dts/rockchip/rv1126-pinctrl.dtsi | 26 +++++++++++++++++++ arch/arm/boot/dts/rockchip/rv1126.dtsi | 15 +++++++++++ 2 files changed, 41 insertions(+) diff --git a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi index 06b1d7f2d858..be666b25b830 100644 --- a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi +++ b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi @@ -97,6 +97,32 @@ i2c2_xfer: i2c2-xfer { <0 RK_PC3 1 &pcfg_pull_none_drv_level_0_smt>; }; }; + i2c3 { + /omit-if-no-ref/ + i2c3m0_xfer: i2c3m0-xfer { + rockchip,pins = + /* i2c3_scl_m0 */ + <3 RK_PA4 5 &pcfg_pull_none>, + /* i2c3_sda_m0 */ + <3 RK_PA5 5 &pcfg_pull_none>; + }; + /omit-if-no-ref/ + i2c3m1_xfer: i2c3m1-xfer { + rockchip,pins = + /* i2c3_scl_m1 */ + <2 RK_PD4 7 &pcfg_pull_none>, + /* i2c3_sda_m1 */ + <2 RK_PD5 7 &pcfg_pull_none>; + }; + /omit-if-no-ref/ + i2c3m2_xfer: i2c3m2-xfer { + rockchip,pins = + /* i2c3_scl_m2 */ + <1 RK_PD6 3 &pcfg_pull_none>, + /* i2c3_sda_m2 */ + <1 RK_PD7 3 &pcfg_pull_none>; + }; + }; pwm2 { /omit-if-no-ref/ pwm2m0_pins: pwm2m0-pins { diff --git a/arch/arm/boot/dts/rockchip/rv1126.dtsi b/arch/arm/boot/dts/rockchip/rv1126.dtsi index bb603cae13df..59de848c9a83 100644 --- a/arch/arm/boot/dts/rockchip/rv1126.dtsi +++ b/arch/arm/boot/dts/rockchip/rv1126.dtsi @@ -22,6 +22,7 @@ / { aliases { i2c0 = &i2c0; i2c2 = &i2c2; + i2c3 = &i2c3; serial0 = &uart0; serial1 = &uart1; serial2 = &uart2; @@ -308,6 +309,20 @@ dmac: dma-controller@ff4e0000 { clock-names = "apb_pclk"; }; + i2c3: i2c@ff520000 { + compatible = "rockchip,rv1126-i2c", "rockchip,rk3399-i2c"; + reg = <0xff520000 0x1000>; + interrupts = ; + clocks = <&cru CLK_I2C3>, <&cru PCLK_I2C3>; + clock-names = "i2c", "pclk"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c3m0_xfer>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + rockchip,grf = <&pmugrf>; + }; + pwm11: pwm@ff550030 { compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm"; reg = <0xff550030 0x10>; From patchwork Tue Sep 3 10:52:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: karthikeyan X-Patchwork-Id: 1979961 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=linumiz.com header.i=@linumiz.com header.a=rsa-sha256 header.s=default header.b=IRWLiByr; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2604:1380:45d1:ec00::1; helo=ny.mirrors.kernel.org; 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bh=/MAIKAPNBs6sHSm33nKmjtfGOYqIhfEVYi8ZeIyp5Xs=; b=IRWLiByrr8YsgosLolDYWGayBx qy5wdihlmrT1CdlW96PilXCj1wafxM8eHncPMupSEA2oXt6W6G8LiVp8fSqSmrR7ocRcdvThdxJsF l0ijglKpqdU/9gdRjtT2bsEySrHl4R5t22Soeu65WA1gudMtGK7xXyeglXyKqC9xjl5e1Hc3Wii7m HF1x+jVder0U0Isz9ndI6FqN90+sK/64ckwxoVNmHfqRrqwrB3wtCGxxW053ImE4eOFYzEuWL6OQ9 RFU3QNDvDMts0TuxLAmARpnZGMymU0GV7sXBSH5LLaSYL2fsCezV3B2zKz8GW1W/jjLNVs8BquKW4 FT9baP6g==; Received: from [122.165.245.213] (port=41440 helo=localhost.localdomain) by md-in-79.webhostbox.net with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96.2) (envelope-from ) id 1slR9f-000Elu-32; Tue, 03 Sep 2024 16:23:00 +0530 From: Karthikeyan Krishnasamy To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, heiko@sntech.de, alexandre.belloni@bootlin.com Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rtc@vger.kernel.org, Karthikeyan Krishnasamy Subject: [PATCH v2 2/8] ARM: dts: rockchip: Add i2s0 node for RV1126 Date: Tue, 3 Sep 2024 16:22:39 +0530 Message-Id: <20240903105245.715899-3-karthikeyan@linumiz.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240903105245.715899-1-karthikeyan@linumiz.com> References: <20240903105245.715899-1-karthikeyan@linumiz.com> Precedence: bulk X-Mailing-List: linux-rtc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - md-in-79.webhostbox.net X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - linumiz.com X-BWhitelist: no X-Source-IP: 122.165.245.213 X-Source-L: No X-Exim-ID: 1slR9f-000Elu-32 X-Source: X-Source-Args: X-Source-Dir: X-Source-Sender: (localhost.localdomain) [122.165.245.213]:41440 X-Source-Auth: karthikeyan@linumiz.com X-Email-Count: 17 X-Org: HG=dishared_whb_net_legacy;ORG=directi; X-Source-Cap: bGludW1jbWM7aG9zdGdhdG9yO21kLWluLTc5LndlYmhvc3Rib3gubmV0 X-Local-Domain: yes X-CMAE-Envelope: MS4xfHR6jr5eT9AMSgN12GKwBe3cOOb9zRY+2Cy1X7fuVNzcks/JRRgaVrwSciateASsYGHQHtICX+njbwpPDsMAW96mBX0u087YR+jO+6hNuK1VpZnNo4GX cLcyaagtOSH8WRvr2xUv8KP4p9AwVEc/yt1mnLDHvv41rh5uFkyyqa+Xyq7FOJB5uLkBD4lqlB7JpPSaHm06Z8muwDWlWd5qZIM= Add i2s0 node and possible pinctrl for Rockchip RV1126 Signed-off-by: Karthikeyan Krishnasamy --- Notes: v2: - fix usage of underscores in node names .../arm/boot/dts/rockchip/rv1126-pinctrl.dtsi | 102 ++++++++++++++++++ arch/arm/boot/dts/rockchip/rv1126.dtsi | 26 +++++ 2 files changed, 128 insertions(+) diff --git a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi index be666b25b830..a3714ab0af32 100644 --- a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi +++ b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi @@ -123,6 +123,108 @@ i2c3m2_xfer: i2c3m2-xfer { <1 RK_PD7 3 &pcfg_pull_none>; }; }; + i2s0 { + i2s0m0_sclk_tx: i2s0m0-sclk-tx { + rockchip,pins = + /* i2s0_sclk_tx_m0 */ + <3 RK_PD0 1 &pcfg_pull_none>; + }; + i2s0m0_sclk_rx: i2s0m0-sclk-rx { + rockchip,pins = + /* i2s0_sclk_rx_m0 */ + <3 RK_PD1 1 &pcfg_pull_none>; + }; + i2s0m0_mclk: i2s0m0-mclk { + rockchip,pins = + /* i2s0_mclk_m0 */ + <3 RK_PD2 1 &pcfg_pull_none>; + }; + i2s0m0_lrck_tx: i2s0m0-lrck-tx { + rockchip,pins = + /* i2s0_lrck_tx_m0 */ + <3 RK_PD3 1 &pcfg_pull_none>; + }; + i2s0m0_lrck_rx: i2s0m0-lrck-rx { + rockchip,pins = + /* i2s0_lrck_rx_m0 */ + <3 RK_PD4 1 &pcfg_pull_none>; + }; + i2s0m0_sdi0: i2s0m0-sdi0 { + rockchip,pins = + /* i2s0_sdi0_m0 */ + <3 RK_PD6 1 &pcfg_pull_none>; + }; + i2s0m0_sdo0: i2s0m0-sdo0 { + rockchip,pins = + /* i2s0_sdo0_m0 */ + <3 RK_PD5 1 &pcfg_pull_none>; + }; + i2s0m0_sdo1_sdi3: i2s0m0-sdo1-sdi3 { + rockchip,pins = + /* i2s0_sdo1_sdi3_m0 */ + <3 RK_PD7 1 &pcfg_pull_none>; + }; + i2s0m0_sdo2_sdi2: i2s0m0-sdo2-sdi2 { + rockchip,pins = + /* i2s0_sdo2_sdi2_m0 */ + <4 RK_PA0 1 &pcfg_pull_none>; + }; + i2s0m0_sdo3_sdi1: i2s0m0-sdo3-sdi1 { + rockchip,pins = + /* i2s0_sdo3_sdi1_m0 */ + <4 RK_PA1 1 &pcfg_pull_none>; + }; + i2s0m1_sclk_tx: i2s0m1-sclk-tx { + rockchip,pins = + /* i2s0_sclk_tx_m1 */ + <3 RK_PA4 3 &pcfg_pull_none>; + }; + i2s0m1_sclk_rx: i2s0m1-sclk-rx { + rockchip,pins = + /* i2s0_sclk_rx_m1 */ + <3 RK_PB1 3 &pcfg_pull_none>; + }; + i2s0m1_mclk: i2s0m1-mclk { + rockchip,pins = + /* i2s0_mclk_m1 */ + <3 RK_PB0 3 &pcfg_pull_none>; + }; + i2s0m1_lrck_tx: i2s0m1-lrck-tx { + rockchip,pins = + /* i2s0_lrck_tx_m1 */ + <3 RK_PA5 3 &pcfg_pull_none>; + }; + i2s0m1_lrck_rx: i2s0m1-lrck-rx { + rockchip,pins = + /* i2s0_lrck_rx_m1 */ + <3 RK_PB2 3 &pcfg_pull_none>; + }; + i2s0m1_sdi0: i2s0m1-sdi0 { + rockchip,pins = + /* i2s0_sdi0_m1 */ + <3 RK_PA7 3 &pcfg_pull_none>; + }; + i2s0m1_sdo0: i2s0m1-sdo0 { + rockchip,pins = + /* i2s0_sdo0_m1 */ + <3 RK_PA6 3 &pcfg_pull_none>; + }; + i2s0m1_sdo1_sdi3: i2s0m1-sdo1-sdi3 { + rockchip,pins = + /* i2s0_sdo1_sdi3_m1 */ + <3 RK_PB3 3 &pcfg_pull_none>; + }; + i2s0m1_sdo2_sdi2: i2s0m1-sdo2-sdi2 { + rockchip,pins = + /* i2s0_sdo2_sdi2_m1 */ + <3 RK_PB4 3 &pcfg_pull_none>; + }; + i2s0m1_sdo3_sdi1: i2s0m1-sdo3-sdi1 { + rockchip,pins = + /* i2s0_sdo3_sdi1_m1 */ + <3 RK_PB5 3 &pcfg_pull_none>; + }; + }; pwm2 { /omit-if-no-ref/ pwm2m0_pins: pwm2m0-pins { diff --git a/arch/arm/boot/dts/rockchip/rv1126.dtsi b/arch/arm/boot/dts/rockchip/rv1126.dtsi index 59de848c9a83..09ecde58c553 100644 --- a/arch/arm/boot/dts/rockchip/rv1126.dtsi +++ b/arch/arm/boot/dts/rockchip/rv1126.dtsi @@ -434,6 +434,32 @@ timer0: timer@ff660000 { clock-names = "pclk", "timer"; }; + i2s0: i2s@ff800000 { + compatible = "rockchip,rv1126-i2s-tdm"; + reg = <0xff800000 0x1000>; + interrupts = ; + clocks = <&cru MCLK_I2S0_TX>, <&cru MCLK_I2S0_RX>, <&cru HCLK_I2S0>; + clock-names = "mclk_tx", "mclk_rx", "hclk"; + dmas = <&dmac 20>, <&dmac 19>; + dma-names = "tx", "rx"; + resets = <&cru SRST_I2S0_TX_M>, <&cru SRST_I2S0_RX_M>; + reset-names = "tx-m", "rx-m"; + rockchip,grf = <&grf>; + #sound-dai-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&i2s0m0_sclk_tx>, + <&i2s0m0_sclk_rx>, + <&i2s0m0_mclk>, + <&i2s0m0_lrck_tx>, + <&i2s0m0_lrck_rx>, + <&i2s0m0_sdi0>, + <&i2s0m0_sdo0>, + <&i2s0m0_sdo1_sdi3>, + <&i2s0m0_sdo2_sdi2>, + <&i2s0m0_sdo3_sdi1>; + status = "disabled"; + }; + vop: vop@ffb00000 { compatible = "rockchip,rv1126-vop"; reg = <0xffb00000 0x200>, <0xffb00a00 0x400>; From patchwork Tue Sep 3 10:52:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: karthikeyan X-Patchwork-Id: 1979962 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=linumiz.com header.i=@linumiz.com header.a=rsa-sha256 header.s=default header.b=EAkRSFQe; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2604:1380:40f1:3f00::1; helo=sy.mirrors.kernel.org; envelope-from=linux-rtc+bounces-1847-incoming=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from sy.mirrors.kernel.org (sy.mirrors.kernel.org [IPv6:2604:1380:40f1:3f00::1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4WyjF93mCFz1yfv for ; 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bh=BB7BCR3IrZVjn5A7a28pahM3Ou0lCzEKg+FXu9n6lXo=; b=EAkRSFQe8p1cZevQko3KUfpKRs oluuzlUXUx7GuXbrDOarfc2rFCAZKLTp/ujyQ8YUL3HmhJLOt/YK524RKQOdBoafo3yfojYenn59F fB8ihYrJ7Y2opaw5sU1eGc+YqyZhLHb45Nz15kSzcAAi0J6zyj+W7utybz3MubbPc1FiE+wN0qyOk FAq1sbHlDE3VIrMozx2n0ZFKD8dQG7Ig6NSXrtWXh965e7bnmtUgL9t6sjEjUa+tF1tKaW7mSnz5w R78kyNfI9kJNjMe0DyjPX4Tw7rNssUYH08tOEgImjlI0AiavCr5d4tMoWgFsGNrYr+/00FE+JXvuk 06dXCVgA==; Received: from [122.165.245.213] (port=41440 helo=localhost.localdomain) by md-in-79.webhostbox.net with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96.2) (envelope-from ) id 1slR9h-000Elu-24; Tue, 03 Sep 2024 16:23:01 +0530 From: Karthikeyan Krishnasamy To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, heiko@sntech.de, alexandre.belloni@bootlin.com Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rtc@vger.kernel.org, Karthikeyan Krishnasamy Subject: [PATCH v2 3/8] ARM: dts: rockchip: Add pwm node for RV1126 Date: Tue, 3 Sep 2024 16:22:40 +0530 Message-Id: <20240903105245.715899-4-karthikeyan@linumiz.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240903105245.715899-1-karthikeyan@linumiz.com> References: <20240903105245.715899-1-karthikeyan@linumiz.com> Precedence: bulk X-Mailing-List: linux-rtc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - md-in-79.webhostbox.net X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - linumiz.com X-BWhitelist: no X-Source-IP: 122.165.245.213 X-Source-L: No X-Exim-ID: 1slR9h-000Elu-24 X-Source: X-Source-Args: X-Source-Dir: X-Source-Sender: (localhost.localdomain) [122.165.245.213]:41440 X-Source-Auth: karthikeyan@linumiz.com X-Email-Count: 32 X-Org: HG=dishared_whb_net_legacy;ORG=directi; X-Source-Cap: bGludW1jbWM7aG9zdGdhdG9yO21kLWluLTc5LndlYmhvc3Rib3gubmV0 X-Local-Domain: yes X-CMAE-Envelope: MS4xfJNrWuQbMJUyXGRSiKQpLDOLIcu4igVsAsrPAUgZ5MQbYDk6SghsHdaIL4a+/fKOo9hSqlVH0n5kbA76vK/84PT4RgKSCC1WOnIVEAY8Dc1n6TwlnlFc aB3W6vwYmiEMh04270UaMOp/qyDhyMAqrtcpS+QjUKUxQ6vcZM6y8nOEAXkKVAU91bTdkg8kGC03++to1UuuBF55XtGFsk+UMbE= Add missing pwm node and possible pinctrl for Rockchip RV1126 Signed-off-by: Karthikeyan Krishnasamy --- Notes: v2: - No change .../arm/boot/dts/rockchip/rv1126-pinctrl.dtsi | 128 ++++++++++++++++++ arch/arm/boot/dts/rockchip/rv1126.dtsi | 110 +++++++++++++++ 2 files changed, 238 insertions(+) diff --git a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi index a3714ab0af32..9db93b495448 100644 --- a/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi +++ b/arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi @@ -225,6 +225,28 @@ i2s0m1_sdo3_sdi1: i2s0m1-sdo3-sdi1 { <3 RK_PB5 3 &pcfg_pull_none>; }; }; + pwm0 { + /omit-if-no-ref/ + pwm0m0_pins: pwm0m0-pins { + rockchip,pins = + /* pwm0_pin_m0 */ + <0 RK_PB6 3 &pcfg_pull_none>; + }; + /omit-if-no-ref/ + pwm0m1_pins: pwm0m1-pins { + rockchip,pins = + /* pwm0_pin_m1 */ + <2 RK_PB3 5 &pcfg_pull_none>; + }; + }; + pwm1 { + /omit-if-no-ref/ + pwm1m0_pins: pwm1m0-pins { + rockchip,pins = + /* pwm1_pin_m0 */ + <0 RK_PB7 3 &pcfg_pull_none>; + }; + }; pwm2 { /omit-if-no-ref/ pwm2m0_pins: pwm2m0-pins { @@ -232,6 +254,106 @@ pwm2m0_pins: pwm2m0-pins { /* pwm2_pin_m0 */ <0 RK_PC0 3 &pcfg_pull_none>; }; + /omit-if-no-ref/ + pwm2m1_pins: pwm2m1-pins { + rockchip,pins = + /* pwm2_pin_m1 */ + <2 RK_PB1 5 &pcfg_pull_none>; + }; + }; + pwm3 { + /omit-if-no-ref/ + pwm3m0_pins: pwm3m0-pins { + rockchip,pins = + /* pwm3_pin_m0 */ + <0 RK_PC1 3 &pcfg_pull_none>; + }; + }; + pwm4 { + /omit-if-no-ref/ + pwm4m0_pins: pwm4m0-pins { + rockchip,pins = + /* pwm4_pin_m0 */ + <0 RK_PC2 3 &pcfg_pull_none>; + }; + }; + pwm5 { + /omit-if-no-ref/ + pwm5m0_pins: pwm5m0-pins { + rockchip,pins = + /* pwm5_pin_m0 */ + <0 RK_PC3 3 &pcfg_pull_none>; + }; + }; + pwm6 { + /omit-if-no-ref/ + pwm6m0_pins: pwm6m0-pins { + rockchip,pins = + /* pwm6_pin_m0 */ + <0 RK_PB2 3 &pcfg_pull_none>; + }; + /omit-if-no-ref/ + pwm6m1_pins: pwm6m1-pins { + rockchip,pins = + /* pwm6_pin_m1 */ + <2 RK_PD4 5 &pcfg_pull_none>; + }; + }; + pwm7 { + /omit-if-no-ref/ + pwm7m0_pins: pwm7m0-pins { + rockchip,pins = + /* pwm7_pin_m0 */ + <0 RK_PB1 3 &pcfg_pull_none>; + }; + /omit-if-no-ref/ + pwm7m1_pins: pwm7m1-pins { + rockchip,pins = + /* pwm7_pin_m1 */ + <3 RK_PA0 5 &pcfg_pull_none>; + }; + }; + pwm8 { + /omit-if-no-ref/ + pwm8m0_pins: pwm8m0-pins { + rockchip,pins = + /* pwm8_pin_m0 */ + <3 RK_PA4 6 &pcfg_pull_none>; + }; + /omit-if-no-ref/ + pwm8m1_pins: pwm8m1-pins { + rockchip,pins = + /* pwm8_pin_m1 */ + <2 RK_PD7 5 &pcfg_pull_none>; + }; + }; + pwm9 { + /omit-if-no-ref/ + pwm9m0_pins: pwm9m0-pins { + rockchip,pins = + /* pwm9_pin_m0 */ + <3 RK_PA5 6 &pcfg_pull_none>; + }; + /omit-if-no-ref/ + pwm9m1_pins: pwm9m1-pins { + rockchip,pins = + /* pwm9_pin_m1 */ + <2 RK_PD6 5 &pcfg_pull_none>; + }; + }; + pwm10 { + /omit-if-no-ref/ + pwm10m0_pins: pwm10m0-pins { + rockchip,pins = + /* pwm10_pin_m0 */ + <3 RK_PA6 6 &pcfg_pull_none>; + }; + /omit-if-no-ref/ + pwm10m1_pins: pwm10m1-pins { + rockchip,pins = + /* pwm10_pin_m1 */ + <2 RK_PD5 5 &pcfg_pull_none>; + }; }; pwm11 { /omit-if-no-ref/ @@ -240,6 +362,12 @@ pwm11m0_pins: pwm11m0-pins { /* pwm11_pin_m0 */ <3 RK_PA7 6 &pcfg_pull_none>; }; + /omit-if-no-ref/ + pwm11m1_pins: pwm11m1-pins { + rockchip,pins = + /* pwm11_pin_m1 */ + <3 RK_PA1 5 &pcfg_pull_none>; + }; }; rgmii { /omit-if-no-ref/ diff --git a/arch/arm/boot/dts/rockchip/rv1126.dtsi b/arch/arm/boot/dts/rockchip/rv1126.dtsi index 09ecde58c553..abf442804d27 100644 --- a/arch/arm/boot/dts/rockchip/rv1126.dtsi +++ b/arch/arm/boot/dts/rockchip/rv1126.dtsi @@ -269,6 +269,28 @@ uart1: serial@ff410000 { status = "disabled"; }; + pwm0: pwm@ff430000 { + compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm"; + reg = <0xff430000 0x10>; + clock-names = "pwm", "pclk"; + clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>; + pinctrl-names = "default"; + pinctrl-0 = <&pwm0m0_pins>; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm1: pwm@ff430010 { + compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm"; + reg = <0xff430010 0x10>; + clock-names = "pwm", "pclk"; + clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>; + pinctrl-names = "default"; + pinctrl-0 = <&pwm1m0_pins>; + #pwm-cells = <3>; + status = "disabled"; + }; + pwm2: pwm@ff430020 { compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm"; reg = <0xff430020 0x10>; @@ -280,6 +302,61 @@ pwm2: pwm@ff430020 { status = "disabled"; }; + pwm3: pwm@ff430030 { + compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm"; + reg = <0xff430030 0x10>; + clock-names = "pwm", "pclk"; + clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>; + pinctrl-names = "default"; + pinctrl-0 = <&pwm3m0_pins>; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm4: pwm@ff440000 { + compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm"; + reg = <0xff440000 0x10>; + clock-names = "pwm", "pclk"; + clocks = <&pmucru CLK_PWM1>, <&pmucru PCLK_PWM1>; + pinctrl-names = "default"; + pinctrl-0 = <&pwm4m0_pins>; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm5: pwm@ff440010 { + compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm"; + reg = <0xff440010 0x10>; + clock-names = "pwm", "pclk"; + clocks = <&pmucru CLK_PWM1>, <&pmucru PCLK_PWM1>; + pinctrl-names = "default"; + pinctrl-0 = <&pwm5m0_pins>; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm6: pwm@ff440020 { + compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm"; + reg = <0xff440020 0x10>; + clock-names = "pwm", "pclk"; + clocks = <&pmucru CLK_PWM1>, <&pmucru PCLK_PWM1>; + pinctrl-names = "default"; + pinctrl-0 = <&pwm6m0_pins>; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm7: pwm@ff440030 { + compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm"; + reg = <0xff440030 0x10>; + clock-names = "pwm", "pclk"; + clocks = <&pmucru CLK_PWM1>, <&pmucru PCLK_PWM1>; + pinctrl-names = "default"; + pinctrl-0 = <&pwm7m0_pins>; + #pwm-cells = <3>; + status = "disabled"; + }; + pmucru: clock-controller@ff480000 { compatible = "rockchip,rv1126-pmucru"; reg = <0xff480000 0x1000>; @@ -323,6 +400,39 @@ i2c3: i2c@ff520000 { rockchip,grf = <&pmugrf>; }; + pwm8: pwm@ff550000 { + compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm"; + reg = <0xff550000 0x10>; + clock-names = "pwm", "pclk"; + clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>; + pinctrl-0 = <&pwm8m0_pins>; + pinctrl-names = "default"; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm9: pwm@ff550010 { + compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm"; + reg = <0xff550010 0x10>; + clock-names = "pwm", "pclk"; + clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>; + pinctrl-0 = <&pwm9m0_pins>; + pinctrl-names = "default"; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm10: pwm@ff550020 { + compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm"; + reg = <0xff550020 0x10>; + clock-names = "pwm", "pclk"; + clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>; + pinctrl-0 = <&pwm10m0_pins>; + pinctrl-names = "default"; + #pwm-cells = <3>; + status = "disabled"; + }; + pwm11: pwm@ff550030 { compatible = "rockchip,rv1126-pwm", "rockchip,rk3328-pwm"; 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X-Source-Cap: bGludW1jbWM7aG9zdGdhdG9yO21kLWluLTc5LndlYmhvc3Rib3gubmV0 X-Local-Domain: yes X-CMAE-Envelope: MS4xfGm6OWJILFOoWaWX9Swa9yfm46y/zHBWXzVTVZ57Sgo9uRsFYmwbbC6PEeKyjg8NfszcfJQh8XHsumDm6ZieOO6UELBCGkAmyuXbyWgCRAiWzncwhaF0 fmdVABB1TU3zPEI38Q/pKphBODOTW1JnDKXlcFZZ4+OeETSl4F/cKhR1YlJb/8u2zHbDtTX7Rtn+ZUJ9xp9Ws0BqoNPAAo5jkOA= Add watchdog node for Rockchip RV1126 Signed-off-by: Karthikeyan Krishnasamy --- Notes: v2: - No change arch/arm/boot/dts/rockchip/rv1126.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/rockchip/rv1126.dtsi b/arch/arm/boot/dts/rockchip/rv1126.dtsi index abf442804d27..283985608428 100644 --- a/arch/arm/boot/dts/rockchip/rv1126.dtsi +++ b/arch/arm/boot/dts/rockchip/rv1126.dtsi @@ -544,6 +544,14 @@ timer0: timer@ff660000 { clock-names = "pclk", "timer"; }; + wdt: watchdog@ff680000 { + compatible = "snps,dw-wdt"; + reg = <0xff680000 0x100>; + clocks = <&cru PCLK_WDT>; + interrupts = ; + status = "disabled"; + }; + i2s0: i2s@ff800000 { compatible = "rockchip,rv1126-i2s-tdm"; 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X-Source-Cap: bGludW1jbWM7aG9zdGdhdG9yO21kLWluLTc5LndlYmhvc3Rib3gubmV0 X-Local-Domain: yes X-CMAE-Envelope: MS4xfC6Ks6SWbFMat9F8VPFzZWn45eYVL100V/P1aWZDwtG6AIL1PMYnDTA4cNRO4WxYnZf3YEQPN0o+Qq8x0I0nByzLhGtYKf9sLnScBcL3skoRSQ4yPhqf 3JTbl70rVGI7KOMhPhCmowxDMk2gPgakJQI/za3RcvmK4cLbbkZYywtZrvQ2LBeyh3I6w/tZ6SioaVL3h+CMMpbtMlk6hznRZlY= consume clkout from rv3028 rtc which is able to provide different clock frequency upon configuration Signed-off-by: Karthikeyan Krishnasamy --- Notes: v2: - fix commit message subject Documentation/devicetree/bindings/rtc/microcrystal,rv3028.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/rtc/microcrystal,rv3028.yaml b/Documentation/devicetree/bindings/rtc/microcrystal,rv3028.yaml index 5ade5dfad048..cda8ad7c1203 100644 --- a/Documentation/devicetree/bindings/rtc/microcrystal,rv3028.yaml +++ b/Documentation/devicetree/bindings/rtc/microcrystal,rv3028.yaml @@ -22,6 +22,9 @@ properties: interrupts: maxItems: 1 + "#clock-cells": + const: 0 + trickle-resistor-ohms: enum: - 3000 From patchwork Tue Sep 3 10:52:43 2024 Content-Type: text/plain; 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Ltd. vendor prefixes https://www.relfor.com/ Signed-off-by: Karthikeyan Krishnasamy --- Notes: v2: - No change Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index a70ce43b3dc0..7d10ac7d6800 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1220,6 +1220,8 @@ patternProperties: description: Unisoc Communications, Inc. "^realtek,.*": description: Realtek Semiconductor Corp. + "^relfor,.*": + description: Relfor Labs Pvt. Ltd. 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X-Source-Cap: bGludW1jbWM7aG9zdGdhdG9yO21kLWluLTc5LndlYmhvc3Rib3gubmV0 X-Local-Domain: yes X-CMAE-Envelope: MS4xfNX3NDUvALNH3d6YLDl+wbyiAVQTCRm31vbrhjG/tIzROcD8sfCgXNirjfjesbCoeCupL5HwYOns5dp3J8mX+JOTWFSaQokqMEwP4RJh5CustHposoNd lu5HFbYbYOFbZ3yo3UDloKBKkfViAcEkBNGYB9IgIxN1m96BDziBj3aCl+y03IAPFupBgc/rQpDl8+eUOiCKJ8mc0fq/xUI67n0= Saib is an consumer electronics board from Relfor labs Features: - Rockchip RV1109 - 1GB DDR4 - 4GB eMMC - Realtek RTL8821CS Wi-Fi/BT - IR transmitter/receiver - RV3028 RTC - Switch - User leds Add support for it. Signed-off-by: Karthikeyan Krishnasamy --- Notes: v2: - Drop status=okay in new nodes arch/arm/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rv1109-relfor-saib.dts | 429 ++++++++++++++++++ 2 files changed, 430 insertions(+) create mode 100644 arch/arm/boot/dts/rockchip/rv1109-relfor-saib.dts diff --git a/arch/arm/boot/dts/rockchip/Makefile b/arch/arm/boot/dts/rockchip/Makefile index ab4cd9aab722..716f5540e438 100644 --- a/arch/arm/boot/dts/rockchip/Makefile +++ b/arch/arm/boot/dts/rockchip/Makefile @@ -2,6 +2,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ rv1108-elgin-r1.dtb \ rv1108-evb.dtb \ + rv1109-relfor-saib.dtb \ rv1109-sonoff-ihost.dtb \ rv1126-edgeble-neu2-io.dtb \ rv1126-sonoff-ihost.dtb \ diff --git a/arch/arm/boot/dts/rockchip/rv1109-relfor-saib.dts b/arch/arm/boot/dts/rockchip/rv1109-relfor-saib.dts new file mode 100644 index 000000000000..97235118923b --- /dev/null +++ b/arch/arm/boot/dts/rockchip/rv1109-relfor-saib.dts @@ -0,0 +1,429 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2024 Relfor Labs Pvt. Ltd. + */ + + +/dts-v1/; +#include "rv1109.dtsi" +#include +#include + +/ { + model = "Rockchip RV1109 Relfor Saib Board"; + compatible = "relfor,saib", "rockchip,rv1109"; + + vcc5v0_sys: vcc5v0-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + /* Power sequence 1 */ + vcc_0v8: vcc-0v8 { + compatible = "regulator-fixed"; + regulator-name = "vcc_0v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <800000>; + startup-delay-us = <150>; + regulator-max-microvolt = <800000>; + vin-supply = <&vcc5v0_sys>; + }; + + /* Power sequence 2 */ + vdd_npu_vepu: vdd-npu-vepu { + compatible = "pwm-regulator"; + pwms = <&pwm1 0 5000 1>; + regulator-name = "vdd_npu_vepu"; + regulator-min-microvolt = <650000>; + regulator-max-microvolt = <950000>; + regulator-always-on; + regulator-boot-on; + regulator-settling-time-up-us = <18000>; + pwm-supply = <&vcc3v3_sys>; + vin-supply = <&vcc5v0_sys>; + }; + + vdd_arm: vdd-arm { + compatible = "pwm-regulator"; + pwms = <&pwm0 0 5000 1>; + regulator-name = "vdd_arm"; + regulator-min-microvolt = <720000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-boot-on; + regulator-settling-time-up-us = <18000>; + pwm-supply = <&vcc3v3_sys>; + vin-supply = <&vcc5v0_sys>; + }; + + /* Power sequence 3 */ + vcc_1v8: vcc-1v8 { + compatible = "regulator-fixed"; + regulator-name = "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + startup-delay-us = <51000>; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc5v0_sys>; + }; + + /* Power sequence 4 */ + vcc_1v2_ddr: vcc-1v2-ddr { + compatible = "regulator-fixed"; + regulator-name = "vcc_1v2_ddr"; + regulator-always-on; + regulator-boot-on; + startup-delay-us = <75000>; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + vin-supply = <&vcc5v0_sys>; + }; + + /* Power sequence 5 */ + vcc3v3_sys: vcc3v3-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + startup-delay-us = <75000>; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc5v0_sys>; + }; + + /* LDO 2.5V */ + vcc_2v5_ddr: vcc-2v5-ddr { + compatible = "regulator-fixed"; + regulator-name = "vcc_2v5_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + vin-supply = <&vcc3v3_sys>; + }; + + /* Power IR transmitter */ + vcc1v8_ir: vcc1v8-ir { + compatible = "regulator-fixed"; + regulator-name = "vcc1v8_ir"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc5v0_sys>; + }; + + sdio_pwrseq: pwrseq-sdio { + compatible = "mmc-pwrseq-simple"; + clocks = <&rtc0>; + clock-names = "ext_clock"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_enable_h>; + reset-gpios = <&gpio1 RK_PD0 GPIO_ACTIVE_LOW>; + }; + + ir_receiver: ir-receiver { + compatible = "gpio-ir-receiver"; + gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&ir_rx>; + }; + + ir_transmitter: ir-transmitter { + compatible = "pwm-ir-tx"; + pwms = <&pwm11 0 10000000 1>; + }; + + gpio-keys { + compatible = "gpio-keys"; + + button { + gpios = <&gpio2 RK_PA7 GPIO_ACTIVE_HIGH>; + linux,code = ; + label = "GPIO User Switch"; + linux,input-type = <1>; + }; + }; + + led-controller { + compatible = "pwm-leds-multicolor"; + + multi-led { + color = ; + function = LED_FUNCTION_INDICATOR; + max-brightness = <65535>; + + led-0 { + active-low; + color = ; + pwms = <&pwm9 0 50000 0>; + }; + + led-1 { + active-low; + color = ; + pwms = <&pwm6 0 50000 0>; + }; + + led-2 { + active-low; + color = ; + pwms = <&pwm10 0 50000 0>; + }; + }; + }; + + pwm-leds { + compatible = "pwm-leds"; + + led-0 { + pwms = <&pwm2 0 50000 0>; + max-brightness = <255>; + linux,default-trigger = "none"; + }; + + led-1 { + pwms = <&pwm8 0 50000 0>; + max-brightness = <0>; + linux,default-trigger = "none"; + }; + + led-2 { + pwms = <&pwm5 0 50000 0>; + max-brightness = <255>; + linux,default-trigger = "none"; + }; + }; + + thermal_sensor1: thermal-sensor1 { + compatible = "generic-adc-thermal"; + #thermal-sensor-cells = <0>; + io-channels = <&saradc 1>; + io-channel-names = "sensor-channel"; + temperature-lookup-table = <(-40000) 826 + 85000 609>; + }; + + thermal_sensor2: thermal-sensor2 { + compatible = "generic-adc-thermal"; + #thermal-sensor-cells = <0>; + io-channels = <&saradc 2>; + io-channel-names = "sensor-channel"; + temperature-lookup-table = <(-40000) 826 + 85000 609>; + }; +}; + +&cpu0 { + cpu-supply = <&vdd_arm>; +}; + +&cpu1 { + cpu-supply = <&vdd_arm>; +}; + +&emmc { + bus-width = <8>; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_bus8 &emmc_cmd &emmc_clk>; + rockchip,default-sample-phase = <90>; + vmmc-supply = <&vcc3v3_sys>; + status = "okay"; +}; + +&i2c3 { + status = "okay"; + pinctrl-0 = <&i2c3m2_xfer>; + pinctrl-names = "default"; + + rtc0: rtc@52 { + compatible = "microcrystal,rv3028"; + reg = <0x52>; + #clock-cells = <0>; + interrupt-parent = <&gpio2>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&rtc_int>; + }; +}; + +&i2s0 { + /delete-property/ pinctrl-0; + status = "okay"; + rockchip,trcm-sync-rx-only; + pinctrl-names = "default"; + pinctrl-0 = <&i2s0m0_sclk_rx>, + <&i2s0m0_lrck_rx>, + <&i2s0m0_sdi0>; +}; + +&pinctrl { + bluetooth-pins { + bt_reset: bt-reset { + rockchip,pins = + <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + bt_wake_dev: bt-wake-dev { + rockchip,pins = + <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + bt_wake_host: bt-wake-host { + rockchip,pins = + <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; + + buttons { + switch: switch { + rockchip,pins = <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + ir { + ir_rx: ir-rx { + rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pwm { + pwm0m0_pins_pull_up: pwm0m0-pins-pull-up { + rockchip,pins = + /* pwm0_pin_m0 */ + <0 RK_PB6 3 &pcfg_pull_up>; + }; + pwm1m0_pins_pull_up: pwm1m0-pins-pull-up { + rockchip,pins = + /* pwm1_pin_m0 */ + <0 RK_PB7 3 &pcfg_pull_up>; + }; + }; + + rtc { + rtc_int: rtc-int { + rockchip,pins = <2 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + sdio-pwrseq { + wifi_enable_h: wifi-enable-h { + rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pmu_io_domains { + status = "okay"; + pmuio0-supply = <&vcc3v3_sys>; + pmuio1-supply = <&vcc3v3_sys>; + vccio4-supply = <&vcc3v3_sys>; + vccio5-supply = <&vcc3v3_sys>; + vccio6-supply = <&vcc3v3_sys>; + vccio7-supply = <&vcc3v3_sys>; +}; + +&pwm0 { + /delete-property/ pinctrl-0; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pwm0m0_pins_pull_up>; +}; + +&pwm1 { + /delete-property/ pinctrl-0; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pwm1m0_pins_pull_up>; +}; + +&pwm2 { + /delete-property/ pinctrl-0; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pwm2m1_pins>; +}; + +&pwm5 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pwm5m0_pins>; +}; + +&pwm6 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pwm6m0_pins>; +}; + +&pwm8 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pwm8m1_pins>; +}; + +&pwm9 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pwm9m1_pins>; +}; + +&pwm10 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pwm10m1_pins>; +}; + +&pwm11 { + /delete-property/ pinctrl-0; + status = "okay"; + pinctrl-0 = <&pwm11m1_pins>; + pinctrl-names = "default"; +}; + +&saradc { + status = "okay"; + vref-supply = <&vcc_1v8>; +}; + +&sdio { + bus-width = <4>; + cap-sd-highspeed; + cap-sdio-irq; + max-frequency = <100000000>; + mmc-pwrseq = <&sdio_pwrseq>; + no-mmc; + no-sd; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc1_clk &sdmmc1_cmd &sdmmc1_bus4>; + sd-uhs-sdr104; + vmmc-supply = <&vcc3v3_sys>; + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_xfer &uart0_ctsn &uart0_rtsn>; + status = "okay"; + + bluetooth { + compatible = "realtek,rtl8822cs-bt"; + device-wake-gpios = <&gpio1 RK_PC5 GPIO_ACTIVE_HIGH>; + enable-gpios = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; + host-wake-gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&bt_reset>, <&bt_wake_dev>, <&bt_wake_host>; + pinctrl-names = "default"; + }; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2m1_xfer>; + status = "okay"; +};