From patchwork Wed May 2 19:54:48 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergei Shtylyov X-Patchwork-Id: 907678 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=cogentembedded.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=cogentembedded-com.20150623.gappssmtp.com header.i=@cogentembedded-com.20150623.gappssmtp.com header.b="E/rDlOQt"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40bpsB6dTzz9s02 for ; Thu, 3 May 2018 05:54:54 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751007AbeEBTyx (ORCPT ); Wed, 2 May 2018 15:54:53 -0400 Received: from mail-lf0-f67.google.com ([209.85.215.67]:40449 "EHLO mail-lf0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750945AbeEBTyv (ORCPT ); Wed, 2 May 2018 15:54:51 -0400 Received: by mail-lf0-f67.google.com with SMTP id j16-v6so22636523lfb.7 for ; Wed, 02 May 2018 12:54:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cogentembedded-com.20150623.gappssmtp.com; s=20150623; h=subject:from:to:cc:references:organization:message-id:date :user-agent:mime-version:in-reply-to:content-language :content-transfer-encoding; bh=/5UzfkpyGtaxrUMTntqrt5SL/lS6p4CrcmY2Nxua+Vk=; b=E/rDlOQtfJatdF6K9nMfdDGwOx8r4zXPifI7Mz92HMpG7oJb4d5r/OwKmHPHRLTJ9F Xrb77zn8MyiI/67DslNIb81t+JvlMwBjXC+0MRpaa9JvmOjGsKhkpqoW8WEn4f+eUyTy P64BTCW7LNg3dZn5S77SRA3yv9L+QrzBVbYi1r5jkp91/WQC5asz3XE4vh1iHEaHE1L6 G5idcYfCY75H6z0v6K8DLT+EET2CV1Q5E6vezZ2hJf/7amXOrpbCJA04KfKEmHeCGS6e jkz0TYhiCna21QJOrYymb9zEOxcMSVm1A5WYaZuMIIUSsxmyQ8J8O0raL89p4+dVoziz Zq6w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:from:to:cc:references:organization :message-id:date:user-agent:mime-version:in-reply-to :content-language:content-transfer-encoding; bh=/5UzfkpyGtaxrUMTntqrt5SL/lS6p4CrcmY2Nxua+Vk=; b=g/ZN9iYcpbjGhl9bmO6NGlDAt/zopZJvfvll5qPxrBQZhbc8BRcYb9fzA5HG7b5rCA JDjtvWjgmbBu31Iz8rO33EKgbh6E/S1eAKZxW9egklJXUQxEmtkRmuz8o9wr1gVPn8s1 y9NU4EgM/4Th6Gh4a6X6T9q6CaqlMNXJIZwr+NnCyu8POSlvpCPZYodCLo8OE3z4Sgx0 EQN4/APfPAKxoLwY9M8tUpB4aZWF4PLN9Sw9Y1KHRZ/NzXegiZlzbwWDqy25IxNAk4Pm xevKx9yv/yl4pItRvefmkkWp2QzFdp7R85DBw/8j3eNe59trzPSCbJH08fBCLV2MVslJ UumA== X-Gm-Message-State: ALQs6tAq9Q606iTkkFg/Tw3gr0aArL7jMWhzGMckaAhRJFa+CRKZaNgN dVKDyVB3/0vIPasHTdBYBQuBuY8vJdk= X-Google-Smtp-Source: AB8JxZqJpNiagWKwQr9o0ghAsitwkFds7jSzWFK47WZDZm2KyLiR5quZqSN7mP6eaJJ5fdR4X0AI9w== X-Received: by 2002:a19:1fc6:: with SMTP id f189-v6mr4208785lff.98.1525290889828; Wed, 02 May 2018 12:54:49 -0700 (PDT) Received: from wasted.cogentembedded.com ([31.173.87.190]) by smtp.gmail.com with ESMTPSA id z78-v6sm2228765lje.11.2018.05.02.12.54.48 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 02 May 2018 12:54:48 -0700 (PDT) Subject: [PATCH 1/2] sh_eth: use TSU register accessors for TSU_POST From: Sergei Shtylyov To: netdev@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, linux-sh@vger.kernel.org References: <4a17ab65-4d9c-897e-c340-7d86e0296f2f@cogentembedded.com> Organization: Cogent Embedded Message-ID: <297c4665-de06-ddf2-5c97-4d56c781b299@cogentembedded.com> Date: Wed, 2 May 2018 22:54:48 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.2.1 MIME-Version: 1.0 In-Reply-To: <4a17ab65-4d9c-897e-c340-7d86e0296f2f@cogentembedded.com> Content-Language: en-MW Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org There's no particularly good reason TSU_POST registers get accessed circumventing sh_eth_tsu_{read|write}() -- start using those, removing (badly named) sh_eth_tsu_get_post_reg_offset(), while at it... Signed-off-by: Sergei Shtylyov --- drivers/net/ethernet/renesas/sh_eth.c | 20 ++++++-------------- 1 file changed, 6 insertions(+), 14 deletions(-) Index: net-next/drivers/net/ethernet/renesas/sh_eth.c =================================================================== --- net-next.orig/drivers/net/ethernet/renesas/sh_eth.c +++ net-next/drivers/net/ethernet/renesas/sh_eth.c @@ -2610,12 +2610,6 @@ static int sh_eth_change_mtu(struct net_ } /* For TSU_POSTn. Please refer to the manual about this (strange) bitfields */ -static void *sh_eth_tsu_get_post_reg_offset(struct sh_eth_private *mdp, - int entry) -{ - return sh_eth_tsu_get_offset(mdp, TSU_POST1) + (entry / 8 * 4); -} - static u32 sh_eth_tsu_get_post_mask(int entry) { return 0x0f << (28 - ((entry % 8) * 4)); @@ -2630,27 +2624,25 @@ static void sh_eth_tsu_enable_cam_entry_ int entry) { struct sh_eth_private *mdp = netdev_priv(ndev); + int reg = TSU_POST1 + entry / 8; u32 tmp; - void *reg_offset; - reg_offset = sh_eth_tsu_get_post_reg_offset(mdp, entry); - tmp = ioread32(reg_offset); - iowrite32(tmp | sh_eth_tsu_get_post_bit(mdp, entry), reg_offset); + tmp = sh_eth_tsu_read(mdp, reg); + sh_eth_tsu_write(mdp, tmp | sh_eth_tsu_get_post_bit(mdp, entry), reg); } static bool sh_eth_tsu_disable_cam_entry_post(struct net_device *ndev, int entry) { struct sh_eth_private *mdp = netdev_priv(ndev); + int reg = TSU_POST1 + entry / 8; u32 post_mask, ref_mask, tmp; - void *reg_offset; - reg_offset = sh_eth_tsu_get_post_reg_offset(mdp, entry); post_mask = sh_eth_tsu_get_post_mask(entry); ref_mask = sh_eth_tsu_get_post_bit(mdp, entry) & ~post_mask; - tmp = ioread32(reg_offset); - iowrite32(tmp & ~post_mask, reg_offset); + tmp = sh_eth_tsu_read(mdp, reg); + sh_eth_tsu_write(mdp, tmp & ~post_mask, reg); /* If other port enables, the function returns "true" */ return tmp & ref_mask; From patchwork Wed May 2 19:55:52 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergei Shtylyov X-Patchwork-Id: 907679 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=cogentembedded.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=cogentembedded-com.20150623.gappssmtp.com header.i=@cogentembedded-com.20150623.gappssmtp.com header.b="ySPO/I6H"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40bptR3wMfz9s02 for ; Thu, 3 May 2018 05:55:59 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751154AbeEBTz5 (ORCPT ); Wed, 2 May 2018 15:55:57 -0400 Received: from mail-lf0-f68.google.com ([209.85.215.68]:43515 "EHLO mail-lf0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750945AbeEBTzz (ORCPT ); Wed, 2 May 2018 15:55:55 -0400 Received: by mail-lf0-f68.google.com with SMTP id g12-v6so22626992lfb.10 for ; Wed, 02 May 2018 12:55:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cogentembedded-com.20150623.gappssmtp.com; s=20150623; h=subject:from:to:cc:references:organization:message-id:date :user-agent:mime-version:in-reply-to:content-language :content-transfer-encoding; bh=5/VlcX46lvl8vy7grYetsO5hoYtmn5nqnISOFUuQyJ8=; b=ySPO/I6HkR+2Aje1lsRmXnYFW7DpyXPYArkp/hPpdo03B147+N3sZUpAathy3tLhIq V4VcPEB7fdX8zpz2xjTUtA6W54M2MnYsrEyk6UBzoWvQvJIDFqZOV8zUiPOU/uXGR1bB v2s+Uncz5N87F+LQTdIjmtEDIloBnGCaSG4klnf4dzv9cfKbgB3aQFDZbRVgxwPf/5kS XftkYUesFW5kQpLffyOYExMKvV5uyIsf1Jlur+5kzS6G2ZzJCi4tmvKQfFUtyIJllBND MID4Gu5X3B/n8Fv+g9LGY8Lj0Im0URLAy07WMgSTLMOiCCpFnKmUMPP6Wdorr8kbp8DT J2WQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:from:to:cc:references:organization :message-id:date:user-agent:mime-version:in-reply-to :content-language:content-transfer-encoding; bh=5/VlcX46lvl8vy7grYetsO5hoYtmn5nqnISOFUuQyJ8=; b=IQJFsUxoo0Cuw4g+yEpwpBWH8RJ8efPdCGLSfE6vd/QLxPuCC098aaZ7FB5CZz5DY0 FW6wyniDyG5cD4CB8xjarWjfJrDbvfdcaS1QGpfrLTVPv79oiFyKBOlsA33fFEMCwVL2 oJU1xwH6NB0DYflzIgnTSdImd719RXJQAFv9zPPgEwZEEsvHcbvLrxzVyUTV/wbVrarm Sf9Dn0PbhnX0h8mXKctWiyl44qzleAsy5WELWH0L7vllIvKlwhkzVLDSCSkr52qhGU+x JM8SQjJG+qFAPpGBSMoCJGiR25YYJ7tOWQvnTgUxasVTodWRPgR3ji+599Lrp7RqDK7Y AcRg== X-Gm-Message-State: ALQs6tArZXiyvUMf8X4ZGSi+L4a8xKdTEWYXp7CgDVCl7r3E0oDTutgC nVZ3kEAi0GFgFGCN4oF6OcxlTg== X-Google-Smtp-Source: AB8JxZrKOr5wUce6pHMqGH3Xtv9E8Dr81LHzRjAQbmdq4r5GDYQn2rYbYyCyE2lILQsClZq7DcnxwQ== X-Received: by 2002:a19:f505:: with SMTP id j5-v6mr12299935lfb.12.1525290954466; Wed, 02 May 2018 12:55:54 -0700 (PDT) Received: from wasted.cogentembedded.com ([31.173.87.190]) by smtp.gmail.com with ESMTPSA id w2-v6sm2493175ljw.70.2018.05.02.12.55.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 02 May 2018 12:55:53 -0700 (PDT) Subject: [PATCH 2/2] sh_eth: WARN_ON() access to unimplemented TSU register From: Sergei Shtylyov To: netdev@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, linux-sh@vger.kernel.org References: <4a17ab65-4d9c-897e-c340-7d86e0296f2f@cogentembedded.com> Organization: Cogent Embedded Message-ID: Date: Wed, 2 May 2018 22:55:52 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.2.1 MIME-Version: 1.0 In-Reply-To: <4a17ab65-4d9c-897e-c340-7d86e0296f2f@cogentembedded.com> Content-Language: en-MW Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Commit 3365711df024 ("sh_eth: WARN on access to a register not implemented in a particular chip") added WARN_ON() to sh_eth_{read|write}() but not to sh_eth_tsu_{read|write}(). Now that we've routed almost all TSU register accesses (except TSU_ADR{H|L} -- which are special) thru the latter pair of accessors, it makes sense to check for the unimplemented TSU registers as well... Signed-off-by: Sergei Shtylyov --- drivers/net/ethernet/renesas/sh_eth.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) Index: net-next/drivers/net/ethernet/renesas/sh_eth.c =================================================================== --- net-next.orig/drivers/net/ethernet/renesas/sh_eth.c +++ net-next/drivers/net/ethernet/renesas/sh_eth.c @@ -442,12 +442,22 @@ static void sh_eth_modify(struct net_dev static void sh_eth_tsu_write(struct sh_eth_private *mdp, u32 data, int enum_index) { - iowrite32(data, mdp->tsu_addr + mdp->reg_offset[enum_index]); + u16 offset = mdp->reg_offset[enum_index]; + + if (WARN_ON(offset == SH_ETH_OFFSET_INVALID)) + return; + + iowrite32(data, mdp->tsu_addr + offset); } static u32 sh_eth_tsu_read(struct sh_eth_private *mdp, int enum_index) { - return ioread32(mdp->tsu_addr + mdp->reg_offset[enum_index]); + u16 offset = mdp->reg_offset[enum_index]; + + if (WARN_ON(offset == SH_ETH_OFFSET_INVALID)) + return ~0U; + + return ioread32(mdp->tsu_addr + offset); } static void sh_eth_select_mii(struct net_device *ndev)