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Wed, 21 Aug 2024 07:23:17 GMT Received: from smtpav06.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 40B6E2004B; Wed, 21 Aug 2024 07:23:15 +0000 (GMT) Received: from smtpav06.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 3D46F20049; Wed, 21 Aug 2024 07:23:14 +0000 (GMT) Received: from genoa.aus.stglabs.ibm.com (unknown [9.40.192.157]) by smtpav06.fra02v.mail.ibm.com (Postfix) with ESMTP; Wed, 21 Aug 2024 07:23:14 +0000 (GMT) From: Jiufu Guo To: gcc-patches@gcc.gnu.org Cc: segher@kernel.crashing.org, dje.gcc@gmail.com, linkw@gcc.gnu.org, bergner@linux.ibm.com, guojiufu@linux.ibm.com Subject: [PATCH] rs6000: allow split vsx_stxvd2x4_le_const after RA[pr116030] Date: Wed, 21 Aug 2024 15:23:13 +0800 Message-Id: <20240821072313.2071125-1-guojiufu@linux.ibm.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: bKtYrTvobVqwD4kmRla5LkiimXuMK7Af X-Proofpoint-ORIG-GUID: RWaAbzy6RZ-_7VZgPXnkXVeYm8t7OQRy X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-08-21_07,2024-08-19_03,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 adultscore=0 suspectscore=0 spamscore=0 mlxlogscore=918 bulkscore=0 impostorscore=0 malwarescore=0 lowpriorityscore=0 phishscore=0 clxscore=1011 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2408210050 X-Spam-Status: No, score=-10.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org Hi, Previous, vsx_stxvd2x4_le_const_ is introduced for 'split1' pass, so it is guarded by "can_create_pseudo_p ()". While, it would be possible to match the pattern of this insn during/after RA, so this insn could be updated to make it work for split pass after RA. Bootstrap®test pass on ppc64{,le}. Is this ok for trunk? BR, Jeff (Jiufu) Guo PR target/116030 gcc/ChangeLog: * config/rs6000/vsx.md (vsx_stxvd2x4_le_const_): Allow insn after RA. gcc/testsuite/ChangeLog: * gcc.target/powerpc/pr116030.c: New test. --- gcc/config/rs6000/vsx.md | 9 +++++---- gcc/testsuite/gcc.target/powerpc/pr116030.c | 17 +++++++++++++++++ 2 files changed, 22 insertions(+), 4 deletions(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/pr116030.c diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index 27069d070e1..2dd87b7a9db 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -3454,12 +3454,12 @@ (define_insn "*vsx_stxvd2x4_le_" (define_insn_and_split "vsx_stxvd2x4_le_const_" [(set (match_operand:VSX_W 0 "memory_operand" "=Z") - (match_operand:VSX_W 1 "immediate_operand" "W"))] + (match_operand:VSX_W 1 "immediate_operand" "W")) + (clobber (match_scratch:VSX_W 2 "=&wa"))] "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (mode) && !TARGET_P9_VECTOR - && const_vec_duplicate_p (operands[1]) - && can_create_pseudo_p ()" + && const_vec_duplicate_p (operands[1])" "#" "&& 1" [(set (match_dup 2) @@ -3472,7 +3472,8 @@ (define_insn_and_split "vsx_stxvd2x4_le_const_" { /* Here all the constants must be loaded without memory. */ gcc_assert (easy_altivec_constant (operands[1], mode)); - operands[2] = gen_reg_rtx (mode); + if (GET_CODE(operands[2]) == SCRATCH) + operands[2] = gen_reg_rtx (mode); } [(set_attr "type" "vecstore") (set_attr "length" "8")]) diff --git a/gcc/testsuite/gcc.target/powerpc/pr116030.c b/gcc/testsuite/gcc.target/powerpc/pr116030.c new file mode 100644 index 00000000000..ada0a4fd2b1 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr116030.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-mdejagnu-cpu=power8 -Os -fno-forward-propagate -ftrivial-auto-var-init=zero -save-temps" } */ + +/* Verify we do not ICE on the tests below. */ +union U128 +{ + _Decimal128 d; + unsigned long long int u[2]; +}; + +union U128 +foo () +{ + volatile union U128 u128; + u128.d = 0.9999999999999999999999999999999999e+39DL; + return u128; +}