From patchwork Sat Aug 17 11:36:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Li, Pan2" X-Patchwork-Id: 1973475 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=Lwz9j5LC; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4WmH0c3Zwxz1yXb for ; Sat, 17 Aug 2024 21:37:52 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id AF2D43860C31 for ; Sat, 17 Aug 2024 11:37:50 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) by sourceware.org (Postfix) with ESMTPS id 3F5733860755 for ; Sat, 17 Aug 2024 11:37:06 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 3F5733860755 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 3F5733860755 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=192.198.163.11 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1723894628; cv=none; b=k7IwuvIHdpj9qCVZLNPQKA6KPSlHmRPww0BcNQgpN/D+s+Gj5+dMGNnkriE3QcyrnYkI5J+ZtRqnJibR2anEQjv4jt++2IpUVf5LxCDSVSMKmwYiAMtCJKKt5TdAIeXsrOrJRHhAqk6UY1VL/b2BvDcU7Ebacgf2fGnOvp660NQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1723894628; c=relaxed/simple; bh=4dgFjkP1WGHnuyQ1vNFdze0n9Cz+zW5457XjUrUuTlc=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=Bi/rdyiEC5acA6x50h9d2C2ieVY05Ue5+v1H79/nAOKI6jrndI3mbep1GwQ5cHqQFSiTgOMi95a2nqz8/W9eUjXLWj85UZISCSCBp5cNqGrvT1YAXMjBk8sxJvQKgyWmeQOMKEXn4MUcnDInrqL1yqaA12L8BCBIohZ5ms5bLVI= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1723894627; x=1755430627; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=4dgFjkP1WGHnuyQ1vNFdze0n9Cz+zW5457XjUrUuTlc=; b=Lwz9j5LCCR4z0bpC5nIe8zo+xCVg/eXSqxHvoAlwXRtHw7TdYBolfL+z gMJPVfx0OhKkPEPbd8ejvjGoqijyzOHOyAOUgYClLBX3Z4k2vlRehwTZq Fcue6cbrj9upj4lqF8wzpiQW5kg4V468udS12fHvdLOO4ffBo1lor4x8L EKypPuzD2uX4IrINmun4OMKw5FbJTIJvFr/w2tQ/E1F4qLKlFaWbfTuo8 oD7dxwLirrsCnEvyTk7zxVhSxjQCj4nMIAXqZNa6Swh4eF94IRzfHcwHz YALezJDDyAUm5+OCtXWdMp6FDQDZ8EpzChuludECL9AH/EGat6/e+9Eln Q==; X-CSE-ConnectionGUID: JJ1ixWAGRrGihpjo7wshhA== X-CSE-MsgGUID: VaJz0AvkS4KHBHTUxm9diQ== X-IronPort-AV: E=McAfee;i="6700,10204,11166"; a="32814203" X-IronPort-AV: E=Sophos;i="6.10,154,1719903600"; d="scan'208";a="32814203" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Aug 2024 04:37:05 -0700 X-CSE-ConnectionGUID: XK/IiqC/Sr2K/14GR80kVA== X-CSE-MsgGUID: K2c1J8V5SFyUHXbl+rzhCw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,154,1719903600"; d="scan'208";a="64308929" Received: from panli.sh.intel.com ([10.239.154.73]) by fmviesa005.fm.intel.com with ESMTP; 17 Aug 2024 04:37:03 -0700 From: pan2.li@intel.com To: gcc-patches@gcc.gnu.org Cc: juzhe.zhong@rivai.ai, kito.cheng@gmail.com, jeffreyalaw@gmail.com, rdapp.gcc@gmail.com, Pan Li Subject: [PATCH v1 1/2] RISC-V: Add testcases for unsigned scalar .SAT_TRUNC form 2 Date: Sat, 17 Aug 2024 19:36:40 +0800 Message-ID: <20240817113641.73334-1-pan2.li@intel.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 X-Spam-Status: No, score=-11.4 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_NUMSUBJECT, KAM_SHORT, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org From: Pan Li This patch would like to add test cases for the unsigned scalar .SAT_TRUNC form 2. Aka: Form 2: #define DEF_SAT_U_TRUC_FMT_2(NT, WT) \ NT __attribute__((noinline)) \ sat_u_truc_##WT##_to_##NT##_fmt_2 (WT x) \ { \ WT max = (WT)(NT)-1; \ return x > max ? (NT) max : (NT)x; \ } DEF_SAT_U_TRUC_FMT_2 (uint32_t, uint64_t) The below test is passed for this patch. * The rv64gcv regression test. gcc/testsuite/ChangeLog: * gcc.target/riscv/sat_arith.h: Add test helper macros. * gcc.target/riscv/sat_u_trunc-7.c: New test. * gcc.target/riscv/sat_u_trunc-8.c: New test. * gcc.target/riscv/sat_u_trunc-9.c: New test. * gcc.target/riscv/sat_u_trunc-run-7.c: New test. * gcc.target/riscv/sat_u_trunc-run-8.c: New test. * gcc.target/riscv/sat_u_trunc-run-9.c: New test. Signed-off-by: Pan Li --- gcc/testsuite/gcc.target/riscv/sat_arith.h | 12 +++++++++++ .../gcc.target/riscv/sat_u_trunc-7.c | 17 ++++++++++++++++ .../gcc.target/riscv/sat_u_trunc-8.c | 20 +++++++++++++++++++ .../gcc.target/riscv/sat_u_trunc-9.c | 19 ++++++++++++++++++ .../gcc.target/riscv/sat_u_trunc-run-7.c | 16 +++++++++++++++ .../gcc.target/riscv/sat_u_trunc-run-8.c | 16 +++++++++++++++ .../gcc.target/riscv/sat_u_trunc-run-9.c | 16 +++++++++++++++ 7 files changed, 116 insertions(+) create mode 100644 gcc/testsuite/gcc.target/riscv/sat_u_trunc-7.c create mode 100644 gcc/testsuite/gcc.target/riscv/sat_u_trunc-8.c create mode 100644 gcc/testsuite/gcc.target/riscv/sat_u_trunc-9.c create mode 100644 gcc/testsuite/gcc.target/riscv/sat_u_trunc-run-7.c create mode 100644 gcc/testsuite/gcc.target/riscv/sat_u_trunc-run-8.c create mode 100644 gcc/testsuite/gcc.target/riscv/sat_u_trunc-run-9.c diff --git a/gcc/testsuite/gcc.target/riscv/sat_arith.h b/gcc/testsuite/gcc.target/riscv/sat_arith.h index 37e0a60f21b..576a4926d1f 100644 --- a/gcc/testsuite/gcc.target/riscv/sat_arith.h +++ b/gcc/testsuite/gcc.target/riscv/sat_arith.h @@ -227,7 +227,19 @@ sat_u_truc_##WT##_to_##NT##_fmt_1 (WT x) \ } #define DEF_SAT_U_TRUC_FMT_1_WRAP(NT, WT) DEF_SAT_U_TRUC_FMT_1(NT, WT) +#define DEF_SAT_U_TRUC_FMT_2(NT, WT) \ +NT __attribute__((noinline)) \ +sat_u_truc_##WT##_to_##NT##_fmt_2 (WT x) \ +{ \ + WT max = (WT)(NT)-1; \ + return x > max ? (NT) max : (NT)x; \ +} +#define DEF_SAT_U_TRUC_FMT_2_WRAP(NT, WT) DEF_SAT_U_TRUC_FMT_2(NT, WT) + #define RUN_SAT_U_TRUC_FMT_1(NT, WT, x) sat_u_truc_##WT##_to_##NT##_fmt_1 (x) #define RUN_SAT_U_TRUC_FMT_1_WRAP(NT, WT, x) RUN_SAT_U_TRUC_FMT_1(NT, WT, x) +#define RUN_SAT_U_TRUC_FMT_2(NT, WT, x) sat_u_truc_##WT##_to_##NT##_fmt_2 (x) +#define RUN_SAT_U_TRUC_FMT_2_WRAP(NT, WT, x) RUN_SAT_U_TRUC_FMT_2(NT, WT, x) + #endif diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_trunc-7.c b/gcc/testsuite/gcc.target/riscv/sat_u_trunc-7.c new file mode 100644 index 00000000000..95d513a15fb --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat_u_trunc-7.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +#include "sat_arith.h" + +/* +** sat_u_truc_uint16_t_to_uint8_t_fmt_2: +** sltiu\s+[atx][0-9]+,\s*a0,\s*255 +** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 +** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ +** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff +** ret +*/ +DEF_SAT_U_TRUC_FMT_2(uint8_t, uint16_t) + +/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_trunc-8.c b/gcc/testsuite/gcc.target/riscv/sat_u_trunc-8.c new file mode 100644 index 00000000000..f168912293d --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat_u_trunc-8.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +#include "sat_arith.h" + +/* +** sat_u_truc_uint32_t_to_uint16_t_fmt_2: +** li\s+[atx][0-9]+,\s*65536 +** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 +** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ +** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 +** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ +** slli\s+a0,\s*a0,\s*48 +** srli\s+a0,\s*a0,\s*48 +** ret +*/ +DEF_SAT_U_TRUC_FMT_2(uint16_t, uint32_t) + +/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_trunc-9.c b/gcc/testsuite/gcc.target/riscv/sat_u_trunc-9.c new file mode 100644 index 00000000000..d82363d6aef --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat_u_trunc-9.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +#include "sat_arith.h" + +/* +** sat_u_truc_uint64_t_to_uint32_t_fmt_2: +** li\s+[atx][0-9]+,\s*-1 +** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 +** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ +** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 +** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ +** sext.w\s+a0,\s*a0 +** ret +*/ +DEF_SAT_U_TRUC_FMT_2(uint32_t, uint64_t) + +/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_trunc-run-7.c b/gcc/testsuite/gcc.target/riscv/sat_u_trunc-run-7.c new file mode 100644 index 00000000000..b98d40fa7ec --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat_u_trunc-run-7.c @@ -0,0 +1,16 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-additional-options "-std=c99" } */ + +#include "sat_arith.h" +#include "sat_arith_data.h" + +#define T1 uint8_t +#define T2 uint16_t + +DEF_SAT_U_TRUC_FMT_2_WRAP(T1, T2) + +#define DATA TEST_UNARY_DATA_WRAP(T1, T2) +#define T TEST_UNARY_STRUCT_DECL(T1, T2) +#define RUN_UNARY(x) RUN_SAT_U_TRUC_FMT_2_WRAP(T1, T2, x) + +#include "scalar_sat_unary.h" diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_trunc-run-8.c b/gcc/testsuite/gcc.target/riscv/sat_u_trunc-run-8.c new file mode 100644 index 00000000000..486585df7b8 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat_u_trunc-run-8.c @@ -0,0 +1,16 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-additional-options "-std=c99" } */ + +#include "sat_arith.h" +#include "sat_arith_data.h" + +#define T1 uint16_t +#define T2 uint32_t + +DEF_SAT_U_TRUC_FMT_2_WRAP(T1, T2) + +#define DATA TEST_UNARY_DATA_WRAP(T1, T2) +#define T TEST_UNARY_STRUCT_DECL(T1, T2) +#define RUN_UNARY(x) RUN_SAT_U_TRUC_FMT_2_WRAP(T1, T2, x) + +#include "scalar_sat_unary.h" diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_trunc-run-9.c b/gcc/testsuite/gcc.target/riscv/sat_u_trunc-run-9.c new file mode 100644 index 00000000000..2099304a0be --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat_u_trunc-run-9.c @@ -0,0 +1,16 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-additional-options "-std=c99" } */ + +#include "sat_arith.h" +#include "sat_arith_data.h" + +#define T1 uint32_t +#define T2 uint64_t + +DEF_SAT_U_TRUC_FMT_2_WRAP(T1, T2) + +#define DATA TEST_UNARY_DATA_WRAP(T1, T2) +#define T TEST_UNARY_STRUCT_DECL(T1, T2) +#define RUN_UNARY(x) RUN_SAT_U_TRUC_FMT_2_WRAP(T1, T2, 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Aug 2024 04:37:05 -0700 From: pan2.li@intel.com To: gcc-patches@gcc.gnu.org Cc: juzhe.zhong@rivai.ai, kito.cheng@gmail.com, jeffreyalaw@gmail.com, rdapp.gcc@gmail.com, Pan Li Subject: [PATCH v1 2/2] RISC-V: Add testcases for unsigned scalar .SAT_TRUNC form 3 Date: Sat, 17 Aug 2024 19:36:41 +0800 Message-ID: <20240817113641.73334-2-pan2.li@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240817113641.73334-1-pan2.li@intel.com> References: <20240817113641.73334-1-pan2.li@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-11.4 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_NUMSUBJECT, KAM_SHORT, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org From: Pan Li This patch would like to add test cases for the unsigned scalar .SAT_TRUNC form 3. Aka: Form 3: #define DEF_SAT_U_TRUC_FMT_3(NT, WT) \ NT __attribute__((noinline)) \ sat_u_truc_##WT##_to_##NT##_fmt_3 (WT x) \ { \ WT max = (WT)(NT)-1; \ return x <= max ? (NT)x : (NT) max; \ } DEF_SAT_U_TRUC_FMT_3 (uint32_t, uint64_t) The below test is passed for this patch. * The rv64gcv regression test. gcc/testsuite/ChangeLog: * gcc.target/riscv/sat_arith.h: Add test helper macros. * gcc.target/riscv/sat_u_trunc-13.c: New test. * gcc.target/riscv/sat_u_trunc-14.c: New test. * gcc.target/riscv/sat_u_trunc-15.c: New test. * gcc.target/riscv/sat_u_trunc-run-13.c: New test. * gcc.target/riscv/sat_u_trunc-run-14.c: New test. * gcc.target/riscv/sat_u_trunc-run-15.c: New test. Signed-off-by: Pan Li --- gcc/testsuite/gcc.target/riscv/sat_arith.h | 12 +++++++++++ .../gcc.target/riscv/sat_u_trunc-13.c | 17 ++++++++++++++++ .../gcc.target/riscv/sat_u_trunc-14.c | 20 +++++++++++++++++++ .../gcc.target/riscv/sat_u_trunc-15.c | 19 ++++++++++++++++++ .../gcc.target/riscv/sat_u_trunc-run-13.c | 16 +++++++++++++++ .../gcc.target/riscv/sat_u_trunc-run-14.c | 16 +++++++++++++++ .../gcc.target/riscv/sat_u_trunc-run-15.c | 16 +++++++++++++++ 7 files changed, 116 insertions(+) create mode 100644 gcc/testsuite/gcc.target/riscv/sat_u_trunc-13.c create mode 100644 gcc/testsuite/gcc.target/riscv/sat_u_trunc-14.c create mode 100644 gcc/testsuite/gcc.target/riscv/sat_u_trunc-15.c create mode 100644 gcc/testsuite/gcc.target/riscv/sat_u_trunc-run-13.c create mode 100644 gcc/testsuite/gcc.target/riscv/sat_u_trunc-run-14.c create mode 100644 gcc/testsuite/gcc.target/riscv/sat_u_trunc-run-15.c diff --git a/gcc/testsuite/gcc.target/riscv/sat_arith.h b/gcc/testsuite/gcc.target/riscv/sat_arith.h index 576a4926d1f..cf055410fd1 100644 --- a/gcc/testsuite/gcc.target/riscv/sat_arith.h +++ b/gcc/testsuite/gcc.target/riscv/sat_arith.h @@ -236,10 +236,22 @@ sat_u_truc_##WT##_to_##NT##_fmt_2 (WT x) \ } #define DEF_SAT_U_TRUC_FMT_2_WRAP(NT, WT) DEF_SAT_U_TRUC_FMT_2(NT, WT) +#define DEF_SAT_U_TRUC_FMT_3(NT, WT) \ +NT __attribute__((noinline)) \ +sat_u_truc_##WT##_to_##NT##_fmt_3 (WT x) \ +{ \ + WT max = (WT)(NT)-1; \ + return x <= max ? (NT)x : (NT) max; \ +} +#define DEF_SAT_U_TRUC_FMT_3_WRAP(NT, WT) DEF_SAT_U_TRUC_FMT_3(NT, WT) + #define RUN_SAT_U_TRUC_FMT_1(NT, WT, x) sat_u_truc_##WT##_to_##NT##_fmt_1 (x) #define RUN_SAT_U_TRUC_FMT_1_WRAP(NT, WT, x) RUN_SAT_U_TRUC_FMT_1(NT, WT, x) #define RUN_SAT_U_TRUC_FMT_2(NT, WT, x) sat_u_truc_##WT##_to_##NT##_fmt_2 (x) #define RUN_SAT_U_TRUC_FMT_2_WRAP(NT, WT, x) RUN_SAT_U_TRUC_FMT_2(NT, WT, x) +#define RUN_SAT_U_TRUC_FMT_3(NT, WT, x) sat_u_truc_##WT##_to_##NT##_fmt_3 (x) +#define RUN_SAT_U_TRUC_FMT_3_WRAP(NT, WT, x) RUN_SAT_U_TRUC_FMT_3(NT, WT, x) + #endif diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_trunc-13.c b/gcc/testsuite/gcc.target/riscv/sat_u_trunc-13.c new file mode 100644 index 00000000000..58910793a80 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat_u_trunc-13.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +#include "sat_arith.h" + +/* +** sat_u_truc_uint16_t_to_uint8_t_fmt_3: +** sltiu\s+[atx][0-9]+,\s*a0,\s*255 +** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 +** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ +** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff +** ret +*/ +DEF_SAT_U_TRUC_FMT_3(uint8_t, uint16_t) + +/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_trunc-14.c b/gcc/testsuite/gcc.target/riscv/sat_u_trunc-14.c new file mode 100644 index 00000000000..236ea1d45f7 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat_u_trunc-14.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +#include "sat_arith.h" + +/* +** sat_u_truc_uint32_t_to_uint16_t_fmt_3: +** li\s+[atx][0-9]+,\s*65536 +** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 +** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ +** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 +** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ +** slli\s+a0,\s*a0,\s*48 +** srli\s+a0,\s*a0,\s*48 +** ret +*/ +DEF_SAT_U_TRUC_FMT_3(uint16_t, uint32_t) + +/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_trunc-15.c b/gcc/testsuite/gcc.target/riscv/sat_u_trunc-15.c new file mode 100644 index 00000000000..33c3686c053 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat_u_trunc-15.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -O3 -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +#include "sat_arith.h" + +/* +** sat_u_truc_uint64_t_to_uint32_t_fmt_3: +** li\s+[atx][0-9]+,\s*-1 +** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 +** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ +** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 +** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ +** sext.w\s+a0,\s*a0 +** ret +*/ +DEF_SAT_U_TRUC_FMT_3(uint32_t, uint64_t) + +/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_trunc-run-13.c b/gcc/testsuite/gcc.target/riscv/sat_u_trunc-run-13.c new file mode 100644 index 00000000000..6322305c5ed --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat_u_trunc-run-13.c @@ -0,0 +1,16 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-additional-options "-std=c99" } */ + +#include "sat_arith.h" +#include "sat_arith_data.h" + +#define T1 uint8_t +#define T2 uint16_t + +DEF_SAT_U_TRUC_FMT_3_WRAP(T1, T2) + +#define DATA TEST_UNARY_DATA_WRAP(T1, T2) +#define T TEST_UNARY_STRUCT_DECL(T1, T2) +#define RUN_UNARY(x) RUN_SAT_U_TRUC_FMT_3_WRAP(T1, T2, x) + +#include "scalar_sat_unary.h" diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_trunc-run-14.c b/gcc/testsuite/gcc.target/riscv/sat_u_trunc-run-14.c new file mode 100644 index 00000000000..a29e887aeeb --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat_u_trunc-run-14.c @@ -0,0 +1,16 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-additional-options "-std=c99" } */ + +#include "sat_arith.h" +#include "sat_arith_data.h" + +#define T1 uint16_t +#define T2 uint32_t + +DEF_SAT_U_TRUC_FMT_3_WRAP(T1, T2) + +#define DATA TEST_UNARY_DATA_WRAP(T1, T2) +#define T TEST_UNARY_STRUCT_DECL(T1, T2) +#define RUN_UNARY(x) RUN_SAT_U_TRUC_FMT_3_WRAP(T1, T2, x) + +#include "scalar_sat_unary.h" diff --git a/gcc/testsuite/gcc.target/riscv/sat_u_trunc-run-15.c b/gcc/testsuite/gcc.target/riscv/sat_u_trunc-run-15.c new file mode 100644 index 00000000000..a29e887aeeb --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat_u_trunc-run-15.c @@ -0,0 +1,16 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-additional-options "-std=c99" } */ + +#include "sat_arith.h" +#include "sat_arith_data.h" + +#define T1 uint16_t +#define T2 uint32_t + +DEF_SAT_U_TRUC_FMT_3_WRAP(T1, T2) + +#define DATA TEST_UNARY_DATA_WRAP(T1, T2) +#define T TEST_UNARY_STRUCT_DECL(T1, T2) +#define RUN_UNARY(x) RUN_SAT_U_TRUC_FMT_3_WRAP(T1, T2, x) + +#include "scalar_sat_unary.h"