From patchwork Wed Aug 7 00:30:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Hall, Christopher S" X-Patchwork-Id: 1969752 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=osuosl.org header.i=@osuosl.org header.a=rsa-sha256 header.s=default header.b=yXXXp0rZ; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=osuosl.org (client-ip=2605:bc80:3010::137; helo=smtp4.osuosl.org; envelope-from=intel-wired-lan-bounces@osuosl.org; receiver=patchwork.ozlabs.org) Received: from smtp4.osuosl.org (smtp4.osuosl.org [IPv6:2605:bc80:3010::137]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4WdrpZ12hbz1yfC for ; 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Wed, 7 Aug 2024 00:36:48 +0000 (UTC) X-CSE-ConnectionGUID: HTo4i+P5RL+aeSIjAv07EQ== X-CSE-MsgGUID: N8SZzhupRTi/SJ0Z0jQ2gQ== X-IronPort-AV: E=McAfee;i="6700,10204,11156"; a="31669746" X-IronPort-AV: E=Sophos;i="6.09,268,1716274800"; d="scan'208";a="31669746" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Aug 2024 17:36:49 -0700 X-CSE-ConnectionGUID: YefdZEw/T4yTRd6p5xjdTQ== X-CSE-MsgGUID: xpfh385pRd+kEFufZ0BG3w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,268,1716274800"; d="scan'208";a="61496999" Received: from timelab-spr09.ch.intel.com (HELO timelab-spr09.sc.intel.com) ([143.182.136.138]) by orviesa003.jf.intel.com with ESMTP; 06 Aug 2024 17:36:47 -0700 From: christopher.s.hall@intel.com To: intel-wired-lan@lists.osuosl.org Date: Tue, 6 Aug 2024 17:30:28 -0700 Message-Id: <20240807003032.10300-2-christopher.s.hall@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240807003032.10300-1-christopher.s.hall@intel.com> References: <20240807003032.10300-1-christopher.s.hall@intel.com> MIME-Version: 1.0 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1722991009; x=1754527009; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=8WR6VOKinrRYanLaA5NwZ8rozUY7FOgk66VVTRV++uw=; b=k4ZdKTCj5iWWF4lpUa6Y5jeQif9buL8jiGvJY/1mmHborHGpWL1COAAW rxCaPe/IaJuggmpDpw+nuVpbNp2+LNLTdAJJpQScFHAWDteQf1Yc90x3q lKFKs/WT+sZnxaw+ijQX8Y8O4KDWalemY5Yn0jRd4Nh+x8TH4TLtvmV9d fA8HR3u/jy4vSeIZbiUlQQui/vsBKVMi78hc3/k3FKdg9XyLLWOkcYruE da4ERChxIPZfe2xyBayImV5q9anDO9egIPHngivcUpfsDcl8e9iYWQ0/v V5qGT2GTqtLAYipzl3rS78keLL9Ct9tRtNTZUFWv7yPNhq3X45cF4gZpQ A==; X-Mailman-Original-Authentication-Results: smtp3.osuosl.org; dmarc=pass (p=none dis=none) header.from=intel.com X-Mailman-Original-Authentication-Results: smtp3.osuosl.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=k4ZdKTCj Subject: [Intel-wired-lan] [PATCH iwl-net v1 1/5] igc: Ensure the PTM cycle is reliably triggered X-BeenThere: intel-wired-lan@osuosl.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Wired Ethernet Linux Kernel Driver Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Christopher S M Hall , david.zage@intel.com, vinschen@redhat.com, vinicius.gomes@intel.com, netdev@vger.kernel.org, Michal Swiatkowski , rodrigo.cadore@l-acoustics.com Errors-To: intel-wired-lan-bounces@osuosl.org Sender: "Intel-wired-lan" From: Christopher S M Hall Writing to clear the PTM status 'valid' bit while the PTM cycle is triggered results in unreliable PTM operation. To fix this, clear the PTM 'trigger' and status after each PTM transaction. The issue can be reproduced with the following: $ sudo phc2sys -R 1000 -O 0 -i tsn0 -m Note: 1000 Hz (-R 1000) is unrealistically large, but provides a way to quickly reproduce the issue. PHC2SYS exits with: "ioctl PTP_OFFSET_PRECISE: Connection timed out" when the PTM transaction fails Fixes: a90ec8483732 ("igc: Add support for PTP getcrosststamp()") Signed-off-by: Christopher S M Hall Reviewed-by: Michal Swiatkowski Reviewed-by: Corinna Vinschen Tested-by: Corinna Vinschen (kdump hang only) --- drivers/net/ethernet/intel/igc/igc_defines.h | 1 + drivers/net/ethernet/intel/igc/igc_ptp.c | 70 ++++++++++++-------- 2 files changed, 42 insertions(+), 29 deletions(-) diff --git a/drivers/net/ethernet/intel/igc/igc_defines.h b/drivers/net/ethernet/intel/igc/igc_defines.h index 511384f3ec5c..ec191d26c650 100644 --- a/drivers/net/ethernet/intel/igc/igc_defines.h +++ b/drivers/net/ethernet/intel/igc/igc_defines.h @@ -583,6 +583,7 @@ #define IGC_PTM_STAT_T4M1_OVFL BIT(3) /* T4 minus T1 overflow */ #define IGC_PTM_STAT_ADJUST_1ST BIT(4) /* 1588 timer adjusted during 1st PTM cycle */ #define IGC_PTM_STAT_ADJUST_CYC BIT(5) /* 1588 timer adjusted during non-1st PTM cycle */ +#define IGC_PTM_STAT_ALL GENMASK(5, 0) /* Used to clear all status */ /* PCIe PTM Cycle Control */ #define IGC_PTM_CYCLE_CTRL_CYC_TIME(msec) ((msec) & 0x3ff) /* PTM Cycle Time (msec) */ diff --git a/drivers/net/ethernet/intel/igc/igc_ptp.c b/drivers/net/ethernet/intel/igc/igc_ptp.c index 946edbad4302..00cc80d8d164 100644 --- a/drivers/net/ethernet/intel/igc/igc_ptp.c +++ b/drivers/net/ethernet/intel/igc/igc_ptp.c @@ -974,11 +974,38 @@ static void igc_ptm_log_error(struct igc_adapter *adapter, u32 ptm_stat) } } +static void igc_ptm_trigger(struct igc_hw *hw) +{ + u32 ctrl; + + /* To "manually" start the PTM cycle we need to set the + * trigger (TRIG) bit + */ + ctrl = rd32(IGC_PTM_CTRL); + ctrl |= IGC_PTM_CTRL_TRIG; + wr32(IGC_PTM_CTRL, ctrl); + /* Perform flush after write to CTRL register otherwise + * transaction may not start + */ + wrfl(); +} + +static void igc_ptm_reset(struct igc_hw *hw) +{ + u32 ctrl; + + ctrl = rd32(IGC_PTM_CTRL); + ctrl &= ~IGC_PTM_CTRL_TRIG; + wr32(IGC_PTM_CTRL, ctrl); + /* Write to clear all status */ + wr32(IGC_PTM_STAT, IGC_PTM_STAT_ALL); +} + static int igc_phc_get_syncdevicetime(ktime_t *device, struct system_counterval_t *system, void *ctx) { - u32 stat, t2_curr_h, t2_curr_l, ctrl; + u32 stat, t2_curr_h, t2_curr_l; struct igc_adapter *adapter = ctx; struct igc_hw *hw = &adapter->hw; int err, count = 100; @@ -994,25 +1021,13 @@ static int igc_phc_get_syncdevicetime(ktime_t *device, * are transitory. Repeating the process returns valid * data eventually. */ - - /* To "manually" start the PTM cycle we need to clear and - * then set again the TRIG bit. - */ - ctrl = rd32(IGC_PTM_CTRL); - ctrl &= ~IGC_PTM_CTRL_TRIG; - wr32(IGC_PTM_CTRL, ctrl); - ctrl |= IGC_PTM_CTRL_TRIG; - wr32(IGC_PTM_CTRL, ctrl); - - /* The cycle only starts "for real" when software notifies - * that it has read the registers, this is done by setting - * VALID bit. - */ - wr32(IGC_PTM_STAT, IGC_PTM_STAT_VALID); + igc_ptm_trigger(hw); err = readx_poll_timeout(rd32, IGC_PTM_STAT, stat, stat, IGC_PTM_STAT_SLEEP, IGC_PTM_STAT_TIMEOUT); + igc_ptm_reset(hw); + if (err < 0) { netdev_err(adapter->netdev, "Timeout reading IGC_PTM_STAT register\n"); return err; @@ -1021,15 +1036,7 @@ static int igc_phc_get_syncdevicetime(ktime_t *device, if ((stat & IGC_PTM_STAT_VALID) == IGC_PTM_STAT_VALID) break; - if (stat & ~IGC_PTM_STAT_VALID) { - /* An error occurred, log it. */ - igc_ptm_log_error(adapter, stat); - /* The STAT register is write-1-to-clear (W1C), - * so write the previous error status to clear it. - */ - wr32(IGC_PTM_STAT, stat); - continue; - } + igc_ptm_log_error(adapter, stat); } while (--count); if (!count) { @@ -1255,7 +1262,7 @@ void igc_ptp_stop(struct igc_adapter *adapter) void igc_ptp_reset(struct igc_adapter *adapter) { struct igc_hw *hw = &adapter->hw; - u32 cycle_ctrl, ctrl; + u32 cycle_ctrl, ctrl, stat; unsigned long flags; u32 timadj; @@ -1290,14 +1297,19 @@ void igc_ptp_reset(struct igc_adapter *adapter) ctrl = IGC_PTM_CTRL_EN | IGC_PTM_CTRL_START_NOW | IGC_PTM_CTRL_SHRT_CYC(IGC_PTM_SHORT_CYC_DEFAULT) | - IGC_PTM_CTRL_PTM_TO(IGC_PTM_TIMEOUT_DEFAULT) | - IGC_PTM_CTRL_TRIG; + IGC_PTM_CTRL_PTM_TO(IGC_PTM_TIMEOUT_DEFAULT); wr32(IGC_PTM_CTRL, ctrl); /* Force the first cycle to run. */ - wr32(IGC_PTM_STAT, IGC_PTM_STAT_VALID); + igc_ptm_trigger(hw); + + if (readx_poll_timeout_atomic(rd32, IGC_PTM_STAT, stat, + stat, IGC_PTM_STAT_SLEEP, + IGC_PTM_STAT_TIMEOUT)) + netdev_err(adapter->netdev, "Timeout reading IGC_PTM_STAT register\n"); + igc_ptm_reset(hw); break; default: /* No work to do. */ From patchwork Wed Aug 7 00:30:29 2024 Content-Type: text/plain; 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a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1722991014; x=1754527014; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=8IGk7nHl0AUnnVWG/KooB+heOx9cbDf+RxJNRQCnw/Y=; b=oJGXCJVMRv9VypdWNHYjbTvNooauPPCMp185pAewnPkLLTQzDWc4CNir UxUTjq1BNRZN/e127EP7lwTiESrTtqWpRlXzPwpAF/XUDKoQsA52EH3hP H0VDDTwYlxnab8wrUQ2I6Z+QV4z4qPyOOSdRXvWqpxlVWp7GRUMb4Lfju EqhJmWT0myFBk78QQJj60BMUHQHhoQdGiaX8fVNZcoZHOaeg6c7vTJS4T gAJAnHux9vikYX77APBKQ9nHcg7i8W8m3sF89ZH1fwQabqkkBtOBtvCFV wCGzZRx9TtCdhx8Hlf2kTBQRlYg26Be25p0Lj+c70FJK3/e1d7eTP0XqB w==; X-Mailman-Original-Authentication-Results: smtp3.osuosl.org; dmarc=pass (p=none dis=none) header.from=intel.com X-Mailman-Original-Authentication-Results: smtp3.osuosl.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=oJGXCJVM Subject: [Intel-wired-lan] [PATCH iwl-net v1 2/5] igc: Lengthen the hardware retry time to prevent timeouts X-BeenThere: intel-wired-lan@osuosl.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Wired Ethernet Linux Kernel Driver Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Christopher S M Hall , david.zage@intel.com, vinschen@redhat.com, vinicius.gomes@intel.com, netdev@vger.kernel.org, rodrigo.cadore@l-acoustics.com Errors-To: intel-wired-lan-bounces@osuosl.org Sender: "Intel-wired-lan" From: Christopher S M Hall Lengthen the hardware retry timer to four microseconds. The i225/i226 hardware retries if it receives an inappropriate response from the upstream device. If the device retries too quickly, the root port does not respond. The issue can be reproduced with the following: $ sudo phc2sys -R 1000 -O 0 -i tsn0 -m Note: 1000 Hz (-R 1000) is unrealistically large, but provides a way to quickly reproduce the issue. PHC2SYS exits with: "ioctl PTP_OFFSET_PRECISE: Connection timed out" when the PTM transaction fails Fixes: 6b8aa753a9f9 ("igc: Decrease PTM short interval from 10 us to 1 us") Signed-off-by: Christopher S M Hall Reviewed-by: Corinna Vinschen --- drivers/net/ethernet/intel/igc/igc_defines.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/intel/igc/igc_defines.h b/drivers/net/ethernet/intel/igc/igc_defines.h index ec191d26c650..253327c23903 100644 --- a/drivers/net/ethernet/intel/igc/igc_defines.h +++ b/drivers/net/ethernet/intel/igc/igc_defines.h @@ -564,7 +564,7 @@ #define IGC_PTM_CTRL_SHRT_CYC(usec) (((usec) & 0x3f) << 2) #define IGC_PTM_CTRL_PTM_TO(usec) (((usec) & 0xff) << 8) -#define IGC_PTM_SHORT_CYC_DEFAULT 1 /* Default short cycle interval */ +#define IGC_PTM_SHORT_CYC_DEFAULT 4 /* Default short cycle interval */ #define IGC_PTM_CYC_TIME_DEFAULT 5 /* Default PTM cycle time */ #define IGC_PTM_TIMEOUT_DEFAULT 255 /* Default timeout for PTM errors */ From patchwork Wed Aug 7 00:30:30 2024 Content-Type: text/plain; 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Wed, 7 Aug 2024 00:36:55 +0000 (UTC) X-CSE-ConnectionGUID: nnNyJD+JStGwKewMGCvBsQ== X-CSE-MsgGUID: z0R6nJh4Q4CWapb2LX4p+A== X-IronPort-AV: E=McAfee;i="6700,10204,11156"; a="31669756" X-IronPort-AV: E=Sophos;i="6.09,268,1716274800"; d="scan'208";a="31669756" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Aug 2024 17:36:56 -0700 X-CSE-ConnectionGUID: 60BPayseTmqA8079N55kOQ== X-CSE-MsgGUID: iUVYMvXvTxiTRTw+KfZA7g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,268,1716274800"; d="scan'208";a="61497014" Received: from timelab-spr09.ch.intel.com (HELO timelab-spr09.sc.intel.com) ([143.182.136.138]) by orviesa003.jf.intel.com with ESMTP; 06 Aug 2024 17:36:54 -0700 From: christopher.s.hall@intel.com To: intel-wired-lan@lists.osuosl.org Date: Tue, 6 Aug 2024 17:30:30 -0700 Message-Id: <20240807003032.10300-4-christopher.s.hall@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240807003032.10300-1-christopher.s.hall@intel.com> References: <20240807003032.10300-1-christopher.s.hall@intel.com> MIME-Version: 1.0 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1722991016; x=1754527016; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=YW8OJ6ncs4oJPqe5fuxKSZeeTTvjkAOWYEUbEfU4uus=; b=Jp14x/pjsKgkblyT1v1awEnWy9jfrifuPXd1CP2aba7i6VjBIfcpExgv YeF4poXVhOHaxTIgRqBLcIW7OvTRhjP+k5NUUm/AlmPdkwlEkABSNqTeR 569ipKXAls+POPy9SnadwgUHHpSGLRjFY5VfVO3j42/66Ky3EsF3Y9sZx slKEB/Z2xmlJPfrKHLac5fEy7GzrMJPRTrrny1u3fXw4ANZ/Db1+tvSQJ nnggHK5sWN6ggKwfJUf5JU/0N9dikpWC8VG+TGurl40q/aAS/HKv8iXoP PQoT7bl6qDvQbRJqp6Vg35G+6pbFsy+CIPsx2uBSsKn3szhigfKbcItNf g==; X-Mailman-Original-Authentication-Results: smtp3.osuosl.org; dmarc=pass (p=none dis=none) header.from=intel.com X-Mailman-Original-Authentication-Results: smtp3.osuosl.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=Jp14x/pj Subject: [Intel-wired-lan] [PATCH iwl-net v1 3/5] igc: Move ktime snapshot into PTM retry loop X-BeenThere: intel-wired-lan@osuosl.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Wired Ethernet Linux Kernel Driver Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Christopher S M Hall , david.zage@intel.com, vinschen@redhat.com, vinicius.gomes@intel.com, netdev@vger.kernel.org, rodrigo.cadore@l-acoustics.com Errors-To: intel-wired-lan-bounces@osuosl.org Sender: "Intel-wired-lan" From: Christopher S M Hall Move ktime_get_snapshot() into the loop. If a retry does occur, a more recent snapshot will result in a more accurate cross-timestamp. Fixes: a90ec8483732 ("igc: Add support for PTP getcrosststamp()") Signed-off-by: Christopher S M Hall Reviewed-by: Corinna Vinschen --- drivers/net/ethernet/intel/igc/igc_ptp.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/net/ethernet/intel/igc/igc_ptp.c b/drivers/net/ethernet/intel/igc/igc_ptp.c index 00cc80d8d164..fb885fcaa97c 100644 --- a/drivers/net/ethernet/intel/igc/igc_ptp.c +++ b/drivers/net/ethernet/intel/igc/igc_ptp.c @@ -1011,16 +1011,16 @@ static int igc_phc_get_syncdevicetime(ktime_t *device, int err, count = 100; ktime_t t1, t2_curr; - /* Get a snapshot of system clocks to use as historic value. */ - ktime_get_snapshot(&adapter->snapshot); - + /* Doing this in a loop because in the event of a + * badly timed (ha!) system clock adjustment, we may + * get PTM errors from the PCI root, but these errors + * are transitory. Repeating the process returns valid + * data eventually. + */ do { - /* Doing this in a loop because in the event of a - * badly timed (ha!) system clock adjustment, we may - * get PTM errors from the PCI root, but these errors - * are transitory. Repeating the process returns valid - * data eventually. - */ + /* Get a snapshot of system clocks to use as historic value. */ + ktime_get_snapshot(&adapter->snapshot); + igc_ptm_trigger(hw); err = readx_poll_timeout(rd32, IGC_PTM_STAT, stat, From patchwork Wed Aug 7 00:30:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Hall, Christopher S" X-Patchwork-Id: 1969755 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=osuosl.org header.i=@osuosl.org header.a=rsa-sha256 header.s=default header.b=k7/x/ZFX; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=osuosl.org (client-ip=2605:bc80:3010::137; helo=smtp4.osuosl.org; envelope-from=intel-wired-lan-bounces@osuosl.org; receiver=patchwork.ozlabs.org) Received: from smtp4.osuosl.org (smtp4.osuosl.org [IPv6:2605:bc80:3010::137]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Wdrpp0k5rz1yfC for ; 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Wed, 7 Aug 2024 00:36:56 +0000 (UTC) X-CSE-ConnectionGUID: +NGJiP3XS0+6+QOwJAFZmQ== X-CSE-MsgGUID: N6mWbsosQo2aUh+FIt8BCA== X-IronPort-AV: E=McAfee;i="6700,10204,11156"; a="31669760" X-IronPort-AV: E=Sophos;i="6.09,268,1716274800"; d="scan'208";a="31669760" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Aug 2024 17:36:57 -0700 X-CSE-ConnectionGUID: Zc8pSRbkQyWw8Xd5UfY+bQ== X-CSE-MsgGUID: qPZar2KpSm6T7COtEGBoHg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,268,1716274800"; d="scan'208";a="61497020" Received: from timelab-spr09.ch.intel.com (HELO timelab-spr09.sc.intel.com) ([143.182.136.138]) by orviesa003.jf.intel.com with ESMTP; 06 Aug 2024 17:36:56 -0700 From: christopher.s.hall@intel.com To: intel-wired-lan@lists.osuosl.org Date: Tue, 6 Aug 2024 17:30:31 -0700 Message-Id: <20240807003032.10300-5-christopher.s.hall@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240807003032.10300-1-christopher.s.hall@intel.com> References: <20240807003032.10300-1-christopher.s.hall@intel.com> MIME-Version: 1.0 X-Mailman-Original-DKIM-Signature: v=1; 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Fixes: a90ec8483732 ("igc: Add support for PTP getcrosststamp()") Signed-off-by: Christopher S M Hall --- drivers/net/ethernet/intel/igc/igc_ptp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/intel/igc/igc_ptp.c b/drivers/net/ethernet/intel/igc/igc_ptp.c index fb885fcaa97c..f770e39650ef 100644 --- a/drivers/net/ethernet/intel/igc/igc_ptp.c +++ b/drivers/net/ethernet/intel/igc/igc_ptp.c @@ -1008,8 +1008,8 @@ static int igc_phc_get_syncdevicetime(ktime_t *device, u32 stat, t2_curr_h, t2_curr_l; struct igc_adapter *adapter = ctx; struct igc_hw *hw = &adapter->hw; - int err, count = 100; ktime_t t1, t2_curr; + int err, count = 8; /* Doing this in a loop because in the event of a * badly timed (ha!) system clock adjustment, we may From patchwork Wed Aug 7 00:30:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Hall, Christopher S" X-Patchwork-Id: 1969756 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1722991019; x=1754527019; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Rdr9qX500IejMlvTst8ST2srghzPY596qYKAm+Pca6Q=; b=ckc9Va+grWskq5W1m8birbJbQVzSQHFXiB7UJ0VAKqn4MkArsTtatJxj YnVcvoc+WzGraqTcE3ajI8+s3gczZubN2o3qnSvP6zsy/a9vqZcXJYbjQ dhkCyW2FSnukEM700R0Bp7eHpeYdQ25M1IpIMPWyNx2hiWzcHWuTahOK6 arHA4YuAIvMQbQWZ+EW6yRl7zcetlAEQbzK9CSt2Hb3MTHkTT7mqmUS/H D1Fxf7ZY5LBNl8NnDr+JWG/Pk1DpOt6N7zORR9FLUSHY+UOEb8gVThVEQ 4ojmu6b5EbXN1cHeFcHV5c2ATH1sNRyC6Bn+Ow85oXC/ntk/DcHyIIHMM A==; X-Mailman-Original-Authentication-Results: smtp3.osuosl.org; dmarc=pass (p=none dis=none) header.from=intel.com X-Mailman-Original-Authentication-Results: smtp3.osuosl.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=ckc9Va+g Subject: [Intel-wired-lan] [PATCH iwl-net v1 5/5] igc: Add lock preventing multiple simultaneous PTM transactions X-BeenThere: intel-wired-lan@osuosl.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Wired Ethernet Linux Kernel Driver Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Christopher S M Hall , david.zage@intel.com, vinschen@redhat.com, vinicius.gomes@intel.com, netdev@vger.kernel.org, rodrigo.cadore@l-acoustics.com Errors-To: intel-wired-lan-bounces@osuosl.org Sender: "Intel-wired-lan" From: Christopher S M Hall Add a mutex around the PTM transaction to prevent multiple transactors Multiple processes try to initiate a PTM transaction, one or all may fail. This can be reproduced by running two instances of the following: $ sudo phc2sys -O 0 -i tsn0 -m PHC2SYS exits with: "ioctl PTP_OFFSET_PRECISE: Connection timed out" when the PTM transaction fails Note: Normally two instance of PHC2SYS will not run, but one process should not break another. Fixes: a90ec8483732 ("igc: Add support for PTP getcrosststamp()") Signed-off-by: Christopher S M Hall --- drivers/net/ethernet/intel/igc/igc.h | 1 + drivers/net/ethernet/intel/igc/igc_ptp.c | 12 ++++++++++-- 2 files changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/intel/igc/igc.h b/drivers/net/ethernet/intel/igc/igc.h index c38b4d0f00ce..fbac02c79178 100644 --- a/drivers/net/ethernet/intel/igc/igc.h +++ b/drivers/net/ethernet/intel/igc/igc.h @@ -315,6 +315,7 @@ struct igc_adapter { struct timespec64 prev_ptp_time; /* Pre-reset PTP clock */ ktime_t ptp_reset_start; /* Reset time in clock mono */ struct system_time_snapshot snapshot; + struct mutex ptm_lock; /* Only allow one PTM transaction at a time */ char fw_version[32]; diff --git a/drivers/net/ethernet/intel/igc/igc_ptp.c b/drivers/net/ethernet/intel/igc/igc_ptp.c index f770e39650ef..c70a6393c210 100644 --- a/drivers/net/ethernet/intel/igc/igc_ptp.c +++ b/drivers/net/ethernet/intel/igc/igc_ptp.c @@ -1068,9 +1068,16 @@ static int igc_ptp_getcrosststamp(struct ptp_clock_info *ptp, { struct igc_adapter *adapter = container_of(ptp, struct igc_adapter, ptp_caps); + int ret; - return get_device_system_crosststamp(igc_phc_get_syncdevicetime, - adapter, &adapter->snapshot, cts); + /* This blocks until any in progress PTM transactions complete */ + mutex_lock(&adapter->ptm_lock); + + ret = get_device_system_crosststamp(igc_phc_get_syncdevicetime, + adapter, &adapter->snapshot, cts); + mutex_unlock(&adapter->ptm_lock); + + return ret; } static int igc_ptp_getcyclesx64(struct ptp_clock_info *ptp, @@ -1302,6 +1309,7 @@ void igc_ptp_reset(struct igc_adapter *adapter) wr32(IGC_PTM_CTRL, ctrl); /* Force the first cycle to run. */ + mutex_init(&adapter->ptm_lock); igc_ptm_trigger(hw); if (readx_poll_timeout_atomic(rd32, IGC_PTM_STAT, stat,