From patchwork Tue Aug 6 03:23:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: You-Sheng Yang X-Patchwork-Id: 1969290 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ubuntu.com (client-ip=185.125.189.65; helo=lists.ubuntu.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=patchwork.ozlabs.org) Received: from lists.ubuntu.com (lists.ubuntu.com [185.125.189.65]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4WdJYt2cVrz1ybS for ; Tue, 6 Aug 2024 13:24:02 +1000 (AEST) Received: from localhost ([127.0.0.1] helo=lists.ubuntu.com) by lists.ubuntu.com with esmtp (Exim 4.86_2) (envelope-from ) id 1sbAnk-0002GB-Mp; Tue, 06 Aug 2024 03:23:56 +0000 Received: from mail-pl1-f180.google.com ([209.85.214.180]) by lists.ubuntu.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1sbAnj-0002EA-0r for kernel-team@lists.ubuntu.com; Tue, 06 Aug 2024 03:23:55 +0000 Received: by mail-pl1-f180.google.com with SMTP id d9443c01a7336-1ff1cd07f56so938945ad.2 for ; Mon, 05 Aug 2024 20:23:54 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1722914632; x=1723519432; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Vk0EwqxpNPHPvr1+FKeAkR+yPUthvaWbxi45v1SLsZA=; b=Wdj8nJwWbP9gdYF8O1EtXJgpiiuobp0cs3jQ5n+fsg4vNxyV/JADEHsLRM23fTMvsE P5d7qUywbG54cpUbxKCdQKEe9LnOC5+oIYTGWFlMffLQk2muR3nGFKev5VbA6nWkfXIu 75XJ4lGzuvfrQEIt+TZnO/8UPCOMmFXINyy5+I4Gb7siO4zar5+cS+9Ms3CFBGt76KLA 2KdeWzfrNFr3clinx0KSap+MeeyMm9W6tW6Iu+w77m2obE6gWEJGChPT4tn8nhIRwjI5 FVPFTwPmQySZK6itcpZJFP1vEYEPENlOAPVh8SS3gerHpY6+WZLr7MtkZzdts354OdSo Z9wg== X-Gm-Message-State: AOJu0YxdBglKUdlap3lQvzod98/k1tt2vey91iJ9g9oIM5YlqpukPCEK iFwzUU9ptGXzWFGwO16ixHz8HpBLzM9FfwZl9Ekplsshf/G1ENHNjj7cOw== X-Google-Smtp-Source: AGHT+IFxawCxGja65YwXZ7ZdG+TcNJMqFuLT9zyaa83ZmirjO6bp4X6pJu4DkqkH9fmK+8F/pVbCMQ== X-Received: by 2002:a17:902:e745:b0:1fc:2e36:511a with SMTP id d9443c01a7336-1ff57258727mr186969415ad.14.1722914632460; Mon, 05 Aug 2024 20:23:52 -0700 (PDT) Received: from localhost.localdomain (125-229-129-140.hinet-ip.hinet.net. [125.229.129.140]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-1ff5927ef2bsm76417765ad.227.2024.08.05.20.23.50 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Aug 2024 20:23:51 -0700 (PDT) From: You-Sheng Yang To: kernel-team@lists.ubuntu.com Subject: [PATCH 1/2][SRU][Noble] drm/amdgpu/vcn: identify unified queue in sw init Date: Tue, 6 Aug 2024 11:23:31 +0800 Message-ID: <20240806032332.2709402-2-vicamo.yang@canonical.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240806032332.2709402-1-vicamo.yang@canonical.com> References: <20240806032332.2709402-1-vicamo.yang@canonical.com> MIME-Version: 1.0 Received-SPF: pass client-ip=209.85.214.180; envelope-from=vicamo@gmail.com; helo=mail-pl1-f180.google.com X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Boyuan Zhang BugLink: https://bugs.launchpad.net/bugs/2073282 Determine whether VCN using unified queue in sw_init, instead of calling functions later on. v2: fix coding style Signed-off-by: Boyuan Zhang Acked-by: Alex Deucher Reviewed-by: Ruijing Dong Signed-off-by: Alex Deucher (backported from commit ecfa23c8df7ef3ea2a429dfe039341bf792e95b4) Signed-off-by: You-Sheng Yang --- drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 39 ++++++++++--------------- drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h | 1 + 2 files changed, 16 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c index f4963330c772a..6b0b7ddf9c337 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c @@ -137,6 +137,10 @@ int amdgpu_vcn_sw_init(struct amdgpu_device *adev) } } + /* from vcn4 and above, only unified queue is used */ + adev->vcn.using_unified_queue = + amdgpu_ip_version(adev, UVD_HWIP, 0) >= IP_VERSION(4, 0, 0); + hdr = (const struct common_firmware_header *)adev->vcn.fw->data; adev->vcn.fw_version = le32_to_cpu(hdr->ucode_version); @@ -261,18 +265,6 @@ int amdgpu_vcn_sw_fini(struct amdgpu_device *adev) return 0; } -/* from vcn4 and above, only unified queue is used */ -static bool amdgpu_vcn_using_unified_queue(struct amdgpu_ring *ring) -{ - struct amdgpu_device *adev = ring->adev; - bool ret = false; - - if (amdgpu_ip_version(adev, UVD_HWIP, 0) >= IP_VERSION(4, 0, 0)) - ret = true; - - return ret; -} - bool amdgpu_vcn_is_disabled_vcn(struct amdgpu_device *adev, enum vcn_ring_type type, uint32_t vcn_instance) { bool ret = false; @@ -709,12 +701,11 @@ static int amdgpu_vcn_dec_sw_send_msg(struct amdgpu_ring *ring, struct amdgpu_job *job; struct amdgpu_ib *ib; uint64_t addr = AMDGPU_GPU_PAGE_ALIGN(ib_msg->gpu_addr); - bool sq = amdgpu_vcn_using_unified_queue(ring); uint32_t *ib_checksum; uint32_t ib_pack_in_dw; int i, r; - if (sq) + if (adev->vcn.using_unified_queue) ib_size_dw += 8; r = amdgpu_job_alloc_with_ib(ring->adev, NULL, NULL, @@ -727,7 +718,7 @@ static int amdgpu_vcn_dec_sw_send_msg(struct amdgpu_ring *ring, ib->length_dw = 0; /* single queue headers */ - if (sq) { + if (adev->vcn.using_unified_queue) { ib_pack_in_dw = sizeof(struct amdgpu_vcn_decode_buffer) / sizeof(uint32_t) + 4 + 2; /* engine info + decoding ib in dw */ ib_checksum = amdgpu_vcn_unified_ring_ib_header(ib, ib_pack_in_dw, false); @@ -746,7 +737,7 @@ static int amdgpu_vcn_dec_sw_send_msg(struct amdgpu_ring *ring, for (i = ib->length_dw; i < ib_size_dw; ++i) ib->ptr[i] = 0x0; - if (sq) + if (adev->vcn.using_unified_queue) amdgpu_vcn_unified_ring_ib_checksum(&ib_checksum, ib_pack_in_dw); r = amdgpu_job_submit_direct(job, ring, &f); @@ -836,15 +827,15 @@ static int amdgpu_vcn_enc_get_create_msg(struct amdgpu_ring *ring, uint32_t hand struct dma_fence **fence) { unsigned int ib_size_dw = 16; + struct amdgpu_device *adev = ring->adev; struct amdgpu_job *job; struct amdgpu_ib *ib; struct dma_fence *f = NULL; uint32_t *ib_checksum = NULL; uint64_t addr; - bool sq = amdgpu_vcn_using_unified_queue(ring); int i, r; - if (sq) + if (adev->vcn.using_unified_queue) ib_size_dw += 8; r = amdgpu_job_alloc_with_ib(ring->adev, NULL, NULL, @@ -858,7 +849,7 @@ static int amdgpu_vcn_enc_get_create_msg(struct amdgpu_ring *ring, uint32_t hand ib->length_dw = 0; - if (sq) + if (adev->vcn.using_unified_queue) ib_checksum = amdgpu_vcn_unified_ring_ib_header(ib, 0x11, true); ib->ptr[ib->length_dw++] = 0x00000018; @@ -880,7 +871,7 @@ static int amdgpu_vcn_enc_get_create_msg(struct amdgpu_ring *ring, uint32_t hand for (i = ib->length_dw; i < ib_size_dw; ++i) ib->ptr[i] = 0x0; - if (sq) + if (adev->vcn.using_unified_queue) amdgpu_vcn_unified_ring_ib_checksum(&ib_checksum, 0x11); r = amdgpu_job_submit_direct(job, ring, &f); @@ -903,15 +894,15 @@ static int amdgpu_vcn_enc_get_destroy_msg(struct amdgpu_ring *ring, uint32_t han struct dma_fence **fence) { unsigned int ib_size_dw = 16; + struct amdgpu_device *adev = ring->adev; struct amdgpu_job *job; struct amdgpu_ib *ib; struct dma_fence *f = NULL; uint32_t *ib_checksum = NULL; uint64_t addr; - bool sq = amdgpu_vcn_using_unified_queue(ring); int i, r; - if (sq) + if (adev->vcn.using_unified_queue) ib_size_dw += 8; r = amdgpu_job_alloc_with_ib(ring->adev, NULL, NULL, @@ -925,7 +916,7 @@ static int amdgpu_vcn_enc_get_destroy_msg(struct amdgpu_ring *ring, uint32_t han ib->length_dw = 0; - if (sq) + if (adev->vcn.using_unified_queue) ib_checksum = amdgpu_vcn_unified_ring_ib_header(ib, 0x11, true); ib->ptr[ib->length_dw++] = 0x00000018; @@ -947,7 +938,7 @@ static int amdgpu_vcn_enc_get_destroy_msg(struct amdgpu_ring *ring, uint32_t han for (i = ib->length_dw; i < ib_size_dw; ++i) ib->ptr[i] = 0x0; - if (sq) + if (adev->vcn.using_unified_queue) amdgpu_vcn_unified_ring_ib_checksum(&ib_checksum, 0x11); r = amdgpu_job_submit_direct(job, ring, &f); diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h index 514c98ea144f9..049f539d98699 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h @@ -287,6 +287,7 @@ struct amdgpu_vcn { uint16_t inst_mask; uint8_t num_inst_per_aid; + bool using_unified_queue; }; struct amdgpu_fw_shared_rb_ptrs_struct { From patchwork Tue Aug 6 03:23:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: You-Sheng Yang X-Patchwork-Id: 1969291 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ubuntu.com (client-ip=185.125.189.65; helo=lists.ubuntu.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=patchwork.ozlabs.org) Received: from lists.ubuntu.com (lists.ubuntu.com [185.125.189.65]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4WdJYv6rgbz1ybS for ; Tue, 6 Aug 2024 13:24:03 +1000 (AEST) Received: from localhost ([127.0.0.1] helo=lists.ubuntu.com) by lists.ubuntu.com with esmtp (Exim 4.86_2) (envelope-from ) id 1sbAnm-0002Io-Ri; Tue, 06 Aug 2024 03:23:58 +0000 Received: from mail-pg1-f175.google.com ([209.85.215.175]) by lists.ubuntu.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1sbAnk-0002Eq-4N for kernel-team@lists.ubuntu.com; Tue, 06 Aug 2024 03:23:56 +0000 Received: by mail-pg1-f175.google.com with SMTP id 41be03b00d2f7-7a115c427f1so124790a12.0 for ; Mon, 05 Aug 2024 20:23:55 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1722914634; x=1723519434; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Ezo81I7ZzKgw14UN0ammF9rA0uKUvfYEJw1q5fmGEec=; b=i3GE5MfC+guR3riyHj2goBNRAxDBeSE4kCI3VZfalxwTkrW3JYundFDaKVT6ji/eff K98rYk8+RajHGuG80DAtkOzab4ng/lrQMSXtnbDwBu7EpWP05AwIr8uotRmc1YFTAz74 gA/gkynXruSuiBjocdeU35/jwEfmIjWPicAm1KQONrcpeAgve8ByiBLK5/ATBBQ/9wab EYu07Pfte4ojxaET1QYKgvtmjzUIiVX8h40mo8MhdRqwgk/b/AY2WURqyTcmJupx6p4B NbiOGHR1MA53QCcEbwCB3UC77oqPd6n4l8txr5suq2vL2MGG9iOrDHi2teXr/O7FSikk HACQ== X-Gm-Message-State: AOJu0Yy7/EO6dBSYvPAmvWATfcIDhxpvvWt//rCdP3zVxbxW6k7t67/Q PItQfIeVriNbS0698kwn+63Uj52W3TMCDYCvvld4BWOmqVUfQQ3hPQBk7Q== X-Google-Smtp-Source: AGHT+IFLs7bzUQ1eHEuVK6ddDbxdAUW+mr+D5itAt6r7VVqIrhYq8svMFuTIAxyc72khAdeIAstRPg== X-Received: by 2002:a05:6a20:394b:b0:1c2:8e11:5ae9 with SMTP id adf61e73a8af0-1c69953c6ccmr15240841637.5.1722914634035; Mon, 05 Aug 2024 20:23:54 -0700 (PDT) Received: from localhost.localdomain (125-229-129-140.hinet-ip.hinet.net. [125.229.129.140]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-1ff5927ef2bsm76417765ad.227.2024.08.05.20.23.52 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Aug 2024 20:23:53 -0700 (PDT) From: You-Sheng Yang To: kernel-team@lists.ubuntu.com Subject: [PATCH 2/2][SRU][Noble] drm/amdgpu/vcn: not pause dpg for unified queue Date: Tue, 6 Aug 2024 11:23:32 +0800 Message-ID: <20240806032332.2709402-3-vicamo.yang@canonical.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240806032332.2709402-1-vicamo.yang@canonical.com> References: <20240806032332.2709402-1-vicamo.yang@canonical.com> MIME-Version: 1.0 Received-SPF: pass client-ip=209.85.215.175; envelope-from=vicamo@gmail.com; helo=mail-pg1-f175.google.com X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Boyuan Zhang BugLink: https://bugs.launchpad.net/bugs/2073282 For unified queue, DPG pause for encoding is done inside VCN firmware, so there is no need to pause dpg based on ring type in kernel. For VCN3 and below, pausing DPG for encoding in kernel is still needed. v2: add more comments v3: update commit message Signed-off-by: Boyuan Zhang Acked-by: Alex Deucher Reviewed-by: Ruijing Dong Signed-off-by: Alex Deucher (cherry picked from commit 7d75ef3736a025db441be652c8cc8e84044a215f) Signed-off-by: You-Sheng Yang --- drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c index 6b0b7ddf9c337..afc97ad346100 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c @@ -374,7 +374,9 @@ static void amdgpu_vcn_idle_work_handler(struct work_struct *work) for (i = 0; i < adev->vcn.num_enc_rings; ++i) fence[j] += amdgpu_fence_count_emitted(&adev->vcn.inst[j].ring_enc[i]); - if (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) { + /* Only set DPG pause for VCN3 or below, VCN4 and above will be handled by FW */ + if (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG && + !adev->vcn.using_unified_queue) { struct dpg_pause_state new_state; if (fence[j] || @@ -420,7 +422,9 @@ void amdgpu_vcn_ring_begin_use(struct amdgpu_ring *ring) amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCN, AMD_PG_STATE_UNGATE); - if (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG) { + /* Only set DPG pause for VCN3 or below, VCN4 and above will be handled by FW */ + if (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG && + !adev->vcn.using_unified_queue) { struct dpg_pause_state new_state; if (ring->funcs->type == AMDGPU_RING_TYPE_VCN_ENC) { @@ -446,8 +450,12 @@ void amdgpu_vcn_ring_begin_use(struct amdgpu_ring *ring) void amdgpu_vcn_ring_end_use(struct amdgpu_ring *ring) { + struct amdgpu_device *adev = ring->adev; + + /* Only set DPG pause for VCN3 or below, VCN4 and above will be handled by FW */ if (ring->adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG && - ring->funcs->type == AMDGPU_RING_TYPE_VCN_ENC) + ring->funcs->type == AMDGPU_RING_TYPE_VCN_ENC && + !adev->vcn.using_unified_queue) atomic_dec(&ring->adev->vcn.inst[ring->me].dpg_enc_submission_cnt); atomic_dec(&ring->adev->vcn.total_submission_cnt);