From patchwork Fri Aug 2 22:56:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Karlman X-Patchwork-Id: 1968585 X-Patchwork-Delegate: ykai007@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=kwiboo.se header.i=@kwiboo.se header.a=rsa-sha256 header.s=fe-e1b5cab7be header.b=xOYo9OEh; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4WbLnj5QBWz1ybX for ; Sat, 3 Aug 2024 08:57:29 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 9595788C15; Sat, 3 Aug 2024 00:57:21 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kwiboo.se Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; secure) header.d=kwiboo.se header.i=@kwiboo.se header.b="xOYo9OEh"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 5FE1188C15; Sat, 3 Aug 2024 00:57:20 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_VALIDITY_RPBL_BLOCKED, RCVD_IN_VALIDITY_SAFE_BLOCKED,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from smtp.forwardemail.net (smtp.forwardemail.net [149.28.215.223]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id E5C5C88BF5 for ; Sat, 3 Aug 2024 00:57:17 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kwiboo.se Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=SRS0=5651=PC=kwiboo.se=jonas@fe-bounces.kwiboo.se DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kwiboo.se; h=Content-Transfer-Encoding: MIME-Version: References: In-Reply-To: Message-ID: Date: Subject: Cc: To: From; q=dns/txt; s=fe-e1b5cab7be; t=1722639432; bh=rF6i/0I1/7NtgWhoWYeuHW0F1aGo8vqWsy5gGRKTBBQ=; b=xOYo9OEhpJl0Ld8zvwfmtN0u/dEJWMvXjRq2+V/XfZARRMF6qNH7lVSB2AyNuGfThHQMfeQUP hgOuWZsosyYwRvXZtlbRE4AauM5NKtqSwYJtYVsvqSa65hSmuuX2HvtZh04rd+u3+ouwUQGC7L4 fXPQTghTfpfaX9DTHj6oPPC6usHIEWklkm6DMFgMLzZ7iN5QryLjUXcTzpfKrxrHRMbIdoFDrp2 v2SVHqyBYsp5h03GMH83/qar9uVt04qeLvRkIZTCgTcrZZPiU8NSquZBdPsBdzHStBX1LBTUqXS WalKG8Fuc01/CqzJlDjvKUP1mRqLvr6Oh3tTAVShzsfg== From: Jonas Karlman To: Kever Yang , Simon Glass , Philipp Tomsich , Tom Rini Cc: u-boot@lists.denx.de, Jonas Karlman Subject: [PATCH v2 01/10] pinctrl: rockchip: Use syscon_regmap_lookup_by_phandle() Date: Fri, 2 Aug 2024 22:56:43 +0000 Message-ID: <20240802225705.2640999-2-jonas@kwiboo.se> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240802225705.2640999-1-jonas@kwiboo.se> References: <20240802225705.2640999-1-jonas@kwiboo.se> MIME-Version: 1.0 X-Report-Abuse-To: abuse@forwardemail.net X-Report-Abuse: abuse@forwardemail.net X-Complaints-To: abuse@forwardemail.net X-ForwardEmail-Version: 0.4.40 X-ForwardEmail-Sender: rfc822; jonas@kwiboo.se, smtp.forwardemail.net, 149.28.215.223 X-ForwardEmail-ID: 66ad644816ac7a56c917ae79 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Use syscon_regmap_lookup_by_phandle() to simplify the code. Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang Reviewed-by: Quentin Schulz --- v2: Collect r-b tag --- .../pinctrl/rockchip/pinctrl-rockchip-core.c | 39 ++++++------------- 1 file changed, 12 insertions(+), 27 deletions(-) diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c index d449d07d32e7..f6af22501c36 100644 --- a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c +++ b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include "pinctrl-rockchip.h" @@ -640,37 +641,21 @@ int rockchip_pinctrl_probe(struct udevice *dev) { struct rockchip_pinctrl_priv *priv = dev_get_priv(dev); struct rockchip_pin_ctrl *ctrl; - struct udevice *syscon; - struct regmap *regmap; - int ret = 0; - /* get rockchip grf syscon phandle */ - ret = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, "rockchip,grf", - &syscon); - if (ret) { - debug("unable to find rockchip,grf syscon device (%d)\n", ret); - return ret; + priv->regmap_base = + syscon_regmap_lookup_by_phandle(dev, "rockchip,grf"); + if (IS_ERR(priv->regmap_base)) { + debug("unable to find rockchip,grf regmap\n"); + return PTR_ERR(priv->regmap_base); } - /* get grf-reg base address */ - regmap = syscon_get_regmap(syscon); - if (!regmap) { - debug("unable to find rockchip grf regmap\n"); - return -ENODEV; - } - priv->regmap_base = regmap; - - /* option: get pmu-reg base address */ - ret = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, "rockchip,pmu", - &syscon); - if (!ret) { - /* get pmugrf-reg base address */ - regmap = syscon_get_regmap(syscon); - if (!regmap) { - debug("unable to find rockchip pmu regmap\n"); - return -ENODEV; + if (dev_read_bool(dev, "rockchip,pmu")) { + priv->regmap_pmu = + syscon_regmap_lookup_by_phandle(dev, "rockchip,pmu"); + if (IS_ERR(priv->regmap_pmu)) { + debug("unable to find rockchip,pmu regmap\n"); + return PTR_ERR(priv->regmap_pmu); } - priv->regmap_pmu = regmap; } ctrl = rockchip_pinctrl_get_soc_data(dev); From patchwork Fri Aug 2 22:56:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Karlman X-Patchwork-Id: 1968587 X-Patchwork-Delegate: ykai007@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=kwiboo.se header.i=@kwiboo.se header.a=rsa-sha256 header.s=fe-e1b5cab7be header.b=JaQxwQ/O; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4WbLnz3QVcz1ybX for ; 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Sat, 3 Aug 2024 00:57:21 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kwiboo.se Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=SRS0=5651=PC=kwiboo.se=jonas@fe-bounces.kwiboo.se DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kwiboo.se; h=Content-Transfer-Encoding: MIME-Version: References: In-Reply-To: Message-ID: Date: Subject: Cc: To: From; q=dns/txt; s=fe-e1b5cab7be; t=1722639437; bh=SWTLCgE982SKoxCFjxYhFEajUtPMhsIptuBdl5mFecA=; b=JaQxwQ/OeBv3h90Gefu0IJpIngpks29ijQocptklNdzpRZ8fsXxTJJ3kvueo4Jf7CHRmt6ZVG 3PMLTBpwHWbsl6UlebIasFmMtrbKf0l5yL/+Tb/Jl+AL1Zj+FqMOAT/OpkmIW1OlRvYGfzITrP5 JbNRjWpEx46a1mw8KrKYlTQQEZVNYQXYOj93zw+yQnh5OvYp3WxjEr/hC2TvTS5LTUs4cUIYRgf szlvIbv61yhlP2+HdbyqaceTad7cYm++FD557szbgUqasSpo2Hny2tk6DHQ0vLGiEFuQGA93RCb /RUFp+CQT/qkQwoO5wSb8sBR0ZM56lyx+KOHEzZ6YCrw== From: Jonas Karlman To: Kever Yang , Simon Glass , Philipp Tomsich , Tom Rini Cc: u-boot@lists.denx.de, Jonas Karlman Subject: [PATCH v2 02/10] pinctrl: rockchip: Add a pin_to_bank() helper Date: Fri, 2 Aug 2024 22:56:44 +0000 Message-ID: <20240802225705.2640999-3-jonas@kwiboo.se> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240802225705.2640999-1-jonas@kwiboo.se> References: <20240802225705.2640999-1-jonas@kwiboo.se> MIME-Version: 1.0 X-Report-Abuse-To: abuse@forwardemail.net X-Report-Abuse: abuse@forwardemail.net X-Complaints-To: abuse@forwardemail.net X-ForwardEmail-Version: 0.4.40 X-ForwardEmail-Sender: rfc822; jonas@kwiboo.se, smtp.forwardemail.net, 149.28.215.223 X-ForwardEmail-ID: 66ad644b16ac7a56c917ae8d X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Add a pin_to_bank() helper that can locate a pin bank based on the pin offset, to be used in get_gpio_mux() and gpio_request_enable() ops. Reset ctrl->nr_pins to 0 so that pin_to_bank() can locate a bank after the second probe in U-Boot proper. Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang --- v2: New patch split from "pinctrl: rockchip: Add gpio_request_enable() ops" of "rockchip: Add gpio request() ops" series --- .../pinctrl/rockchip/pinctrl-rockchip-core.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c index f6af22501c36..894ff74aee98 100644 --- a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c +++ b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c @@ -176,6 +176,23 @@ static int rockchip_get_mux(struct rockchip_pin_bank *bank, int pin) return ((val >> bit) & mask); } +static struct rockchip_pin_bank *rockchip_pin_to_bank(struct udevice *dev, + unsigned int pin) +{ + struct rockchip_pinctrl_priv *priv = dev_get_priv(dev); + struct rockchip_pin_ctrl *ctrl = priv->ctrl; + struct rockchip_pin_bank *bank = ctrl->pin_banks; + int i; + + for (i = 0; i < ctrl->nr_banks; ++i, ++bank) { + if (pin >= bank->pin_base && + pin < bank->pin_base + bank->nr_pins) + return bank; + } + + return NULL; +} + static int rockchip_pinctrl_get_gpio_mux(struct udevice *dev, int banknum, int index) { struct rockchip_pinctrl_priv *priv = dev_get_priv(dev); @@ -539,6 +556,7 @@ static struct rockchip_pin_ctrl *rockchip_pinctrl_get_soc_data(struct udevice *d drv_pmu_offs = ctrl->pmu_drv_offset; drv_grf_offs = ctrl->grf_drv_offset; bank = ctrl->pin_banks; + ctrl->nr_pins = 0; for (i = 0; i < ctrl->nr_banks; ++i, ++bank) { int bank_pins = 0; From patchwork Fri Aug 2 22:56:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Karlman X-Patchwork-Id: 1968589 X-Patchwork-Delegate: ykai007@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=kwiboo.se header.i=@kwiboo.se header.a=rsa-sha256 header.s=fe-e1b5cab7be header.b=JS/HVTEx; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; 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q=dns/txt; s=fe-e1b5cab7be; t=1722639440; bh=oguyFWflTa+oS4eqvecFHxt4HthZ9ur1qiVUkKQeFHo=; b=JS/HVTExntLkAVMuTnzDbnPlwiSGVnc8y77RNlGmKzpE/v89ClPhdecbpVEkhuSqXD6oUyP39 hM0xpKmBnKLBe+FkTqFfjy0SgyYgG5dYKDQf04o2jsl3t/o+bodj8v6mI45OxdkN7FAEIQ6WwQp PjOkmIWtLpGI6vs3rbZfOcUtjLVGaNal5Jci9VKAFmY+QDVxtwT+AHrVfBHKcDDbgOJSYEjz3xG +SxV6ja8QqqlNdlUuFGf633orlJS65PAd6UszD9bcjLzustyzM5QD/oRUUOrGrViNhY2o7OH3AS N6wTjhGVLNtmHO6RfKQwpiRow3+untEX1coLOApEqeSA== From: Jonas Karlman To: Kever Yang , Simon Glass , Philipp Tomsich , Tom Rini Cc: u-boot@lists.denx.de, Jonas Karlman Subject: [PATCH v2 03/10] pinctrl: rockchip: Update get_gpio_mux() ops Date: Fri, 2 Aug 2024 22:56:45 +0000 Message-ID: <20240802225705.2640999-4-jonas@kwiboo.se> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240802225705.2640999-1-jonas@kwiboo.se> References: <20240802225705.2640999-1-jonas@kwiboo.se> MIME-Version: 1.0 X-Report-Abuse-To: abuse@forwardemail.net X-Report-Abuse: abuse@forwardemail.net X-Complaints-To: abuse@forwardemail.net X-ForwardEmail-Version: 0.4.40 X-ForwardEmail-Sender: rfc822; jonas@kwiboo.se, smtp.forwardemail.net, 167.172.40.54 X-ForwardEmail-ID: 66ad644e16ac7a56c917ae9f X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Add a way to get_gpio_mux() based on the pinctrl pin offset, use -1 as banknum to use the pinctrl pin offset mode instead of bank pin offset. This mode will be used by the gpio driver to ensure a pin used by gpio request() and get_function() ops always refer to the same pinctrl pin. Also add verify_config() of banknum and index to avoid an out of range access of the pin_banks array, i.e. with gpio6 on rk3066a. Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang --- v2: Collect r-b tag The pin_to_mux() helper will also be used in the get_pin_muxing() ops added in next patch to support the pinmux status cmd. --- .../pinctrl/rockchip/pinctrl-rockchip-core.c | 22 ++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c index 894ff74aee98..8ede74da40c9 100644 --- a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c +++ b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c @@ -193,10 +193,30 @@ static struct rockchip_pin_bank *rockchip_pin_to_bank(struct udevice *dev, return NULL; } +static int rockchip_pin_to_mux(struct udevice *dev, unsigned int pin) +{ + struct rockchip_pin_bank *bank; + + bank = rockchip_pin_to_bank(dev, pin); + if (!bank) + return -EINVAL; + + return rockchip_get_mux(bank, pin - bank->pin_base); +} + static int rockchip_pinctrl_get_gpio_mux(struct udevice *dev, int banknum, int index) -{ struct rockchip_pinctrl_priv *priv = dev_get_priv(dev); +{ + struct rockchip_pinctrl_priv *priv = dev_get_priv(dev); struct rockchip_pin_ctrl *ctrl = priv->ctrl; + int ret; + + if (banknum == -1) + return rockchip_pin_to_mux(dev, index); + + ret = rockchip_verify_config(dev, banknum, index); + if (ret) + return ret; return rockchip_get_mux(&ctrl->pin_banks[banknum], index); } From patchwork Fri Aug 2 22:56:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Karlman X-Patchwork-Id: 1968588 X-Patchwork-Delegate: ykai007@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=kwiboo.se header.i=@kwiboo.se header.a=rsa-sha256 header.s=fe-e1b5cab7be header.b=rrWgAtUK; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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q=dns/txt; s=fe-e1b5cab7be; t=1722639442; bh=yVhQCCd1ltmMk/XqeJw78tajZpL3Hlxav12JlaLlrhA=; b=rrWgAtUKCJ4B7vKuJaZ4Jbv11er6gT1vaxT7qjrDBvjuiSX7M+6j+H6l8955oPFValBBLjBEx mth1bwpgztsL04RRtYIoNIuW0/1xAdkDU4EVPe7thTnkiqbCRYs+jyvnW+AfO+OzvCldsm8LjNR 8KmRdc4hl9CfyZyd0cmP7BDufk7/ssgoKQGQQmQHJV8F8dupAGoM8/YQVaZCBAj5i8OcKyNC3x7 IEB834uLDr4Vo05JYIYhxIC1HoFRz6ifLIvrEhLcFmq1pYzevOrX8q56oG8CKQoeDsKCzQyKHf0 QAooUdPEi1k5ZPkerGghvDFQXjivRpmGmr5nHxHkzQkg== From: Jonas Karlman To: Kever Yang , Simon Glass , Philipp Tomsich , Tom Rini Cc: u-boot@lists.denx.de, Jonas Karlman Subject: [PATCH v2 04/10] pinctrl: rockchip: Add pinmux status related ops Date: Fri, 2 Aug 2024 22:56:46 +0000 Message-ID: <20240802225705.2640999-5-jonas@kwiboo.se> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240802225705.2640999-1-jonas@kwiboo.se> References: <20240802225705.2640999-1-jonas@kwiboo.se> MIME-Version: 1.0 X-Report-Abuse-To: abuse@forwardemail.net X-Report-Abuse: abuse@forwardemail.net X-Complaints-To: abuse@forwardemail.net X-ForwardEmail-Version: 0.4.40 X-ForwardEmail-Sender: rfc822; jonas@kwiboo.se, smtp.forwardemail.net, 149.28.215.223 X-ForwardEmail-ID: 66ad645116ac7a56c917aeb7 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Add get_pins_count(), get_pin_name() and get_pin_muxing() ops to support the pinmux status cmd. => pinmux dev pinctrl dev: pinctrl => pinmux status GPIO0_A0 : gpio GPIO0_A1 : func-1 GPIO0_A2 : gpio GPIO0_A3 : gpio GPIO0_A4 : func-1 GPIO0_A5 : gpio GPIO0_A6 : gpio GPIO0_A7 : func-1 GPIO0_B0 : gpio GPIO0_B1 : func-1 GPIO0_B2 : func-1 GPIO0_B3 : gpio [...] The change to use ENOENT for unrouted pins also help hide a "Error -22" message for unrouted pins using the gpio status -a cmd. Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang --- v2: Collect r-b tag --- .../pinctrl/rockchip/pinctrl-rockchip-core.c | 50 ++++++++++++++++++- 1 file changed, 49 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c index 8ede74da40c9..345e0abdf5d1 100644 --- a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c +++ b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c @@ -126,7 +126,7 @@ static int rockchip_get_mux(struct rockchip_pin_bank *bank, int pin) if (bank->iomux[iomux_num].type & IOMUX_UNROUTED) { debug("pin %d is unrouted\n", pin); - return -EINVAL; + return -ENOENT; } if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY) @@ -193,6 +193,32 @@ static struct rockchip_pin_bank *rockchip_pin_to_bank(struct udevice *dev, return NULL; } +static int rockchip_pinctrl_get_pins_count(struct udevice *dev) +{ + struct rockchip_pinctrl_priv *priv = dev_get_priv(dev); + struct rockchip_pin_ctrl *ctrl = priv->ctrl; + + return ctrl->nr_pins; +} + +static const char *rockchip_pinctrl_get_pin_name(struct udevice *dev, + unsigned int selector) +{ + static char name[PINNAME_SIZE]; + struct rockchip_pin_bank *bank; + unsigned int index; + + bank = rockchip_pin_to_bank(dev, selector); + if (!bank) + return NULL; + + index = selector - bank->pin_base; + snprintf(name, sizeof(name), "GPIO%u_%c%u", + bank->bank_num, 'A' + (index / 8), index % 8); + + return name; +} + static int rockchip_pin_to_mux(struct udevice *dev, unsigned int pin) { struct rockchip_pin_bank *bank; @@ -221,6 +247,25 @@ static int rockchip_pinctrl_get_gpio_mux(struct udevice *dev, int banknum, return rockchip_get_mux(&ctrl->pin_banks[banknum], index); } +static int rockchip_pinctrl_get_pin_muxing(struct udevice *dev, + unsigned int selector, + char *buf, int size) +{ + int mux; + + mux = rockchip_pin_to_mux(dev, selector); + if (mux == -ENOENT) + strlcpy(buf, "unrouted", size); + else if (mux < 0) + return mux; + else if (mux) + snprintf(buf, size, "func-%d", mux); + else + strlcpy(buf, "gpio", size); + + return 0; +} + static int rockchip_verify_mux(struct rockchip_pin_bank *bank, int pin, int mux) { @@ -558,8 +603,11 @@ static int rockchip_pinctrl_set_state(struct udevice *dev, } const struct pinctrl_ops rockchip_pinctrl_ops = { + .get_pins_count = rockchip_pinctrl_get_pins_count, + .get_pin_name = rockchip_pinctrl_get_pin_name, .set_state = rockchip_pinctrl_set_state, .get_gpio_mux = rockchip_pinctrl_get_gpio_mux, + .get_pin_muxing = rockchip_pinctrl_get_pin_muxing, }; /* retrieve the soc specific data */ From patchwork Fri Aug 2 22:56:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Karlman X-Patchwork-Id: 1968591 X-Patchwork-Delegate: ykai007@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=kwiboo.se header.i=@kwiboo.se header.a=rsa-sha256 header.s=fe-e1b5cab7be header.b=mkYMUndS; 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a=rsa-sha256; c=relaxed/relaxed; d=kwiboo.se; h=Content-Transfer-Encoding: MIME-Version: References: In-Reply-To: Message-ID: Date: Subject: Cc: To: From; q=dns/txt; s=fe-e1b5cab7be; t=1722639445; bh=kY5SnPr3b/s4p/5MEwgE2B+8MI40+nQRNyQw1NT29O0=; b=mkYMUndSv9tv6PFtZJCfw0vaz5y+lm+yKq9f6UKwlKm2hd+0w5auVgW8jq17XYQV7h2/lalaB d5PtGC+z0mqyNVKC94U8iw3MkMDGMxKaXeDIABRpqpRW4MQaZRLnRd85uNm9Tp/fpeT6aPdkcjX ZT1rckd33QBloiWIojEStYBacet0gEFFmNOPz2IVUAImRFVKx6dVCM+C0SQytvv24ie8+i9/qAJ zdUNIHsp91gGiBOP6ix0HmVWOAXESnVXeUpoourB6jDN6Z6dhMIxF1sY+ca3N2NLPl3dxvLfHS/ QI3UL0CCpxtaUCWF6X+lnOiwC7JcEMKqatBJDI6ZZYzg== From: Jonas Karlman To: Kever Yang , Simon Glass , Philipp Tomsich , Tom Rini Cc: u-boot@lists.denx.de, Jonas Karlman Subject: [PATCH v2 05/10] pinctrl: rockchip: Add gpio_request_enable() ops Date: Fri, 2 Aug 2024 22:56:47 +0000 Message-ID: <20240802225705.2640999-6-jonas@kwiboo.se> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240802225705.2640999-1-jonas@kwiboo.se> References: <20240802225705.2640999-1-jonas@kwiboo.se> MIME-Version: 1.0 X-Report-Abuse-To: abuse@forwardemail.net X-Report-Abuse: abuse@forwardemail.net X-Complaints-To: abuse@forwardemail.net X-ForwardEmail-Version: 0.4.40 X-ForwardEmail-Sender: rfc822; jonas@kwiboo.se, smtp.forwardemail.net, 167.172.40.54 X-ForwardEmail-ID: 66ad645416ac7a56c917aec9 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Implement gpio_request_enable() ops so that the gpio request() ops can be implemented and a gpio requested pin automatically is pinmuxed for gpio use, similar to Linux kernel. Signed-off-by: Jonas Karlman Reviewed-by: Quentin Schulz Reviewed-by: Kever Yang --- v2: New patch from "rockchip: Add gpio request() ops" series --- drivers/pinctrl/rockchip/pinctrl-rockchip-core.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c index 345e0abdf5d1..e164af0d8f61 100644 --- a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c +++ b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c @@ -358,6 +358,18 @@ static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux) return 0; } +static int rockchip_pinctrl_gpio_request_enable(struct udevice *dev, + unsigned int selector) +{ + struct rockchip_pin_bank *bank; + + bank = rockchip_pin_to_bank(dev, selector); + if (!bank) + return -EINVAL; + + return rockchip_set_mux(bank, selector - bank->pin_base, RK_FUNC_GPIO); +} + static int rockchip_perpin_drv_list[DRV_TYPE_MAX][8] = { { 2, 4, 8, 12, -1, -1, -1, -1 }, { 3, 6, 9, 12, -1, -1, -1, -1 }, @@ -608,6 +620,7 @@ const struct pinctrl_ops rockchip_pinctrl_ops = { .set_state = rockchip_pinctrl_set_state, .get_gpio_mux = rockchip_pinctrl_get_gpio_mux, .get_pin_muxing = rockchip_pinctrl_get_pin_muxing, + .gpio_request_enable = rockchip_pinctrl_gpio_request_enable, }; /* retrieve the soc specific data */ From patchwork Fri Aug 2 22:56:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Karlman X-Patchwork-Id: 1968590 X-Patchwork-Delegate: ykai007@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=kwiboo.se header.i=@kwiboo.se header.a=rsa-sha256 header.s=fe-e1b5cab7be header.b=C4GuWTnq; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4WbLpZ65nnz1ybX for ; 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Sat, 3 Aug 2024 00:57:30 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kwiboo.se Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=SRS0=5651=PC=kwiboo.se=jonas@fe-bounces.kwiboo.se DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kwiboo.se; h=Content-Transfer-Encoding: MIME-Version: References: In-Reply-To: Message-ID: Date: Subject: Cc: To: From; q=dns/txt; s=fe-e1b5cab7be; t=1722639447; bh=bhh5Y5rdgM4P4oJqO8KAlqo0jvWCMJw5r0eAiaqW+EA=; b=C4GuWTnqLPAfcDOi07Fyz2XRsYnI2yrox8F+MBAT9fGe19XXLUszY1j1f6L1wOt0tkYxSjLm0 r3isLkTnwdlblpDoj91accn0RA3QvG3J10QBv+ZpovcXgPJUPOQH/EzCyKe45lblVJqRjkBqqPT uwLHfhC3hX3kJhj6xzvUTPgirpMojJZK9mBgj8BdNiqs9RuKLUznMaR0XLzimy8CuQXy+MsTIFM DaJpBZT62txUgCvsdUTlQlAAOtNPZmyRbO3ZU1iItgahIkwm8H8zRh8FCGDt/G93mZ+qNQHS9Wv GCIMXzcakJxOMm7s+PDjngKzr6b7rL6N/DGuwQCYGSqw== From: Jonas Karlman To: Kever Yang , Simon Glass , Philipp Tomsich , Tom Rini Cc: u-boot@lists.denx.de, Jonas Karlman Subject: [PATCH v2 06/10] gpio: rockchip: Get pinctrl device from gpio-ranges prop Date: Fri, 2 Aug 2024 22:56:48 +0000 Message-ID: <20240802225705.2640999-7-jonas@kwiboo.se> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240802225705.2640999-1-jonas@kwiboo.se> References: <20240802225705.2640999-1-jonas@kwiboo.se> MIME-Version: 1.0 X-Report-Abuse-To: abuse@forwardemail.net X-Report-Abuse: abuse@forwardemail.net X-Complaints-To: abuse@forwardemail.net X-ForwardEmail-Version: 0.4.40 X-ForwardEmail-Sender: rfc822; jonas@kwiboo.se, smtp.forwardemail.net, 149.28.215.223 X-ForwardEmail-ID: 66ad645616ac7a56c917aedb X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Get pinctrl device from gpio-ranges phandle when the property exists, fallback to get the first pinctrl device. Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang --- v2: Collect r-b tag --- drivers/gpio/rk_gpio.c | 27 +++++++++++++++++++-------- 1 file changed, 19 insertions(+), 8 deletions(-) diff --git a/drivers/gpio/rk_gpio.c b/drivers/gpio/rk_gpio.c index 24ba12dd820e..abece6409ae0 100644 --- a/drivers/gpio/rk_gpio.c +++ b/drivers/gpio/rk_gpio.c @@ -181,12 +181,6 @@ static int rockchip_gpio_probe(struct udevice *dev) priv->regs = dev_read_addr_ptr(dev); - if (CONFIG_IS_ENABLED(PINCTRL)) { - ret = uclass_first_device_err(UCLASS_PINCTRL, &priv->pinctrl); - if (ret) - return ret; - } - /* * If "gpio-ranges" is present in the devicetree use it to parse * the GPIO bank ID, otherwise use the legacy method. @@ -194,16 +188,33 @@ static int rockchip_gpio_probe(struct udevice *dev) ret = ofnode_parse_phandle_with_args(dev_ofnode(dev), "gpio-ranges", NULL, 3, 0, &args); - if (!ret || ret != -ENOENT) { + if (!ret) { uc_priv->gpio_count = args.args[2]; priv->bank = args.args[1] / ROCKCHIP_GPIOS_PER_BANK; - } else { + + if (CONFIG_IS_ENABLED(PINCTRL)) { + ret = uclass_get_device_by_ofnode(UCLASS_PINCTRL, + args.node, + &priv->pinctrl); + if (ret) + return ret; + } + } else if (ret == -ENOENT || !CONFIG_IS_ENABLED(PINCTRL)) { uc_priv->gpio_count = ROCKCHIP_GPIOS_PER_BANK; ret = dev_read_alias_seq(dev, &priv->bank); if (ret) { end = strrchr(dev->name, '@'); priv->bank = trailing_strtoln(dev->name, end); } + + if (CONFIG_IS_ENABLED(PINCTRL)) { + ret = uclass_first_device_err(UCLASS_PINCTRL, + &priv->pinctrl); + if (ret) + return ret; + } + } else { + return ret; } priv->name[0] = 'A' + priv->bank; From patchwork Fri Aug 2 22:56:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Karlman X-Patchwork-Id: 1968593 X-Patchwork-Delegate: ykai007@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; 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a=rsa-sha256; c=relaxed/relaxed; d=kwiboo.se; h=Content-Transfer-Encoding: MIME-Version: References: In-Reply-To: Message-ID: Date: Subject: Cc: To: From; q=dns/txt; s=fe-e1b5cab7be; t=1722639450; bh=eyA1FXago9QmRwcxhfr7KhwC9orBRDnI63jPHr1Luds=; b=EJDKfJB+S0ksLRrJxz4VF9TdGMcxkHbNl0zIKlNXRV4MEN8pLIhpaNgFE9WO6x20p++o9VUdA xOMKGG24Zl73upSeTF4l81/0JefMUU6/GwX/GMq21yXkVaqk1AXlJ3cvFFWhDbPuXftPWogBOd2 0K7pGKo+KCw2/o0+pkRsoYmsgWiubJs7jpt4crVyuqlGSQv1Pl8kyF2SxQ7yj2yv4mdugiW1Jtw 4FRlwmkWs/wmFq5bpC8YF8IhZTv47TqDFq+HOVn+UZ/5BFbH0WRXlEyOXXeJ4Xq2DYNSUfTeCHy WbtevCv0JpdPlQa/bCtq4pHry6Y2lJF11SOapYxQphiA== From: Jonas Karlman To: Kever Yang , Simon Glass , Philipp Tomsich , Tom Rini Cc: u-boot@lists.denx.de, Jonas Karlman Subject: [PATCH v2 07/10] gpio: rockchip: Use pinctrl pin offset to get_gpio_mux() Date: Fri, 2 Aug 2024 22:56:49 +0000 Message-ID: <20240802225705.2640999-8-jonas@kwiboo.se> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240802225705.2640999-1-jonas@kwiboo.se> References: <20240802225705.2640999-1-jonas@kwiboo.se> MIME-Version: 1.0 X-Report-Abuse-To: abuse@forwardemail.net X-Report-Abuse: abuse@forwardemail.net X-Complaints-To: abuse@forwardemail.net X-ForwardEmail-Version: 0.4.40 X-ForwardEmail-Sender: rfc822; jonas@kwiboo.se, smtp.forwardemail.net, 167.172.40.54 X-ForwardEmail-ID: 66ad645916ac7a56c917aeed X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Use the pinctrl pin offset to get_gpio_mux() to remove the bank num dependency and instead only use the bank num to assign a bank name. Most Rockchip SoCs use all 32 pins of each gpio controller, meaning the pinctrl pin offset typically is aligned to 32. However, for gpio0 on RK3288 only 24 pins are used meaning the pinctrl pin offset start at pin 24 for gpio1. Use DIV_ROUND_UP to get the 32 pin aligned bank num. Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang Reviewed-by: Quentin Schulz --- v2: Collect r-b tag --- drivers/gpio/rk_gpio.c | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) diff --git a/drivers/gpio/rk_gpio.c b/drivers/gpio/rk_gpio.c index abece6409ae0..5972f7f8612d 100644 --- a/drivers/gpio/rk_gpio.c +++ b/drivers/gpio/rk_gpio.c @@ -34,7 +34,7 @@ enum { struct rockchip_gpio_priv { void __iomem *regs; struct udevice *pinctrl; - int bank; + int pfc_offset; char name[2]; u32 version; }; @@ -108,7 +108,8 @@ static int rockchip_gpio_get_function(struct udevice *dev, unsigned offset) int ret; if (CONFIG_IS_ENABLED(PINCTRL)) { - ret = pinctrl_get_gpio_mux(priv->pinctrl, priv->bank, offset); + ret = pinctrl_get_gpio_mux(priv->pinctrl, -1, + priv->pfc_offset + offset); if (ret < 0) return ret; else if (ret != RK_FUNC_GPIO) @@ -177,7 +178,7 @@ static int rockchip_gpio_probe(struct udevice *dev) struct rockchip_gpio_priv *priv = dev_get_priv(dev); struct ofnode_phandle_args args; char *end; - int ret; + int bank, ret; priv->regs = dev_read_addr_ptr(dev); @@ -190,7 +191,8 @@ static int rockchip_gpio_probe(struct udevice *dev) 0, &args); if (!ret) { uc_priv->gpio_count = args.args[2]; - priv->bank = args.args[1] / ROCKCHIP_GPIOS_PER_BANK; + bank = DIV_ROUND_UP(args.args[1], ROCKCHIP_GPIOS_PER_BANK); + priv->pfc_offset = args.args[1]; if (CONFIG_IS_ENABLED(PINCTRL)) { ret = uclass_get_device_by_ofnode(UCLASS_PINCTRL, @@ -201,11 +203,12 @@ static int rockchip_gpio_probe(struct udevice *dev) } } else if (ret == -ENOENT || !CONFIG_IS_ENABLED(PINCTRL)) { uc_priv->gpio_count = ROCKCHIP_GPIOS_PER_BANK; - ret = dev_read_alias_seq(dev, &priv->bank); + ret = dev_read_alias_seq(dev, &bank); if (ret) { end = strrchr(dev->name, '@'); - priv->bank = trailing_strtoln(dev->name, end); + bank = trailing_strtoln(dev->name, end); } + priv->pfc_offset = bank * ROCKCHIP_GPIOS_PER_BANK; if (CONFIG_IS_ENABLED(PINCTRL)) { ret = uclass_first_device_err(UCLASS_PINCTRL, @@ -217,7 +220,7 @@ static int rockchip_gpio_probe(struct udevice *dev) return ret; } - priv->name[0] = 'A' + priv->bank; + priv->name[0] = 'A' + bank; uc_priv->bank_name = priv->name; priv->version = readl(priv->regs + VER_ID_V2); From patchwork Fri Aug 2 22:56:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Karlman X-Patchwork-Id: 1968592 X-Patchwork-Delegate: ykai007@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=kwiboo.se header.i=@kwiboo.se header.a=rsa-sha256 header.s=fe-e1b5cab7be header.b=or4EgZc7; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4WbLpy3mPRz1ybX for ; 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Sat, 3 Aug 2024 00:57:35 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kwiboo.se Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=SRS0=5651=PC=kwiboo.se=jonas@fe-bounces.kwiboo.se DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kwiboo.se; h=Content-Transfer-Encoding: MIME-Version: References: In-Reply-To: Message-ID: Date: Subject: Cc: To: From; q=dns/txt; s=fe-e1b5cab7be; t=1722639452; bh=y5eif5OxTIBnjKTdcgONKwVbpL3g+MP3dmVfBsVq/p0=; b=or4EgZc718XNWnFsPpo0b/pTF+bwW37JZBs7ZA8NowzMYnCAiNbm0pdmszf/s3c+KhCxnBzPl hyUnH84K2g+R3nKKQnI3ZPuvL9vidC4FIBlElAmPFmernzRKcx4UOxaWgwDVCS54dB/NcErKsuk HkcpvqN5hnCCkg/suwOo5SbccEATThi8J0sa/vqL9D0jciUMdXVJs8MVwqDhQ8j8kph0+jCrw6H MJkFxmDIaGe5GTaXquk4DSR770Re4+aPb+aBbSadv0/ZiAH8jCga0AJKK3mJjv1+sX8yn5+Cidi FKxZhACi/HIzPNDq4R8bVlRq9368cGcwvh8iCGuQqG/A== From: Jonas Karlman To: Kever Yang , Simon Glass , Philipp Tomsich , Tom Rini Cc: u-boot@lists.denx.de, Jonas Karlman Subject: [PATCH v2 08/10] gpio: rockchip: Add request() ops Date: Fri, 2 Aug 2024 22:56:50 +0000 Message-ID: <20240802225705.2640999-9-jonas@kwiboo.se> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240802225705.2640999-1-jonas@kwiboo.se> References: <20240802225705.2640999-1-jonas@kwiboo.se> MIME-Version: 1.0 X-Report-Abuse-To: abuse@forwardemail.net X-Report-Abuse: abuse@forwardemail.net X-Complaints-To: abuse@forwardemail.net X-ForwardEmail-Version: 0.4.40 X-ForwardEmail-Sender: rfc822; jonas@kwiboo.se, smtp.forwardemail.net, 149.28.215.223 X-ForwardEmail-ID: 66ad645c16ac7a56c917aeff X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Add a request() ops that call pinctrl_gpio_request() when the required gpio-ranges prop has been defined to signal pinctrl driver to use gpio pinmux. Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang --- v2: New patch from "rockchip: Add gpio request() ops" series --- drivers/gpio/rk_gpio.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpio/rk_gpio.c b/drivers/gpio/rk_gpio.c index 5972f7f8612d..65811dbc78d6 100644 --- a/drivers/gpio/rk_gpio.c +++ b/drivers/gpio/rk_gpio.c @@ -126,6 +126,15 @@ static int rockchip_gpio_get_function(struct udevice *dev, unsigned offset) return (data & mask) ? GPIOF_OUTPUT : GPIOF_INPUT; } +static int rockchip_gpio_request(struct udevice *dev, unsigned offset, + const char *label) +{ + if (CONFIG_IS_ENABLED(PINCTRL) && dev_read_bool(dev, "gpio-ranges")) + return pinctrl_gpio_request(dev, offset, label); + + return 0; +} + /* Simple SPL interface to GPIOs */ #ifdef CONFIG_SPL_BUILD @@ -229,6 +238,7 @@ static int rockchip_gpio_probe(struct udevice *dev) } static const struct dm_gpio_ops gpio_rockchip_ops = { + .request = rockchip_gpio_request, .direction_input = rockchip_gpio_direction_input, .direction_output = rockchip_gpio_direction_output, .get_value = rockchip_gpio_get_value, From patchwork Fri Aug 2 22:56:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Karlman X-Patchwork-Id: 1968594 X-Patchwork-Delegate: ykai007@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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spf=pass smtp.mailfrom=SRS0=5651=PC=kwiboo.se=jonas@fe-bounces.kwiboo.se DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kwiboo.se; h=Content-Transfer-Encoding: MIME-Version: References: In-Reply-To: Message-ID: Date: Subject: Cc: To: From; q=dns/txt; s=fe-e1b5cab7be; t=1722639458; bh=vSJLhzxQbyihptsuCpUVfjOmDV59GUCQwbCVas8Bjug=; b=zR4UD5V86sIs6R0eQusN7doevAojnBhlrUmmaXn5WyHUKCt0HOqKBicILcZrn7kmkvibnpxO7 RC2eqGlfHdDOgbAs7qyx902ohd52eMeamd6WuYBH21mrMyTzZ1z1wWgE3e6eydFDd/2IR5LywaO dkCU4jcCiRZFIE8bWox6eATaG9yhe8eH/W0Tqmmx/Opq5+Jd2ThsGYaBkdDKT/j6z1ArjJsS2Mp zk5nvg435T/wTjcNogpo1ohlr3lUQyBTHkXrHxL1tkH+ZQ1lWCHmyq9vpQzePZy2ArrpolbOyJL X4ZqTj8MKgJ9RSTfr6MWUr9eC8uUfu+qG+Cq2xrOjJHg== From: Jonas Karlman To: Kever Yang , Simon Glass , Philipp Tomsich , Tom Rini Cc: u-boot@lists.denx.de, Jonas Karlman , Johan Jonker Subject: [PATCH v2 09/10] rockchip: gpio: Add gpio-ranges props Date: Fri, 2 Aug 2024 22:56:51 +0000 Message-ID: <20240802225705.2640999-10-jonas@kwiboo.se> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240802225705.2640999-1-jonas@kwiboo.se> References: <20240802225705.2640999-1-jonas@kwiboo.se> MIME-Version: 1.0 X-Report-Abuse-To: abuse@forwardemail.net X-Report-Abuse: abuse@forwardemail.net X-Complaints-To: abuse@forwardemail.net X-ForwardEmail-Version: 0.4.40 X-ForwardEmail-Sender: rfc822; jonas@kwiboo.se, smtp.forwardemail.net, 149.28.215.223 X-ForwardEmail-ID: 66ad646016ac7a56c917af18 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Add gpio-ranges props to supported SoCs based on the following Linux patches: ARM: dts: rockchip: add gpio-ranges property to gpio nodes https://lore.kernel.org/all/26007385-81dc-9961-05d5-8b9a0969d0b6@gmail.com/ arm64: dts: rockchip: add gpio-ranges property to gpio nodes https://lore.kernel.org/all/18c8c89a-9962-40f0-814f-81e2c420c957@gmail.com/ For RK3066 and RK3288 the gpio-ranges props is adjusted to match https://lore.kernel.org/all/541b7633-af3b-4392-ac29-7ee1f2c6f943@kwiboo.se/ Re-enable gpio6 on RK3066 now that the pinctrl pin offset is used with get_gpio_mux(). Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang Reviewed-by: Kever Yang --- v2: Collect r-b tag Cc: Johan Jonker --- arch/arm/dts/rk3036-u-boot.dtsi | 12 ++++++++++++ arch/arm/dts/rk3066a-u-boot.dtsi | 3 +-- arch/arm/dts/rk3128-u-boot.dtsi | 16 ++++++++++++++++ arch/arm/dts/rk322x-u-boot.dtsi | 16 ++++++++++++++++ arch/arm/dts/rk3288-u-boot.dtsi | 33 ++++++++++++++++++++++++++++++++ arch/arm/dts/rk3308-u-boot.dtsi | 20 +++++++++++++++++++ arch/arm/dts/rk3328-u-boot.dtsi | 13 +++++++++++++ arch/arm/dts/rk3368-u-boot.dtsi | 16 ++++++++++++++++ arch/arm/dts/rk3399-u-boot.dtsi | 20 +++++++++++++++++++ arch/arm/dts/rv1108-u-boot.dtsi | 16 ++++++++++++++++ arch/arm/dts/rv1126-u-boot.dtsi | 14 ++++++++++++++ 11 files changed, 177 insertions(+), 2 deletions(-) diff --git a/arch/arm/dts/rk3036-u-boot.dtsi b/arch/arm/dts/rk3036-u-boot.dtsi index 41ac054b81e8..3e788187f630 100644 --- a/arch/arm/dts/rk3036-u-boot.dtsi +++ b/arch/arm/dts/rk3036-u-boot.dtsi @@ -4,3 +4,15 @@ */ #include "rockchip-u-boot.dtsi" + +&gpio0 { + gpio-ranges = <&pinctrl 0 0 32>; +}; + +&gpio1 { + gpio-ranges = <&pinctrl 0 32 32>; +}; + +&gpio2 { + gpio-ranges = <&pinctrl 0 64 32>; +}; diff --git a/arch/arm/dts/rk3066a-u-boot.dtsi b/arch/arm/dts/rk3066a-u-boot.dtsi index 06f405ca2c5e..35b52d6fb7f3 100644 --- a/arch/arm/dts/rk3066a-u-boot.dtsi +++ b/arch/arm/dts/rk3066a-u-boot.dtsi @@ -24,6 +24,5 @@ }; &gpio6 { - status = "disabled"; + gpio-ranges = <&pinctrl 0 160 16>; }; - diff --git a/arch/arm/dts/rk3128-u-boot.dtsi b/arch/arm/dts/rk3128-u-boot.dtsi index 6d1965e6b520..dd1208e7cf40 100644 --- a/arch/arm/dts/rk3128-u-boot.dtsi +++ b/arch/arm/dts/rk3128-u-boot.dtsi @@ -14,6 +14,22 @@ bootph-all; }; +&gpio0 { + gpio-ranges = <&pinctrl 0 0 32>; +}; + +&gpio1 { + gpio-ranges = <&pinctrl 0 32 32>; +}; + +&gpio2 { + gpio-ranges = <&pinctrl 0 64 32>; +}; + +&gpio3 { + gpio-ranges = <&pinctrl 0 96 32>; +}; + &grf { bootph-all; }; diff --git a/arch/arm/dts/rk322x-u-boot.dtsi b/arch/arm/dts/rk322x-u-boot.dtsi index aea917544b1c..f0e2a1f95aa0 100644 --- a/arch/arm/dts/rk322x-u-boot.dtsi +++ b/arch/arm/dts/rk322x-u-boot.dtsi @@ -47,6 +47,22 @@ max-frequency = <150000000>; }; +&gpio0 { + gpio-ranges = <&pinctrl 0 0 32>; +}; + +&gpio1 { + gpio-ranges = <&pinctrl 0 32 32>; +}; + +&gpio2 { + gpio-ranges = <&pinctrl 0 64 32>; +}; + +&gpio3 { + gpio-ranges = <&pinctrl 0 96 32>; +}; + &grf { bootph-all; }; diff --git a/arch/arm/dts/rk3288-u-boot.dtsi b/arch/arm/dts/rk3288-u-boot.dtsi index a43d320ade7b..0f8053a8b690 100644 --- a/arch/arm/dts/rk3288-u-boot.dtsi +++ b/arch/arm/dts/rk3288-u-boot.dtsi @@ -95,8 +95,41 @@ clock-names = "clk_edp", "clk_edp_24m", "pclk_edp"; }; +&gpio0 { + gpio-ranges = <&pinctrl 0 0 24>; +}; + +&gpio1 { + gpio-ranges = <&pinctrl 0 24 32>; +}; + +&gpio2 { + gpio-ranges = <&pinctrl 0 56 32>; +}; + +&gpio3 { + gpio-ranges = <&pinctrl 0 88 32>; +}; + +&gpio4 { + gpio-ranges = <&pinctrl 0 120 32>; +}; + +&gpio5 { + gpio-ranges = <&pinctrl 0 152 32>; +}; + +&gpio6 { + gpio-ranges = <&pinctrl 0 184 32>; +}; + &gpio7 { bootph-all; + gpio-ranges = <&pinctrl 0 216 32>; +}; + +&gpio8 { + gpio-ranges = <&pinctrl 0 248 16>; }; &grf { diff --git a/arch/arm/dts/rk3308-u-boot.dtsi b/arch/arm/dts/rk3308-u-boot.dtsi index b7964e2756f3..c2d56b532f80 100644 --- a/arch/arm/dts/rk3308-u-boot.dtsi +++ b/arch/arm/dts/rk3308-u-boot.dtsi @@ -54,6 +54,26 @@ bootph-some-ram; }; +&gpio0 { + gpio-ranges = <&pinctrl 0 0 32>; +}; + +&gpio1 { + gpio-ranges = <&pinctrl 0 32 32>; +}; + +&gpio2 { + gpio-ranges = <&pinctrl 0 64 32>; +}; + +&gpio3 { + gpio-ranges = <&pinctrl 0 96 32>; +}; + +&gpio4 { + gpio-ranges = <&pinctrl 0 128 32>; +}; + &grf { bootph-all; }; diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi index 0135bc08d491..3bc776146a82 100644 --- a/arch/arm/dts/rk3328-u-boot.dtsi +++ b/arch/arm/dts/rk3328-u-boot.dtsi @@ -57,6 +57,19 @@ &gpio0 { bootph-pre-ram; + gpio-ranges = <&pinctrl 0 0 32>; +}; + +&gpio1 { + gpio-ranges = <&pinctrl 0 32 32>; +}; + +&gpio2 { + gpio-ranges = <&pinctrl 0 64 32>; +}; + +&gpio3 { + gpio-ranges = <&pinctrl 0 96 32>; }; &grf { diff --git a/arch/arm/dts/rk3368-u-boot.dtsi b/arch/arm/dts/rk3368-u-boot.dtsi index 811d59ac346e..be2ebda83529 100644 --- a/arch/arm/dts/rk3368-u-boot.dtsi +++ b/arch/arm/dts/rk3368-u-boot.dtsi @@ -26,3 +26,19 @@ reg = <0x0 0xff740000 0x0 0x1000>; }; }; + +&gpio0 { + gpio-ranges = <&pinctrl 0 0 32>; +}; + +&gpio1 { + gpio-ranges = <&pinctrl 0 32 32>; +}; + +&gpio2 { + gpio-ranges = <&pinctrl 0 64 32>; +}; + +&gpio3 { + gpio-ranges = <&pinctrl 0 96 32>; +}; diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi index c4c8bb1401ea..cead23ea7c20 100644 --- a/arch/arm/dts/rk3399-u-boot.dtsi +++ b/arch/arm/dts/rk3399-u-boot.dtsi @@ -91,6 +91,26 @@ bootph-some-ram; }; +&gpio0 { + gpio-ranges = <&pinctrl 0 0 32>; +}; + +&gpio1 { + gpio-ranges = <&pinctrl 0 32 32>; +}; + +&gpio2 { + gpio-ranges = <&pinctrl 0 64 32>; +}; + +&gpio3 { + gpio-ranges = <&pinctrl 0 96 32>; +}; + +&gpio4 { + gpio-ranges = <&pinctrl 0 128 32>; +}; + &grf { bootph-all; }; diff --git a/arch/arm/dts/rv1108-u-boot.dtsi b/arch/arm/dts/rv1108-u-boot.dtsi index ccf2d8bd83ec..f772d618bd1d 100644 --- a/arch/arm/dts/rv1108-u-boot.dtsi +++ b/arch/arm/dts/rv1108-u-boot.dtsi @@ -5,6 +5,22 @@ #include "rockchip-u-boot.dtsi" +&gpio0 { + gpio-ranges = <&pinctrl 0 0 32>; +}; + +&gpio1 { + gpio-ranges = <&pinctrl 0 32 32>; +}; + +&gpio2 { + gpio-ranges = <&pinctrl 0 64 32>; +}; + +&gpio3 { + gpio-ranges = <&pinctrl 0 96 32>; +}; + &grf { bootph-all; }; diff --git a/arch/arm/dts/rv1126-u-boot.dtsi b/arch/arm/dts/rv1126-u-boot.dtsi index 448598013578..3e6df1e433db 100644 --- a/arch/arm/dts/rv1126-u-boot.dtsi +++ b/arch/arm/dts/rv1126-u-boot.dtsi @@ -31,10 +31,24 @@ &gpio0 { bootph-pre-ram; + gpio-ranges = <&pinctrl 0 0 32>; }; &gpio1 { bootph-pre-ram; + gpio-ranges = <&pinctrl 0 32 32>; +}; + +&gpio2 { + gpio-ranges = <&pinctrl 0 64 32>; +}; + +&gpio3 { + gpio-ranges = <&pinctrl 0 96 32>; +}; + +&gpio4 { + gpio-ranges = <&pinctrl 0 128 2>; }; &grf { From patchwork Fri Aug 2 22:56:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Karlman X-Patchwork-Id: 1968595 X-Patchwork-Delegate: ykai007@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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spf=pass smtp.mailfrom=SRS0=5651=PC=kwiboo.se=jonas@fe-bounces.kwiboo.se DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kwiboo.se; h=Content-Transfer-Encoding: MIME-Version: References: In-Reply-To: Message-ID: Date: Subject: Cc: To: From; q=dns/txt; s=fe-e1b5cab7be; t=1722639461; bh=6+ZwgT4kJw4mxJ8WuuLh2kvdaraLxPlf/Grfqkzwm/o=; b=wBAYQq2CYdAXO/Hmv7q6yyeaswgITODAUv2cbgX9n06Yx8taI9rMwN1x92iRvjJFFNxhhg/V3 RxHEsJxlRXFt6Sw1RMtgNgR1xO8TnYWgR0/9vLC3jAc+MLMsrWdAV/0p5okVXl/pwzqW+PoX098 nszhKXKTIiMEserv29Qsbcet/5mZ46IEV3Ko3EazCK0RCxSRPl0+uBCWaVQ4+pPiOgkf4r4Umol nciiApRUaJf3lTaZ6lTK9KYIQFYkQXWVf29zRtCyUPK1yOoq2pW+n+m8rtYz1XpSVqKQLUfOBgK TmsYzwdZCy/lL1+2yGiK2zFiz83djCgXpHPJiY6asH0A== From: Jonas Karlman To: Kever Yang , Simon Glass , Philipp Tomsich , Tom Rini Cc: u-boot@lists.denx.de, Jonas Karlman Subject: [PATCH v2 10/10] rockchip: gpio: Add missing gpio aliases Date: Fri, 2 Aug 2024 22:56:52 +0000 Message-ID: <20240802225705.2640999-11-jonas@kwiboo.se> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240802225705.2640999-1-jonas@kwiboo.se> References: <20240802225705.2640999-1-jonas@kwiboo.se> MIME-Version: 1.0 X-Report-Abuse-To: abuse@forwardemail.net X-Report-Abuse: abuse@forwardemail.net X-Complaints-To: abuse@forwardemail.net X-ForwardEmail-Version: 0.4.40 X-ForwardEmail-Sender: rfc822; jonas@kwiboo.se, smtp.forwardemail.net, 167.172.40.54 X-ForwardEmail-ID: 66ad646316ac7a56c917af2a X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Add aliases for gpio controllers to soc u-boot dtsi files that are missing aliases in soc dtsi files to ensure dev_seq() return the expected number when a gpio controller is included in SPL. Also drop the aliases from rk3288-u-boot.dtsi, they are already part of rk3288.dtsi. Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang --- v2: New patch --- arch/arm/dts/px30-u-boot.dtsi | 4 ++++ arch/arm/dts/rk3066a-u-boot.dtsi | 7 +++++++ arch/arm/dts/rk3288-u-boot.dtsi | 9 --------- arch/arm/dts/rk3xxx-u-boot.dtsi | 7 +++++++ arch/arm/dts/rv1108-u-boot.dtsi | 9 +++++++++ arch/arm/dts/rv1126-u-boot.dtsi | 8 ++++++++ 6 files changed, 35 insertions(+), 9 deletions(-) diff --git a/arch/arm/dts/px30-u-boot.dtsi b/arch/arm/dts/px30-u-boot.dtsi index abc6b49e6663..3dc70d4e432b 100644 --- a/arch/arm/dts/px30-u-boot.dtsi +++ b/arch/arm/dts/px30-u-boot.dtsi @@ -7,6 +7,10 @@ / { aliases { + gpio0 = &gpio0; + gpio1 = &gpio1; + gpio2 = &gpio2; + gpio3 = &gpio3; mmc0 = &emmc; mmc1 = &sdmmc; }; diff --git a/arch/arm/dts/rk3066a-u-boot.dtsi b/arch/arm/dts/rk3066a-u-boot.dtsi index 35b52d6fb7f3..60d18d2daeac 100644 --- a/arch/arm/dts/rk3066a-u-boot.dtsi +++ b/arch/arm/dts/rk3066a-u-boot.dtsi @@ -3,6 +3,13 @@ #include "rockchip-u-boot.dtsi" #include "rk3xxx-u-boot.dtsi" +/ { + aliases { + gpio4 = &gpio4; + gpio6 = &gpio6; + }; +}; + &gpio0 { gpio-ranges = <&pinctrl 0 0 32>; }; diff --git a/arch/arm/dts/rk3288-u-boot.dtsi b/arch/arm/dts/rk3288-u-boot.dtsi index 0f8053a8b690..379d9413adee 100644 --- a/arch/arm/dts/rk3288-u-boot.dtsi +++ b/arch/arm/dts/rk3288-u-boot.dtsi @@ -7,15 +7,6 @@ / { aliases { - gpio0 = &gpio0; - gpio1 = &gpio1; - gpio2 = &gpio2; - gpio3 = &gpio3; - gpio4 = &gpio4; - gpio5 = &gpio5; - gpio6 = &gpio6; - gpio7 = &gpio7; - gpio8 = &gpio8; mmc0 = &emmc; mmc1 = &sdmmc; mmc2 = &sdio0; diff --git a/arch/arm/dts/rk3xxx-u-boot.dtsi b/arch/arm/dts/rk3xxx-u-boot.dtsi index 6af6a451ea78..097407ca72dc 100644 --- a/arch/arm/dts/rk3xxx-u-boot.dtsi +++ b/arch/arm/dts/rk3xxx-u-boot.dtsi @@ -1,6 +1,13 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) / { + aliases { + gpio0 = &gpio0; + gpio1 = &gpio1; + gpio2 = &gpio2; + gpio3 = &gpio3; + }; + noc: syscon@10128000 { compatible = "rockchip,rk3188-noc", "syscon"; reg = <0x10128000 0x2000>; diff --git a/arch/arm/dts/rv1108-u-boot.dtsi b/arch/arm/dts/rv1108-u-boot.dtsi index f772d618bd1d..58711e8b2f8a 100644 --- a/arch/arm/dts/rv1108-u-boot.dtsi +++ b/arch/arm/dts/rv1108-u-boot.dtsi @@ -5,6 +5,15 @@ #include "rockchip-u-boot.dtsi" +/ { + aliases { + gpio0 = &gpio0; + gpio1 = &gpio1; + gpio2 = &gpio2; + gpio3 = &gpio3; + }; +}; + &gpio0 { gpio-ranges = <&pinctrl 0 0 32>; }; diff --git a/arch/arm/dts/rv1126-u-boot.dtsi b/arch/arm/dts/rv1126-u-boot.dtsi index 3e6df1e433db..05b5f5260dd5 100644 --- a/arch/arm/dts/rv1126-u-boot.dtsi +++ b/arch/arm/dts/rv1126-u-boot.dtsi @@ -6,6 +6,14 @@ #include "rockchip-u-boot.dtsi" / { + aliases { + gpio0 = &gpio0; + gpio1 = &gpio1; + gpio2 = &gpio2; + gpio3 = &gpio3; + gpio4 = &gpio4; + }; + chosen { u-boot,spl-boot-order = \ "same-as-spl", &emmc, &sdmmc;