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X-CSE-ConnectionGUID: O7MhB44BSyGPMF4SLaBw5A== X-CSE-MsgGUID: vCK7UxXlQyKaGx7Tr/q0+A== X-IronPort-AV: E=McAfee;i="6700,10204,11144"; a="19615922" X-IronPort-AV: E=Sophos;i="6.09,238,1716274800"; d="scan'208";a="19615922" Received: from fmviesa006.fm.intel.com ([10.60.135.146]) by orvoesa111.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Jul 2024 01:55:20 -0700 X-CSE-ConnectionGUID: E/syFSXfQN2cjj9ETfldGw== X-CSE-MsgGUID: q+BPHf/4RFyqkhZz9kI5bA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,238,1716274800"; d="scan'208";a="52896996" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by fmviesa006.fm.intel.com with ESMTP; 26 Jul 2024 01:55:18 -0700 Received: from shliclel4217.sh.intel.com (shliclel4217.sh.intel.com [10.239.240.127]) by shvmail03.sh.intel.com (Postfix) with ESMTP id 48CD9100734A; Fri, 26 Jul 2024 16:55:17 +0800 (CST) From: Haochen Jiang To: gcc-patches@gcc.gnu.org Cc: hongtao.liu@intel.com, ubizjak@gmail.com Subject: [PATCH v2] i386: Add non-optimize prefetchi intrins Date: Fri, 26 Jul 2024 16:53:17 +0800 Message-Id: <20240726085317.4167932-1-haochen.jiang@intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20240726063348.3859413-1-haochen.jiang@intel.com> References: <20240726063348.3859413-1-haochen.jiang@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-10.8 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org Hi all, I added related O0 testcase in this patch. Ok for trunk and backport to GCC 14 and GCC 13? Thx, Haochen --- Changes in v2: Add testcases. --- Under -O0, with the "newly" introduced intrins, the variable will be transformed as mem instead of the origin symbol_ref. The compiler will then treat the operand as invalid and turn the operation into nop, which is not expected. Use macro for non-optimize to keep the variable as symbol_ref just as how prefetch intrin does. gcc/ChangeLog: * config/i386/prfchiintrin.h (_m_prefetchit0): Add macro for non-optimized option. (_m_prefetchit1): Ditto. gcc/testsuite/ChangeLog: * gcc.target/i386/prefetchi-1b.c: New test. --- gcc/config/i386/prfchiintrin.h | 9 +++++++ gcc/testsuite/gcc.target/i386/prefetchi-1b.c | 26 ++++++++++++++++++++ 2 files changed, 35 insertions(+) create mode 100644 gcc/testsuite/gcc.target/i386/prefetchi-1b.c diff --git a/gcc/config/i386/prfchiintrin.h b/gcc/config/i386/prfchiintrin.h index dfca89c7d16..d6580e504c0 100644 --- a/gcc/config/i386/prfchiintrin.h +++ b/gcc/config/i386/prfchiintrin.h @@ -37,6 +37,7 @@ #define __DISABLE_PREFETCHI__ #endif /* __PREFETCHI__ */ +#ifdef __OPTIMIZE__ extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _m_prefetchit0 (void* __P) @@ -50,6 +51,14 @@ _m_prefetchit1 (void* __P) { __builtin_ia32_prefetchi (__P, 2); } +#else +#define _m_prefetchit0(P) \ + __builtin_ia32_prefetchi(P, 3); + +#define _m_prefetchit1(P) \ + __builtin_ia32_prefetchi(P, 2); + +#endif #ifdef __DISABLE_PREFETCHI__ #undef __DISABLE_PREFETCHI__ diff --git a/gcc/testsuite/gcc.target/i386/prefetchi-1b.c b/gcc/testsuite/gcc.target/i386/prefetchi-1b.c new file mode 100644 index 00000000000..93139554d3c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/prefetchi-1b.c @@ -0,0 +1,26 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-mprefetchi -O0" } */ +/* { dg-final { scan-assembler-times "\[ \\t\]+prefetchit0\[ \\t\]+bar\\(%rip\\)" 1 } } */ +/* { dg-final { scan-assembler-times "\[ \\t\]+prefetchit1\[ \\t\]+bar\\(%rip\\)" 1 } } */ + +#include + +int +bar (int a) +{ + return a + 1; +} + +int +foo1 (int b) +{ + _m_prefetchit0 (bar); + return bar (b) + 1; +} + +int +foo2 (int b) +{ + _m_prefetchit1 (bar); + return bar (b) + 1; +}