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[24.5.188.125]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-70d2ab47272sm3678788b3a.208.2024.07.23.15.51.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 23 Jul 2024 15:51:47 -0700 (PDT) From: Vineet Gupta To: gcc-patches@gcc.gnu.org Cc: Jeff Law , gnu-toolchain@rivosinc.com, Vineet Gupta , Edwin Lu Subject: [COMMITTED] RISC-V: Fix snafu in SI mode splitters patch Date: Tue, 23 Jul 2024 15:51:44 -0700 Message-ID: <20240723225144.444090-1-vineetg@rivosinc.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 X-Spam-Status: No, score=-10.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org SPEC2017 perlbench for RISC-V was broke as runtime output mismatch failure. > 3830: mbox2: dWshe3Aa1EULre4CT5O/ErYFrk+o/EOoebA1kTVjQVQQH2EjT5fHcYnwjj2MdBmZu5y3Ce4Ei4QQZo/SNrry9g > mbox2: uuWPimQiU0D4UrwFP+LS0lFNph4qL43WV1A6T3tHleatIOUaHixhrJU9NoA2lc9KjwYpdEL0lNTXkvo8ymNHzA > ^ > 3832: mbox3: 8f4jdv6GIf0lX3DcdwRdEm6/aZwnmGX6n86GzCvmkwTKFXQjwlwVHc8jy8XlcyiIPr3yXTkgVOiP3cRYvyYQPg > mbox3: 9xQySgP6qbhfxl8Usu1WfGA5UhStB5AN31wueGM6OF4Jp59DkqJPu6ksGblOU5u0nQapQC1e9oYIs16a2mq2NA > ^ > specdiff run completed Edwin bisected this to 273f16a125c4 ("[v3][RISC-V] Handle bit manipulation of SImode values") which had the operands swapped in one of the new splitters introduced. No test as reducer narrows it to down to the exact test introduced by the original commit. gcc/ChangeLog: * config/riscv/bitmanip.md: Fix splitter. Reported-by: Edwin Lu Signed-off-by: Vineet Gupta --- gcc/config/riscv/bitmanip.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md index f403ba8dbbad..d262430485e7 100644 --- a/gcc/config/riscv/bitmanip.md +++ b/gcc/config/riscv/bitmanip.md @@ -675,7 +675,7 @@ "#" "&& reload_completed" [(set (match_dup 4) (match_dup 2)) - (set (match_dup 4) (and:DI (not:DI (match_dup 4)) (match_dup 1))) + (set (match_dup 4) (and:DI (not:DI (match_dup 1)) (match_dup 4))) (set (match_dup 0) (any_or:DI (ashift:DI (const_int 1) (match_dup 5)) (match_dup 3)))] { operands[5] = gen_lowpart (QImode, operands[4]); } [(set_attr "type" "bitmanip")])