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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-708f60a55e1sm1719911a34.11.2024.07.22.15.01.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jul 2024 15:01:26 -0700 (PDT) From: David Lechner To: Mark Brown , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , =?utf-8?q?Nuno_S=C3=A1?= Cc: David Lechner , Michael Hennerich , Lars-Peter Clausen , David Jander , Martin Sperl , linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org Subject: [PATCH RFC v3 1/9] spi: dt-bindings: add spi-offload properties Date: Mon, 22 Jul 2024 16:57:08 -0500 Message-ID: <20240722-dlech-mainline-spi-engine-offload-2-v3-1-7420e45df69b@baylibre.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240722-dlech-mainline-spi-engine-offload-2-v3-0-7420e45df69b@baylibre.com> References: <20240722-dlech-mainline-spi-engine-offload-2-v3-0-7420e45df69b@baylibre.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Mailer: b4 0.14.0 This adds a new provider/consumer property pair to the generic SPI bindings for use with peripherals connected to controllers that support offloading. Here, offloading means that the controller has the ability to perform SPI transactions without any CPU intervention in some shape or form. The spi-offloads property will be used to assign controller offload resources to each peripheral that needs them. What these resources are will be defined by each specific controller binding by specifying the value of the #spi-offload-cells property. SPI peripherals that use multiple offload instances at the same time for different functions can describe the functions using the spi-offload-names property, for example, for a SPI flash memory, this might be "read", "erase" and "write" functions. Signed-off-by: David Lechner --- v3 changes: * Added #spi-offload-cells property to the controller binding. * Changed spi-offloads to phandle-array. * Added spi-offload-names property. v2 changes: In v1, instead of generic SPI bindings, there were only controller- specific bindings, so this is a new patch. --- Documentation/devicetree/bindings/spi/spi-controller.yaml | 5 +++++ .../devicetree/bindings/spi/spi-peripheral-props.yaml | 11 +++++++++++ 2 files changed, 16 insertions(+) diff --git a/Documentation/devicetree/bindings/spi/spi-controller.yaml b/Documentation/devicetree/bindings/spi/spi-controller.yaml index 093150c0cb87..0af9cce80be9 100644 --- a/Documentation/devicetree/bindings/spi/spi-controller.yaml +++ b/Documentation/devicetree/bindings/spi/spi-controller.yaml @@ -105,6 +105,11 @@ properties: required: - compatible + '#spi-offload-cells': + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Number of cells in a SPI offload specifier. + patternProperties: "^.*@[0-9a-f]+$": type: object diff --git a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml index 0bb443b8decd..e27577bdae48 100644 --- a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml +++ b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml @@ -113,6 +113,17 @@ properties: minItems: 2 maxItems: 4 + spi-offloads: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + Array of SPI offload instances that are used by the peripheral. + + spi-offload-names: + $ref: /schemas/types.yaml#/definitions/string-array + description: + Describes the function of each offload instance. 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-708f60a55e1sm1719911a34.11.2024.07.22.15.01.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jul 2024 15:01:30 -0700 (PDT) From: David Lechner To: Mark Brown , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , =?utf-8?q?Nuno_S=C3=A1?= Cc: David Lechner , Michael Hennerich , Lars-Peter Clausen , David Jander , Martin Sperl , linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org Subject: [PATCH RFC v3 5/9] spi: dt-bindings: axi-spi-engine: document spi-offloads Date: Mon, 22 Jul 2024 16:57:12 -0500 Message-ID: <20240722-dlech-mainline-spi-engine-offload-2-v3-5-7420e45df69b@baylibre.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240722-dlech-mainline-spi-engine-offload-2-v3-0-7420e45df69b@baylibre.com> References: <20240722-dlech-mainline-spi-engine-offload-2-v3-0-7420e45df69b@baylibre.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Mailer: b4 0.14.0 The AXI SPI Engine has support for hardware offloading capabilities. There can be up to 32 offload instances per SPI controller, so the bindings limit the value accordingly. Signed-off-by: David Lechner --- RFC: I have a few questions about this one... 1. The trigger-source properties are borrowed from the leds bindings. Do we want to promote this to a generic binding that can be used by any type of device? 2. Some folks are working on adding DMA to TX stream support to the AXI SPI Engine hardware. I assume that the `dmas` property is like others where the order/index in the phandle array matters. So this would mean that for device that only uses 1 out of the 32 offloads and only uses 1 TX DMA channel, we would have to have 32 <0>s for each of the possible RX dmas in the array. Any way to do some kind of mapping to avoid this? 3. In v2, we discussed about having some sort of data processing unit between the AXI SPI Engine RX stream interface and the DMA channel interface on the DMA controller. I haven't included this in the bindings yet because we don't have a user yet. But it was suggested that we could use the graph bindings for this. So here is what that might look like: Additional property for the AXI SPI Engine controller bindings: out-ports: $ref: /schemas/graph.yaml#/properties/ports unevaluatedProperties: false patternProperties: "^port@1?[0-9a-f]$": $ref: /schemas/graph.yaml#/properties/port unevaluatedProperties: false And this would be connected to a device node similar to this: ip-block@3000 { // Something similar to, but not exactly like // http://analogdevicesinc.github.io/hdl/library/util_extract/index.html compatible = "adi,crc-check"; // clock that runs this IP block clocks = <&sysclk 15>; // interrupt raised on bad CRC interrupts = <&intc 99>; interrupt-names = "crc"; // output stream with CRC byte removed piped to DMA dmas = <&adc_dma 0>; dma-names = "rx"; port { adc_crc_check: endpoint { remote-endpoint: <&offload0_rx>; }; }; }; Does this sound reasonable? v3 changes: * Added #spi-offload-cells property. * Added properties for triggers and RX data stream connected to DMA. v2 changes: This is basically a new patch. It partially replaces "dt-bindings: iio: offload: add binding for PWM/DMA triggered buffer". The controller no longer has an offloads object node and the spi-offloads property is now a standard SPI peripheral property. --- .../bindings/spi/adi,axi-spi-engine.yaml | 41 ++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/Documentation/devicetree/bindings/spi/adi,axi-spi-engine.yaml b/Documentation/devicetree/bindings/spi/adi,axi-spi-engine.yaml index d48faa42d025..ec18eabb993a 100644 --- a/Documentation/devicetree/bindings/spi/adi,axi-spi-engine.yaml +++ b/Documentation/devicetree/bindings/spi/adi,axi-spi-engine.yaml @@ -41,6 +41,42 @@ properties: - const: s_axi_aclk - const: spi_clk + '#spi-offload-cells': + description: The cell value is the offload instance number. + const: 1 + + trigger-sources: + description: + An array of trigger source phandles for offload instances. The index in + the array corresponds to the offload instance number. + $ref: /schemas/types.yaml#/definitions/phandle-array + + dmas: + description: + DMA channels connected to the output stream interface of an offload instance. + minItems: 1 + maxItems: 32 + + dma-names: + minItems: 1 + maxItems: 32 + items: + pattern: "^offload(?:[12]?[0-9]|3[01])-rx$" + +patternProperties: + "^.*@[0-9a-f]+$": + type: object + $ref: spi-peripheral-props.yaml + additionalProperties: true + properties: + spi-offloads: + description: + An array of 1 or more offload instance numbers assigned to this + peripheral. + items: + minimum: 0 + maximum: 31 + required: - compatible - reg @@ -59,6 +95,11 @@ examples: clocks = <&clkc 15>, <&clkc 15>; clock-names = "s_axi_aclk", "spi_clk"; + #spi-offload-cells = <1>; + trigger-sources = <&trigger_clock>; + dmas = <&dma 0>; + dma-names = "offload0-rx"; + #address-cells = <1>; #size-cells = <0>; From patchwork Mon Jul 22 21:57:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Lechner X-Patchwork-Id: 1963469 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-708f60a55e1sm1719911a34.11.2024.07.22.15.01.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jul 2024 15:01:32 -0700 (PDT) From: David Lechner To: Mark Brown , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , =?utf-8?q?Nuno_S=C3=A1?= Cc: David Lechner , Michael Hennerich , Lars-Peter Clausen , David Jander , Martin Sperl , linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org Subject: [PATCH RFC v3 8/9] dt-bindings: iio: adc: adi,ad7944: add SPI offload properties Date: Mon, 22 Jul 2024 16:57:15 -0500 Message-ID: <20240722-dlech-mainline-spi-engine-offload-2-v3-8-7420e45df69b@baylibre.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240722-dlech-mainline-spi-engine-offload-2-v3-0-7420e45df69b@baylibre.com> References: <20240722-dlech-mainline-spi-engine-offload-2-v3-0-7420e45df69b@baylibre.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Mailer: b4 0.14.0 To enable capturing data at high rates, the AD7944 is frequently used with the AXI SPI Engine IP core. This patch adds the properties needed to describe the SPI offload configuration in the device tree. Signed-off-by: David Lechner --- v3 changes: * Dropped properties that should be SPI controller properties. v2 changes: This is a new patch that partially replaces "dt-bindings: iio: offload: add binding for PWM/DMA triggered buffer". In the previous review, it was suggested that having a separate binding and object node for the offload was overcomplicated. So instead this opts to use the proposed standard spi-offloads property as a flag to allow the SPI periperhal node require additional properties that are resources that are physically connected to the SPI offload. --- Documentation/devicetree/bindings/iio/adc/adi,ad7944.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7944.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7944.yaml index d17d184842d3..6533459add87 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7944.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7944.yaml @@ -129,6 +129,9 @@ properties: line goes high while the SDI and CNV lines are high (chain mode), maxItems: 1 + spi-offloads: + maxItems: 1 + required: - compatible - reg