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Thu, 18 Jul 2024 05:36:32 GMT Received: from smtpav01.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 5A06A58059; Thu, 18 Jul 2024 05:36:30 +0000 (GMT) Received: from smtpav01.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id DC3BD5806B; Thu, 18 Jul 2024 05:36:29 +0000 (GMT) Received: from cowardly-lion.the-meissners.org (unknown [9.61.122.31]) by smtpav01.dal12v.mail.ibm.com (Postfix) with ESMTPS; Thu, 18 Jul 2024 05:36:29 +0000 (GMT) Date: Thu, 18 Jul 2024 01:36:28 -0400 From: Michael Meissner To: Michael Meissner , gcc-patches@gcc.gnu.org, Segher Boessenkool , "Kewen.Lin" , David Edelsohn , Peter Bergner Subject: [PATCH 1/2] PR target/113652, Fix failed bootstrap on ppc unrecognized opcode: `lfiwzx' with -mcpu=7450 Message-ID: Mail-Followup-To: Michael Meissner , gcc-patches@gcc.gnu.org, Segher Boessenkool , "Kewen.Lin" , David Edelsohn , Peter Bergner References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-TM-AS-GCONF: 00 X-Proofpoint-GUID: 85QU3MLDzZAT35IkSOVCorclZrKidWSk X-Proofpoint-ORIG-GUID: cvc-lvWRTH9g5EVQ70m4CpHuiOBP1BmF X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-18_02,2024-07-17_02,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 phishscore=0 spamscore=0 priorityscore=1501 lowpriorityscore=0 adultscore=0 malwarescore=0 mlxlogscore=999 mlxscore=0 impostorscore=0 clxscore=1015 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2407180035 X-Spam-Status: No, score=-10.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_NUMSUBJECT, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org Currently, we add -mvsx when building the float128 support in libgcc. This allows us to build the float128 support on a big endian system where the default cpu is power4. While the libgcc support can be built, given there is no glibc support for float128 available. However, adding -mvsx and building the libgcc float128 support causes problems if you set the default cpu to something like a 7540, which does not have VSX support. The assembler complains that when the code does a ".machine 7450", you cannot use VSX instructions. With these patches, the float128 libgcc support is only built if the default compiler has VSX support. If somebody wanted to enable the glibc support for big endian, they would need to set the base cpu to power8 to enable building the libgcc float128 libraries. The second patch in this series fixes up the GCC testsuite so that float128 tests are only run if the compiler enables float128 by default. I built little endian compilers and there were no regressions. I built big endian compilers with the --with-cpu=power5 configure option, and I verified that none of the float128 support functions are built. I also built big endian compilers on a power9 with the --with-cpu=native configure option, and I verified that the float128 support functions were built, since the default compiler used the VSX instruction set. I verified that on both sets of big endian builds, that all of the float128 tests were skipped, since there is no support for float128 in glibc and the GCC compiler does not enable float128 on those systems. Can I check these patches into the trunk assuming the original bugzilla author says they fix the problem? 2024-07-18 Michael Meissner libgcc/ PR target/113652 * config.host (powerpc*-*-linux*): Do not add t-float128-hw or t-float128-p10-hw if the default compiler does not support float128. * config/rs6000/t-float128 (FP128_CFLAGS_SW): Do not add -mvsx when building the basic float128 support. * config/rs6000/t-float128-hw (FP128_CFLAGS_HW): Likewise. * config/rs6000/t-float128-p10-hw (FP128_3_1_CFLAGS_HW): Likewise. * configure.ac (powerpc*-*-linux*): Do not add -mvsx when testing whether to build the float128 support. * configure: Regenerate. --- libgcc/config.host | 12 ++++++------ libgcc/config/rs6000/t-float128 | 8 +++++++- libgcc/config/rs6000/t-float128-hw | 3 +-- libgcc/config/rs6000/t-float128-p10-hw | 3 +-- libgcc/configure | 8 +++++++- libgcc/configure.ac | 8 +++++++- 6 files changed, 29 insertions(+), 13 deletions(-) diff --git a/libgcc/config.host b/libgcc/config.host index 9fae51d4ce7..261b08859a4 100644 --- a/libgcc/config.host +++ b/libgcc/config.host @@ -1292,14 +1292,14 @@ powerpc*-*-linux*) if test $libgcc_cv_powerpc_float128 = yes; then tmake_file="${tmake_file} rs6000/t-float128" - fi - if test $libgcc_cv_powerpc_float128_hw = yes; then - tmake_file="${tmake_file} rs6000/t-float128-hw" - fi + if test $libgcc_cv_powerpc_float128_hw = yes; then + tmake_file="${tmake_file} rs6000/t-float128-hw" - if test $libgcc_cv_powerpc_3_1_float128_hw = yes; then - tmake_file="${tmake_file} rs6000/t-float128-p10-hw" + if test $libgcc_cv_powerpc_3_1_float128_hw = yes; then + tmake_file="${tmake_file} rs6000/t-float128-p10-hw" + fi + fi fi extra_parts="$extra_parts ecrti.o ecrtn.o ncrti.o ncrtn.o" diff --git a/libgcc/config/rs6000/t-float128 b/libgcc/config/rs6000/t-float128 index b09b5664af0..93e78adcd62 100644 --- a/libgcc/config/rs6000/t-float128 +++ b/libgcc/config/rs6000/t-float128 @@ -74,7 +74,13 @@ fp128_includes = $(srcdir)/soft-fp/double.h \ $(srcdir)/soft-fp/soft-fp.h # Build the emulator without ISA 3.0 hardware support. -FP128_CFLAGS_SW = -Wno-type-limits -mvsx -mfloat128 \ +# +# In the past we added -mvsx to build the float128 specific libraries with the +# VSX instruction set. This allowed the big endian GCC on server platforms to +# build the float128 support. However, is causes problems when other default +# cpu targets are used such as the 7450. + +FP128_CFLAGS_SW = -Wno-type-limits -mfloat128 \ -mno-float128-hardware -mno-gnu-attribute \ -I$(srcdir)/soft-fp \ -I$(srcdir)/config/rs6000 \ diff --git a/libgcc/config/rs6000/t-float128-hw b/libgcc/config/rs6000/t-float128-hw index ed67b572580..82726c98b98 100644 --- a/libgcc/config/rs6000/t-float128-hw +++ b/libgcc/config/rs6000/t-float128-hw @@ -23,8 +23,7 @@ fp128_ifunc_obj = $(fp128_ifunc_static_obj) $(fp128_ifunc_shared_obj) fp128_sed_hw = -hw # Build the hardware support functions with appropriate hardware support -FP128_CFLAGS_HW = -Wno-type-limits -mvsx -mfloat128 \ - -mcpu=power9 \ +FP128_CFLAGS_HW = -Wno-type-limits -mfloat128 -mcpu=power9 \ -mfloat128-hardware -mno-gnu-attribute \ -I$(srcdir)/soft-fp \ -I$(srcdir)/config/rs6000 \ diff --git a/libgcc/config/rs6000/t-float128-p10-hw b/libgcc/config/rs6000/t-float128-p10-hw index edaaee0e478..ee50d248ca1 100644 --- a/libgcc/config/rs6000/t-float128-p10-hw +++ b/libgcc/config/rs6000/t-float128-p10-hw @@ -13,8 +13,7 @@ fp128_3_1_hw_shared_obj = $(addsuffix _s$(objext),$(fp128_3_1_hw_funcs)) fp128_3_1_hw_obj = $(fp128_3_1_hw_static_obj) $(fp128_3_1_hw_shared_obj) # Build the hardware support functions with appropriate hardware support -FP128_3_1_CFLAGS_HW = -Wno-type-limits -mvsx -mfloat128 \ - -mcpu=power10 \ +FP128_3_1_CFLAGS_HW = -Wno-type-limits -mfloat128 -mcpu=power10 \ -mfloat128-hardware -mno-gnu-attribute \ -I$(srcdir)/soft-fp \ -I$(srcdir)/config/rs6000 \ diff --git a/libgcc/configure b/libgcc/configure index a69d314374a..635237a06c8 100755 --- a/libgcc/configure +++ b/libgcc/configure @@ -5184,9 +5184,15 @@ case ${host} in # check if we have VSX (ISA 2.06) support to build the software libraries, and # whether the assembler can handle xsaddqp for hardware support. Also check if # a new glibc is being used so that __builtin_cpu_supports can be used. +# +# with the VSX instruction set. This allowed the big endian GCC on server +# platforms to build the float128 support. However, is causes problems when +# other default cpu targets are used such as the 7450. Now +# libgcc_cv_powerpc_float128 will fail if the default cpu cannot build the +# float128 support. powerpc*-*-linux*) saved_CFLAGS="$CFLAGS" - CFLAGS="$CFLAGS -mabi=altivec -mvsx -mfloat128" + CFLAGS="$CFLAGS -mfloat128" { $as_echo "$as_me:${as_lineno-$LINENO}: checking for PowerPC ISA 2.06 to build __float128 libraries" >&5 $as_echo_n "checking for PowerPC ISA 2.06 to build __float128 libraries... " >&6; } if ${libgcc_cv_powerpc_float128+:} false; then : diff --git a/libgcc/configure.ac b/libgcc/configure.ac index c2749fe0958..2a725a6f662 100644 --- a/libgcc/configure.ac +++ b/libgcc/configure.ac @@ -407,9 +407,15 @@ case ${host} in # check if we have VSX (ISA 2.06) support to build the software libraries, and # whether the assembler can handle xsaddqp for hardware support. Also check if # a new glibc is being used so that __builtin_cpu_supports can be used. +# +# with the VSX instruction set. This allowed the big endian GCC on server +# platforms to build the float128 support. However, is causes problems when +# other default cpu targets are used such as the 7450. Now +# libgcc_cv_powerpc_float128 will fail if the default cpu cannot build the +# float128 support. powerpc*-*-linux*) saved_CFLAGS="$CFLAGS" - CFLAGS="$CFLAGS -mabi=altivec -mvsx -mfloat128" + CFLAGS="$CFLAGS -mfloat128" AC_CACHE_CHECK([for PowerPC ISA 2.06 to build __float128 libraries], [libgcc_cv_powerpc_float128], [AC_COMPILE_IFELSE( From patchwork Thu Jul 18 05:40:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Meissner X-Patchwork-Id: 1961900 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256 header.s=pp1 header.b=RzwHk+PV; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org; 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Thu, 18 Jul 2024 05:40:45 +0000 (GMT) Date: Thu, 18 Jul 2024 01:40:44 -0400 From: Michael Meissner To: Michael Meissner , gcc-patches@gcc.gnu.org, Segher Boessenkool , "Kewen.Lin" , David Edelsohn , Peter Bergner Subject: [PATCH 2/2] PR target/113652, Adjust tests to skip float128 unless the compiler enables them by default Message-ID: Mail-Followup-To: Michael Meissner , gcc-patches@gcc.gnu.org, Segher Boessenkool , "Kewen.Lin" , David Edelsohn , Peter Bergner References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-TM-AS-GCONF: 00 X-Proofpoint-GUID: fGU6HgndcyYnd3Gaf3QkBk9gzakdiULU X-Proofpoint-ORIG-GUID: VUwQVVK9j55L8K6321ozU1F5HbD_-BEY X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-18_02,2024-07-17_02,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 phishscore=0 spamscore=0 priorityscore=1501 lowpriorityscore=0 adultscore=0 malwarescore=0 mlxlogscore=999 mlxscore=0 impostorscore=0 clxscore=1015 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2407180035 X-Spam-Status: No, score=-10.6 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org Currently, we add -mvsx when building the float128 support in libgcc. This allows us to build the float128 support on a big endian system where the default cpu is power4. While the libgcc support can be built, given there is no glibc support for float128 available. However, adding -mvsx and building the libgcc float128 support causes problems if you set the default cpu to something like a 7540, which does not have VSX support. The assembler complains that when the code does a ".machine 7450", you cannot use VSX instructions. After patching libgcc to not build the float128 support unless the host can support float128 normally, this patch changes the GCC tests so that it will only do the IEEE 128-bit tests if the default compiler enables the VSX instruction set by default. Otherwise all of the float128 tests will fail because the libgcc support is not available. In addition to not doing the float128 tests when the compiler does not natively support float128, this patch also removes adding -mvsx, -mfloat128, and -mfloat128-hardware enable the support if the compiler did not natively enable it. I built little endian compilers and there were no regressions. I built big endian compilers with the --with-cpu=power5 configure option, and I verified that none of the float128 support functions are built. I also built big endian compilers on a power9 with the --with-cpu=native configure option, and I verified that the float128 support functions were built, since the default compiler used the VSX instruction set. I verified that on both sets of big endian builds, that all of the float128 tests were skipped, since there is no support for float128 in glibc and the GCC compiler does not enable float128 on those systems. Can I check these patches into the trunk assuming the original bugzilla author says they fix the problem? 2024-07-18 Michael Meissner gcc/testsuite/ PR target/115800 PR target/113652 * gcc.target/powerpc/abs128-1.c: Remove adding -mvsx, -mfloat128, and -mfloat128-hardware options to float128 test. Add explicit checks for the float128 support, rather than just using VSX as a stand in, or assuming we can silently enable VSX if the default is power4. For pr99708.c, also use the correct spelling to disable the float128 tests. * gcc.target/powerpc/bfp/scalar-insert-exp-16.c: Likewise. * gcc.target/powerpc/copysign128-1.c: Likewise. * gcc.target/powerpc/divkc3-1.c: Likewise. * gcc.target/powerpc/float128-3.c: Likewise. * gcc.target/powerpc/float128-5.c: Likewise. * gcc.target/powerpc/float128-complex-2.: Likewise. * gcc.target/powerpc/float128-math.: Likewise. * gcc.target/powerpc/inf128-1.: Likewise. * gcc.target/powerpc/mulkc3-1.c: Likewise. * gcc.target/powerpc/nan128-1.c: Likewise. * gcc.target/powerpc/p9-lxvx-stxvx-3.: Likewise. * gcc.target/powerpc/pr104253.: Likewise. * gcc.target/powerpc/pr70669.c: Likewise. * gcc.target/powerpc/pr79004.c: Likewise. * gcc.target/powerpc/pr79038-1.c: Likewise. * gcc.target/powerpc/pr81959.c: Likewise. * gcc.target/powerpc/pr85657-1.: Likewise. * gcc.target/powerpc/pr85657-2.c: Likewise. * gcc.target/powerpc/pr99708.: Likewise. * gcc.target/powerpc/signbit-1.c: Likewise. * gcc.target/powerpc/signbit-2.c: Likewise. * lib/target-supports.exp (check_ppc_float128_sw_available): Likewise. (check_ppc_float128_hw_available): Likewise. (check_effective_target_ppc_ieee128_ok): Likewise. (add_options_for___float128): Likewise. (check_effective_target___float128): Likewise. (check_effective_target_base_quadfloat_support): Likewise. (check_effective_target_powerpc_float128_sw_ok): Likewise. (check_effective_target_powerpc_float128_hw_ok): Likewise. --- gcc/testsuite/gcc.target/powerpc/abs128-1.c | 3 ++- .../powerpc/bfp/scalar-insert-exp-16.c | 1 + .../gcc.target/powerpc/copysign128-1.c | 3 ++- gcc/testsuite/gcc.target/powerpc/divkc3-1.c | 3 ++- gcc/testsuite/gcc.target/powerpc/float128-3.c | 3 ++- gcc/testsuite/gcc.target/powerpc/float128-5.c | 3 ++- .../gcc.target/powerpc/float128-complex-2.c | 2 +- .../gcc.target/powerpc/float128-math.c | 2 +- gcc/testsuite/gcc.target/powerpc/inf128-1.c | 3 ++- gcc/testsuite/gcc.target/powerpc/mulkc3-1.c | 3 ++- gcc/testsuite/gcc.target/powerpc/nan128-1.c | 3 ++- .../gcc.target/powerpc/p9-lxvx-stxvx-3.c | 2 +- gcc/testsuite/gcc.target/powerpc/pr104253.c | 2 +- gcc/testsuite/gcc.target/powerpc/pr70669.c | 3 ++- gcc/testsuite/gcc.target/powerpc/pr79004.c | 4 +-- gcc/testsuite/gcc.target/powerpc/pr79038-1.c | 4 +-- gcc/testsuite/gcc.target/powerpc/pr81959.c | 3 ++- gcc/testsuite/gcc.target/powerpc/pr85657-1.c | 2 +- gcc/testsuite/gcc.target/powerpc/pr85657-2.c | 2 +- gcc/testsuite/gcc.target/powerpc/pr99708.c | 4 +-- gcc/testsuite/gcc.target/powerpc/signbit-1.c | 2 +- gcc/testsuite/gcc.target/powerpc/signbit-2.c | 2 +- gcc/testsuite/lib/target-supports.exp | 27 ++++++++----------- 23 files changed, 46 insertions(+), 40 deletions(-) diff --git a/gcc/testsuite/gcc.target/powerpc/abs128-1.c b/gcc/testsuite/gcc.target/powerpc/abs128-1.c index fe5206daff8..ee4c1aa2474 100644 --- a/gcc/testsuite/gcc.target/powerpc/abs128-1.c +++ b/gcc/testsuite/gcc.target/powerpc/abs128-1.c @@ -1,5 +1,6 @@ /* { dg-do run { target { powerpc64*-*-* && vsx_hw } } } */ -/* { dg-options "-mfloat128 -mvsx" } */ +/* { dg-options "-mfloat128" } */ +/* { dg-require-effective-target ppc_float128_sw } */ void abort (); diff --git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-16.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-16.c index f0e03c5173d..081fb2e2995 100644 --- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-16.c +++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-16.c @@ -2,6 +2,7 @@ /* { dg-require-effective-target lp64 } */ /* { dg-require-effective-target p9vector_hw } */ /* { dg-options "-mdejagnu-cpu=power9 -save-temps" } */ +/* { dg-require-effective-target ppc_float128_sw } */ #include #include diff --git a/gcc/testsuite/gcc.target/powerpc/copysign128-1.c b/gcc/testsuite/gcc.target/powerpc/copysign128-1.c index 429dfc072e3..d07c5ae0a6c 100644 --- a/gcc/testsuite/gcc.target/powerpc/copysign128-1.c +++ b/gcc/testsuite/gcc.target/powerpc/copysign128-1.c @@ -1,5 +1,6 @@ /* { dg-do run { target { powerpc64*-*-* && vsx_hw } } } */ -/* { dg-options "-mfloat128 -mvsx" } */ +/* { dg-options "-mfloat128" } */ +/* { dg-require-effective-target ppc_float128_sw } */ void abort (); diff --git a/gcc/testsuite/gcc.target/powerpc/divkc3-1.c b/gcc/testsuite/gcc.target/powerpc/divkc3-1.c index 89bf04f12a9..cb79261f401 100644 --- a/gcc/testsuite/gcc.target/powerpc/divkc3-1.c +++ b/gcc/testsuite/gcc.target/powerpc/divkc3-1.c @@ -1,5 +1,6 @@ /* { dg-do run { target { powerpc64*-*-* && p8vector_hw } } } */ -/* { dg-options "-mfloat128 -mvsx" } */ +/* { dg-options "-mfloat128" } */ +/* { dg-require-effective-target ppc_float128_sw } */ void abort (); diff --git a/gcc/testsuite/gcc.target/powerpc/float128-3.c b/gcc/testsuite/gcc.target/powerpc/float128-3.c index e62ad5f5247..d429684f50c 100644 --- a/gcc/testsuite/gcc.target/powerpc/float128-3.c +++ b/gcc/testsuite/gcc.target/powerpc/float128-3.c @@ -1,6 +1,7 @@ /* { dg-do compile { target { powerpc*-*-linux* } } } */ -/* { dg-options "-O2 -mvsx -mno-float128" } */ +/* { dg-options "-O2 -mno-float128" } */ /* { dg-require-effective-target powerpc_vsx } */ +/* { dg-require-effective-target ppc_float128_sw } */ /* Test that we can use #pragma GCC target to enable -mfloat128. */ diff --git a/gcc/testsuite/gcc.target/powerpc/float128-5.c b/gcc/testsuite/gcc.target/powerpc/float128-5.c index 8a9eee971fb..0b17aed6b8e 100644 --- a/gcc/testsuite/gcc.target/powerpc/float128-5.c +++ b/gcc/testsuite/gcc.target/powerpc/float128-5.c @@ -1,7 +1,8 @@ /* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */ -/* { dg-options "-O2 -mvsx -mno-float128" } */ +/* { dg-options "-O2 -mno-float128" } */ /* { dg-additional-options "-mdejagnu-cpu=power9" { target { ! has_arch_pwr9 } } } */ /* { dg-require-effective-target powerpc_vsx } */ +/* { dg-require-effective-target ppc_float128_sw } */ /* Test that we can use #pragma GCC target to enable -mfloat128 and generate code on ISA 3.0 for the float128 built-in functions. Lp64 is required diff --git a/gcc/testsuite/gcc.target/powerpc/float128-complex-2.c b/gcc/testsuite/gcc.target/powerpc/float128-complex-2.c index 339af47f39e..8aaec3343e4 100644 --- a/gcc/testsuite/gcc.target/powerpc/float128-complex-2.c +++ b/gcc/testsuite/gcc.target/powerpc/float128-complex-2.c @@ -1,6 +1,6 @@ /* { dg-do compile { target { powerpc*-*-linux* } } } */ /* { dg-require-effective-target powerpc_float128_hw_ok } */ -/* { dg-options "-O2 -mvsx -mfloat128-hardware" } */ +/* { dg-options "-O2 -mfloat128-hardware" } */ /* { dg-additional-options "-mdejagnu-cpu=power9" { target { ! has_arch_pwr9 } } } */ #ifndef NO_FLOAT diff --git a/gcc/testsuite/gcc.target/powerpc/float128-math.c b/gcc/testsuite/gcc.target/powerpc/float128-math.c index d1e22239718..eb5f0a83861 100644 --- a/gcc/testsuite/gcc.target/powerpc/float128-math.c +++ b/gcc/testsuite/gcc.target/powerpc/float128-math.c @@ -1,6 +1,6 @@ /* { dg-require-effective-target ppc_float128_sw } */ /* { dg-require-effective-target vsx_hw } */ -/* { dg-options "-mvsx -O2 -mfloat128 -mlong-double-128 -mabi=ieeelongdouble -Wno-psabi" } */ +/* { dg-options "-O2 -mfloat128 -mlong-double-128 -mabi=ieeelongdouble -Wno-psabi" } */ /* Test whether we convert __builtin_l to __builtin_f128 if the default long double type is IEEE 128-bit. We leave off the \M in matching diff --git a/gcc/testsuite/gcc.target/powerpc/inf128-1.c b/gcc/testsuite/gcc.target/powerpc/inf128-1.c index df797e33220..f3ebfe17be0 100644 --- a/gcc/testsuite/gcc.target/powerpc/inf128-1.c +++ b/gcc/testsuite/gcc.target/powerpc/inf128-1.c @@ -1,5 +1,6 @@ /* { dg-do run { target { powerpc64*-*-* && vsx_hw } } } */ -/* { dg-options "-mfloat128 -mvsx" } */ +/* { dg-options "-mfloat128" } */ +/* { dg-require-effective-target ppc_float128_sw } */ void abort (); diff --git a/gcc/testsuite/gcc.target/powerpc/mulkc3-1.c b/gcc/testsuite/gcc.target/powerpc/mulkc3-1.c index b975a91dbd7..e707d1057fa 100644 --- a/gcc/testsuite/gcc.target/powerpc/mulkc3-1.c +++ b/gcc/testsuite/gcc.target/powerpc/mulkc3-1.c @@ -1,5 +1,6 @@ /* { dg-do run { target { powerpc64*-*-* && p8vector_hw } } } */ -/* { dg-options "-mfloat128 -mvsx" } */ +/* { dg-options "-mfloat128" } */ +/* { dg-require-effective-target ppc_float128_sw } */ void abort (); diff --git a/gcc/testsuite/gcc.target/powerpc/nan128-1.c b/gcc/testsuite/gcc.target/powerpc/nan128-1.c index e327f40f837..631acfd15b0 100644 --- a/gcc/testsuite/gcc.target/powerpc/nan128-1.c +++ b/gcc/testsuite/gcc.target/powerpc/nan128-1.c @@ -1,5 +1,6 @@ /* { dg-do run { target { powerpc64*-*-* && vsx_hw } } } */ -/* { dg-options "-mfloat128 -mvsx" } */ +/* { dg-options "-mfloat128" } */ +/* { dg-require-effective-target ppc_float128_sw } */ #include diff --git a/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-3.c b/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-3.c index 0994e6a8da8..a4f9312be82 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-3.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-3.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-mdejagnu-cpu=power9 -mvsx -O3 -mfloat128" } */ +/* { dg-options "-mdejagnu-cpu=power9 -O3 -mfloat128" } */ /* { dg-require-effective-target ppc_float128_sw } */ /* { dg-require-effective-target powerpc_vsx } */ /* { dg-final { scan-assembler "lxvx" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr104253.c b/gcc/testsuite/gcc.target/powerpc/pr104253.c index e5f9499b7c8..ae059b3911f 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr104253.c +++ b/gcc/testsuite/gcc.target/powerpc/pr104253.c @@ -7,7 +7,7 @@ /* { dg-do run } */ /* { dg-require-effective-target ppc_float128_sw } */ -/* { dg-options "-O2 -mvsx -mfloat128" } */ +/* { dg-options "-O2 -mfloat128" } */ /* { dg-prune-output ".-mfloat128. option may not be fully supported" } */ /* diff --git a/gcc/testsuite/gcc.target/powerpc/pr70669.c b/gcc/testsuite/gcc.target/powerpc/pr70669.c index 96dc13db38c..7e2d7462a82 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr70669.c +++ b/gcc/testsuite/gcc.target/powerpc/pr70669.c @@ -1,6 +1,7 @@ /* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */ -/* { dg-options "-O2 -mdejagnu-cpu=power8 -mvsx -mfloat128" } */ +/* { dg-options "-O2 -mdejagnu-cpu=power8 -mfloat128" } */ /* { dg-require-effective-target powerpc_vsx } */ +/* { dg-require-effective-target ppc_float128_sw } */ #ifndef TYPE #define TYPE __float128 diff --git a/gcc/testsuite/gcc.target/powerpc/pr79004.c b/gcc/testsuite/gcc.target/powerpc/pr79004.c index 60c576cd36b..b6c82f51fa5 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr79004.c +++ b/gcc/testsuite/gcc.target/powerpc/pr79004.c @@ -1,6 +1,6 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-options "-mdejagnu-cpu=power9 -mvsx -O2 -mfloat128" } */ -/* { dg-require-effective-target powerpc_vsx } */ +/* { dg-options "-mdejagnu-cpu=power9 -O2 -mfloat128" } */ +/* { dg-require-effective-target ppc_float128_sw } */ #include diff --git a/gcc/testsuite/gcc.target/powerpc/pr79038-1.c b/gcc/testsuite/gcc.target/powerpc/pr79038-1.c index 7c5500716b7..223a74826c2 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr79038-1.c +++ b/gcc/testsuite/gcc.target/powerpc/pr79038-1.c @@ -1,6 +1,6 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-options "-mdejagnu-cpu=power9 -mvsx -O2 -mfloat128" } */ -/* { dg-require-effective-target powerpc_vsx } */ +/* { dg-options "-mdejagnu-cpu=power9 -O2 -mfloat128" } */ +/* { dg-require-effective-target ppc_float128_sw } */ #ifndef TYPE #define TYPE _Float128 diff --git a/gcc/testsuite/gcc.target/powerpc/pr81959.c b/gcc/testsuite/gcc.target/powerpc/pr81959.c index 0ad637eb3c9..8008db1d9c2 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr81959.c +++ b/gcc/testsuite/gcc.target/powerpc/pr81959.c @@ -1,7 +1,8 @@ /* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */ -/* { dg-options "-mvsx -O2 -mfloat128" } */ +/* { dg-options "-O2 -mfloat128" } */ /* { dg-additional-options "-mdejagnu-cpu=power9" { target { ! has_arch_pwr9 } } } */ /* { dg-require-effective-target powerpc_vsx } */ +/* { dg-require-effective-target ppc_float128_sw } */ /* PR 81959, the compiler raised on unrecognizable insn message in converting int to __float128, where the int had a PRE_INC in the address. */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr85657-1.c b/gcc/testsuite/gcc.target/powerpc/pr85657-1.c index 3337d06332d..bafca6e772f 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr85657-1.c +++ b/gcc/testsuite/gcc.target/powerpc/pr85657-1.c @@ -1,6 +1,6 @@ /* { dg-do compile { target { powerpc*-*-linux* } } } */ /* { dg-require-effective-target ppc_float128_sw } */ -/* { dg-options "-mvsx -mfloat128 -O2 -mabi=ibmlongdouble -Wno-psabi" } */ +/* { dg-options "-mfloat128 -O2 -mabi=ibmlongdouble -Wno-psabi" } */ // PR 85657 -- make sure conversions work between each of the 128-bit floating // point types. diff --git a/gcc/testsuite/gcc.target/powerpc/pr85657-2.c b/gcc/testsuite/gcc.target/powerpc/pr85657-2.c index 33113da8f85..633d5c66b36 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr85657-2.c +++ b/gcc/testsuite/gcc.target/powerpc/pr85657-2.c @@ -1,6 +1,6 @@ /* { dg-do compile { target { powerpc*-*-linux* } } } */ /* { dg-require-effective-target ppc_float128_sw } */ -/* { dg-options "-mvsx -mfloat128 -O2 -mabi=ieeelongdouble -Wno-psabi" } */ +/* { dg-options "-mfloat128 -O2 -mabi=ieeelongdouble -Wno-psabi" } */ // PR 85657 -- make sure conversions work between each of the 128-bit floating // point types. diff --git a/gcc/testsuite/gcc.target/powerpc/pr99708.c b/gcc/testsuite/gcc.target/powerpc/pr99708.c index c6aa0511b89..6232ff00949 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr99708.c +++ b/gcc/testsuite/gcc.target/powerpc/pr99708.c @@ -1,7 +1,7 @@ /* { dg-do run } */ /* { dg-skip-if "" { powerpc*-*-darwin* powerpc-ibm-aix* } } */ -/* { require-effective-target ppc_float128_sw } */ -/* { dg-options "-O2 -mvsx -mfloat128" } */ +/* { dg-require-effective-target ppc_float128_sw } */ +/* { dg-options "-O2" } */ /* * PR target/99708 diff --git a/gcc/testsuite/gcc.target/powerpc/signbit-1.c b/gcc/testsuite/gcc.target/powerpc/signbit-1.c index a29ae0fd98b..b9411170e51 100644 --- a/gcc/testsuite/gcc.target/powerpc/signbit-1.c +++ b/gcc/testsuite/gcc.target/powerpc/signbit-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-mdejagnu-cpu=power8 -mvsx -O2 -mfloat128" } */ +/* { dg-options "-mdejagnu-cpu=power8 -O2 -mfloat128" } */ /* { dg-require-effective-target lp64 } */ /* { dg-require-effective-target ppc_float128_sw } */ /* { dg-require-effective-target powerpc_vsx } */ diff --git a/gcc/testsuite/gcc.target/powerpc/signbit-2.c b/gcc/testsuite/gcc.target/powerpc/signbit-2.c index a6d83458f9d..4715b0866d5 100644 --- a/gcc/testsuite/gcc.target/powerpc/signbit-2.c +++ b/gcc/testsuite/gcc.target/powerpc/signbit-2.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-mdejagnu-cpu=power9 -mvsx -O2 -mfloat128" } */ +/* { dg-options "-mdejagnu-cpu=power9 -O2 -mfloat128" } */ /* { dg-require-effective-target powerpc_vsx } */ /* { dg-require-effective-target ppc_float128_sw } */ diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index b7df6150bcb..beb8e2877e5 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -2979,7 +2979,6 @@ proc check_ppc_float128_sw_available { } { || [istarget *-*-darwin*]} { expr 0 } else { - set options "-mfloat128 -mvsx" check_runtime_nocache ppc_float128_sw_available { volatile __float128 x = 1.0q; volatile __float128 y = 2.0q; @@ -2988,7 +2987,7 @@ proc check_ppc_float128_sw_available { } { __float128 z = x + y; return (z != 3.0q); } - } $options + } "" } }] } @@ -3005,7 +3004,6 @@ proc check_ppc_float128_hw_available { } { || [istarget *-*-darwin*]} { expr 0 } else { - set options "-mfloat128 -mvsx -mfloat128-hardware -mcpu=power9" check_runtime_nocache ppc_float128_hw_available { volatile __float128 x = 1.0q; volatile __float128 y = 2.0q; @@ -3017,7 +3015,7 @@ proc check_ppc_float128_hw_available { } { __asm__ ("xsaddqp %0,%1,%2" : "+v" (w) : "v" (x), "v" (y)); return ((z != 3.0q) || (z != w)); } - } $options + } "" } }] } @@ -3030,14 +3028,13 @@ proc check_effective_target_ppc_ieee128_ok { } { || [istarget *-*-vxworks*]} { expr 0 } else { - set options "-mfloat128" check_runtime_nocache ppc_ieee128_ok { int main() { __ieee128 a; return 0; } - } $options + } "" } }] } @@ -3946,9 +3943,6 @@ proc check_effective_target___float128 { } { } proc add_options_for___float128 { flags } { - if { [istarget powerpc*-*-linux*] } { - return "$flags -mfloat128 -mvsx" - } return "$flags" } @@ -3958,7 +3952,7 @@ proc add_options_for___float128 { flags } { proc check_effective_target_base_quadfloat_support { } { if { [istarget powerpc*-*-*] } { - return [check_vsx_hw_available] + return [check_ppc_float128_sw_available] } return 1 } @@ -7217,8 +7211,9 @@ proc check_effective_target_power10_ok { } { } } -# Return 1 if this is a PowerPC target supporting -mfloat128 via either -# software emulation on power7/power8 systems or hardware support on power9. +# Return 1 if this is a PowerPC target supporting IEEE 128-bit floating point +# via either software emulation on power7/power8 systems or hardware support on +# power9. proc check_effective_target_powerpc_float128_sw_ok { } { if { [istarget powerpc*-*-*] @@ -7234,14 +7229,14 @@ proc check_effective_target_powerpc_float128_sw_ok { } { __float128 z = x + y; return (z == 3.0q); } - } "-mfloat128 -mvsx"] + } ""] } else { return 0 } } -# Return 1 if this is a PowerPC target supporting -mfloat128 via hardware -# support on power9. +# Return 1 if this is a PowerPC target supporting IEEE 128-bit floating point +# via hardware support on power9 and later systems. proc check_effective_target_powerpc_float128_hw_ok { } { if { [istarget powerpc*-*-*] @@ -7258,7 +7253,7 @@ proc check_effective_target_powerpc_float128_hw_ok { } { __asm__ ("xsaddqp %0,%1,%2" : "=v" (z) : "v" (x), "v" (y)); return (z == 3.0q); } - } "-mfloat128-hardware"] + } ""] } else { return 0 }