From patchwork Mon Jul 15 08:06:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Georg-Johann Lay X-Patchwork-Id: 1960457 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gjlay.de header.i=@gjlay.de header.a=rsa-sha256 header.s=strato-dkim-0002 header.b=JlfO1eiT; dkim=pass header.d=gjlay.de header.i=@gjlay.de header.a=ed25519-sha256 header.s=strato-dkim-0003 header.b=yCROQhRo; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4WMvvR1VWVz1xr4 for ; Mon, 15 Jul 2024 18:07:47 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 642B3386480E for ; Mon, 15 Jul 2024 08:07:45 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mo4-p00-ob.smtp.rzone.de (mo4-p00-ob.smtp.rzone.de [81.169.146.219]) by sourceware.org (Postfix) with ESMTPS id 86E87385840D for ; Mon, 15 Jul 2024 08:06:49 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 86E87385840D Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=gjlay.de Authentication-Results: sourceware.org; spf=none smtp.mailfrom=gjlay.de ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 86E87385840D Authentication-Results: server2.sourceware.org; arc=pass smtp.remote-ip=81.169.146.219 ARC-Seal: i=2; a=rsa-sha256; d=sourceware.org; s=key; t=1721030813; cv=pass; b=EUBch6D2DIlMa1YFGmRdzht5+hGrGjGSVP9GxS4lUtAUFWuRBr/dOMbtbnl+k+0d0x46z5T9fbWQlH+Hn7CquhdpLhEqcGlgSPiHRWqQNW4aBa7yH7dkt/i4C3wFDboOFhs/8lL5L/GKA1z3Ccpb3mMBH2QQFC937E7KKj7O1c4= ARC-Message-Signature: i=2; a=rsa-sha256; d=sourceware.org; s=key; t=1721030813; c=relaxed/simple; bh=AoCbdEy8qGIyqiovC8dxBLG4jGXyBdVn+w35mn5+urw=; h=DKIM-Signature:DKIM-Signature:Message-ID:Date:MIME-Version:From: To:Subject; b=bdKoRR+ImZnqz3oesnETw7oH+w8L/RLNNXi/SpEjxeghHDjnA/0nJ938ZKHEb1/zfC+1RY2egrh/4yN66/MLKhLkGSiH2rUUpwHQjEl0niksJujNvukU9r3LxUbU+E/m+x5Q/xLGPRtQc9v3z9FCNpgxHeKr1CfXgCTBHi7U9TA= ARC-Authentication-Results: i=2; server2.sourceware.org ARC-Seal: i=1; a=rsa-sha256; t=1721030808; cv=none; d=strato.com; s=strato-dkim-0002; b=F8bklVPdR4JlE3q02rIes0UI7tz7ht4wkZZdbzqlqTPRW6j6VICeJ9eIdLirDOSqV5 AysZrrq5qPrxikjh+3PCOz8XI6aoXInZWrUnNnYWOZfRs7Tubp6anBglgwNdvbXuc/A3 aLYAJuaWlfPjnctNVuzJY75k+KRPwgUTZy3K41yI627ZcZEmYlhphK/rOADS0tge+7LA sAzuzoCZmY9N/2EgsR16lBwqda0rlpbXxcbHwZgCzoyrmloq2WedtQEhFG+ipYJjAkcy EZ3GoKgplxo2ZuuLjGescYQUIXUFlrhvArmjGpfLVc0X3l0r41TpEmm1N86E6lvEqRwU bqhA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; t=1721030808; s=strato-dkim-0002; d=strato.com; h=Subject:To:From:Date:Message-ID:Cc:Date:From:Subject:Sender; bh=kwOuv12TESQf8Rlflgnb928aFr+XpcwQI3Gb4FPmAF0=; b=FieDgUSpstHAQMRUin6HkcY6LUQ4QB/TRmWR8sdJoh5oKUJavLL5FvfnIJ/GMIm81A zTak7zQxhQ+eFe0jqCR4bA8uKnu0tA3e310D/oA1WyRUWUqqYaAQwhCWv7KdahSFGvCo WR6aly+Va5zjTeMpHRbP0W6KjsvM8Qf7SRwXOH4pyu/MuTc/3BMYL8wkW1Wf77cgxBAu 3CWtAS19ZcMzUr/bgYFvXv4yCIQBr26rKak9ualoeRo3HFdUC/phC6j22pZpGU8CMXp0 z9w6GfFpusJ1QY8sHvbTGBgsYg9gHOLBx9NID6k3uAf1YX0t39DT6t5RvHyUTBoHwELS d8yg== ARC-Authentication-Results: i=1; strato.com; arc=none; dkim=none X-RZG-CLASS-ID: mo00 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; t=1721030808; s=strato-dkim-0002; d=gjlay.de; h=Subject:To:From:Date:Message-ID:Cc:Date:From:Subject:Sender; bh=kwOuv12TESQf8Rlflgnb928aFr+XpcwQI3Gb4FPmAF0=; b=JlfO1eiTzo++nidi/nScSB7hVvlenWgEmQHeL6cDsAPbpRCj6iw3NS8L7OuJNVzvNX WD2BKGJNxvL52MN2/obtGqG8kdk9DbHk0qOQSRXLmZUMhIZ4+12OAjpnV7a5VL65ALZX caXzUM4G8OEDgpXcZrybkBFsD84kHEndUDRg9QLq1Dk6QOdJ6f34lhK3KAWTxRJO2EYD 9LvVt6Rrce2RBPl7brO7beVlkw9BbSm3MWaCDjsSf7EhPz2l9svC4dj4hVdpxfZdd6B6 +BRV5Fsz81cvJmEETw3dWDLU9noHdJ/e4eXF4mYRm2wimEl0WU7BbfOWQN90ZmFcXy6d 251Q== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; t=1721030807; s=strato-dkim-0003; d=gjlay.de; h=Subject:To:From:Date:Message-ID:Cc:Date:From:Subject:Sender; bh=kwOuv12TESQf8Rlflgnb928aFr+XpcwQI3Gb4FPmAF0=; b=yCROQhRorMykKQzRLWBnqy4DLhNID7SRpTD+ZWs+tPUk3StEAdxLReTazOZ07NY4Rj PyLT0CljiaghC99bhJCg== X-RZG-AUTH: ":LXoWVUeid/7A29J/hMvvT3koxZnKT7Qq0xotTetVnKkbjtK7q2y9LkX3jYYP" Received: from [192.168.2.102] by smtp.strato.de (RZmta 50.5.0 DYNA|AUTH) with ESMTPSA id xbc76306F86lGjp (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256 bits)) (Client did not present a certificate) for ; Mon, 15 Jul 2024 10:06:47 +0200 (CEST) Message-ID: <32877175-1e19-44dc-bc7d-88cfac691957@gjlay.de> Date: Mon, 15 Jul 2024 10:06:46 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: Georg-Johann Lay Content-Language: en-US To: "gcc-patches@gcc.gnu.org" Subject: [patch,avr,applied] Simplify GET_MODE_SIZE (mode). X-Spam-Status: No, score=-11.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_PASS, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org Applied this small patch that uses existing mode attributes like instead of GET_MODE_SIZE (mode) etc. Johann --- AVR: avr-md - Simplify GET_MODE_[BIT]SIZE (mode). gcc/ * config/avr/avr.md: Simplify mode usage. (GET_MODE_SIZE (mode)): Use instead. (GET_MODE_BITSIZE (mode) - 1): Use instead. (GET_MODE_MASK (QImode)): Use 0xff instead. * config/avr/avr-fixed.md: Same. commit f840431ff92d6ab35f8e272f875f472e5a599115 Author: Georg-Johann Lay Date: Mon Jul 15 09:12:03 2024 +0200 AVR: avr-md - Simplify GET_MODE and GET_MODE_BITSIZE. gcc/ * config/avr/avr.md: Simplify mode usage. (GET_MODE_SIZE (mode)): Use instead. (GET_MODE_BITSIZE (mode) - 1): Use instead. (GET_MODE_MASK (QImode)): Use 0xff instead. * config/avr/avr-fixed.md: Same. diff --git a/gcc/config/avr/avr-fixed.md b/gcc/config/avr/avr-fixed.md index ca0e254e314..911b8b2cd67 100644 --- a/gcc/config/avr/avr-fixed.md +++ b/gcc/config/avr/avr-fixed.md @@ -231,7 +231,7 @@ (define_expand "2" (match_dup 2))] "" { - operands[2] = gen_rtx_REG (mode, 26 - GET_MODE_SIZE (mode)); + operands[2] = gen_rtx_REG (mode, 26 - ); }) ;; "*ssneghq2" "*ssnegha2" @@ -651,7 +651,7 @@ (define_expand "round3" { if (CONST_INT_P (operands[2]) && !(optimize_size - && 4 == GET_MODE_SIZE (mode))) + && 4 == )) { emit_insn (gen_round3_const (operands[0], operands[1], operands[2])); DONE; @@ -661,8 +661,8 @@ (define_expand "round3" const unsigned int regno_in[] = { -1U, 22, 22, -1U, 18 }; const unsigned int regno_out[] = { -1U, 24, 24, -1U, 22 }; - operands[3] = gen_rtx_REG (mode, regno_out[(size_t) GET_MODE_SIZE (mode)]); - operands[4] = gen_rtx_REG (mode, regno_in[(size_t) GET_MODE_SIZE (mode)]); + operands[3] = gen_rtx_REG (mode, regno_out[(size_t) ]); + operands[4] = gen_rtx_REG (mode, regno_in[(size_t) ]); avr_fix_inputs (operands, 1 << 2, regmask (mode, REGNO (operands[4]))); operands[5] = simplify_gen_subreg (QImode, force_reg (HImode, operands[2]), HImode, 0); // $2 is no more needed, but is referenced for expand. diff --git a/gcc/config/avr/avr.md b/gcc/config/avr/avr.md index 8c3e55a91ee..e67284421b6 100644 --- a/gcc/config/avr/avr.md +++ b/gcc/config/avr/avr.md @@ -556,7 +556,7 @@ (define_insn "*load__libgcc" && REG_Z == REGNO (XEXP (operands[0], 0)) && reload_completed" { - operands[0] = GEN_INT (GET_MODE_SIZE (mode)); + operands[0] = GEN_INT (); return "%~call __load_%0"; } [(set_attr "length" "1,2") @@ -679,7 +679,7 @@ (define_insn "*xload__libgcc" "avr_xload_libgcc_p (mode) && reload_completed" { - rtx x_bytes = GEN_INT (GET_MODE_SIZE (mode)); + rtx x_bytes = GEN_INT (); output_asm_insn ("%~call __xload_%0", &x_bytes); return ""; @@ -1023,7 +1023,7 @@ (define_split ; "split-lpmx" operands[2] = replace_equiv_address (operands[1], gen_rtx_POST_INC (Pmode, addr)); operands[3] = addr; - operands[4] = gen_int_mode (-GET_MODE_SIZE (mode), HImode); + operands[4] = gen_int_mode (-, HImode); }) @@ -4789,7 +4789,7 @@ (define_split [(set (match_dup 2) (match_dup 3)) (set (match_dup 4) (match_dup 5))] { - machine_mode mode_hi = 4 == GET_MODE_SIZE (mode) ? HImode : QImode; + machine_mode mode_hi = == 4 ? HImode : QImode; bool lo_first = REGNO (operands[0]) < REGNO (operands[1]); rtx dst_lo = simplify_gen_subreg (HImode, operands[0], mode, 0); rtx src_lo = simplify_gen_subreg (HImode, operands[1], mode, 0); @@ -4833,7 +4833,7 @@ (define_split && reload_completed" [(const_int 1)] { - for (int i = 0; i < GET_MODE_SIZE (mode); i++) + for (int i = 0; i < ; i++) { rtx dst = simplify_gen_subreg (QImode, operands[0], mode, i); rtx src = simplify_gen_subreg (QImode, operands[1], mode, i); @@ -4962,7 +4962,7 @@ (define_expand "rotl3" operands[3] = gen_rtx_SCRATCH (QImode); } else if (offset == 1 - || offset == GET_MODE_BITSIZE (mode) -1) + || offset == ) { // Support rotate left/right by 1. @@ -5117,7 +5117,7 @@ (define_insn_and_split "*rotw" (clobber (match_scratch: 3 "="))] "AVR_HAVE_MOVW && CONST_INT_P (operands[2]) - && GET_MODE_SIZE (mode) % 2 == 0 + && % 2 == 0 && 0 == INTVAL (operands[2]) % 16" "#" "&& reload_completed" @@ -5141,7 +5141,7 @@ (define_insn_and_split "*rotb" "CONST_INT_P (operands[2]) && (8 == INTVAL (operands[2]) % 16 || ((!AVR_HAVE_MOVW - || GET_MODE_SIZE (mode) % 2 != 0) + || % 2 != 0) && 0 == INTVAL (operands[2]) % 16))" "#" "&& reload_completed" @@ -6658,7 +6658,7 @@ (define_insn "*cmp..0" (compare:CC (any_extend:HISI (match_operand:QIPSI 0 "register_operand" "r")) (match_operand:HISI 1 "register_operand" "r")))] "reload_completed - && GET_MODE_SIZE (mode) > GET_MODE_SIZE (mode)" + && > " { return avr_out_cmp_ext (operands, , nullptr); } @@ -6671,7 +6671,7 @@ (define_insn "*cmp..1" (compare:CC (match_operand:HISI 0 "register_operand" "r") (any_extend:HISI (match_operand:QIPSI 1 "register_operand" "r"))))] "reload_completed - && GET_MODE_SIZE (mode) > GET_MODE_SIZE (mode)" + && > " { return avr_out_cmp_ext (operands, , nullptr); } @@ -6914,7 +6914,7 @@ (define_insn_and_split "*cbranch..0" (label_ref (match_operand 3)) (pc)))] "optimize - && GET_MODE_SIZE (mode) > GET_MODE_SIZE (mode)" + && > " "#" "&& reload_completed" [; "*cmp..0" @@ -6945,7 +6945,7 @@ (define_insn_and_split "*cbranch..0" (label_ref (match_operand 3)) (pc)))] "optimize - && GET_MODE_SIZE (mode) > GET_MODE_SIZE (mode)" + && > " "#" "&& reload_completed" [; "*cmp..0" @@ -7095,7 +7095,7 @@ (define_peephole2 ; "*sbrx_branch" (clobber (reg:CC REG_CC))])] { operands[0] = avr_to_int_mode (operands[0]); - operands[1] = GEN_INT (GET_MODE_BITSIZE (mode) - 1); + operands[1] = GEN_INT (); }) ;; Convert sign tests to bit 15/23/31 tests that match the above insns. @@ -7120,7 +7120,7 @@ (define_peephole2 ; "*sbrx_branch" (clobber (reg:CC REG_CC))])] { operands[0] = avr_to_int_mode (operands[0]); - operands[1] = GEN_INT (GET_MODE_BITSIZE (mode) - 1); + operands[1] = GEN_INT (); }) @@ -9112,8 +9112,8 @@ (define_insn "*movbitqi.1-6.a" (and:QI (ashift:QI (match_operand:QI 3 "register_operand" "r") (match_operand:QI 4 "const_0_to_7_operand" "n")) (match_operand:QI 5 "single_one_operand" "n"))))] - "INTVAL(operands[4]) == exact_log2 (~INTVAL(operands[2]) & GET_MODE_MASK (QImode)) - && INTVAL(operands[4]) == exact_log2 (INTVAL(operands[5]) & GET_MODE_MASK (QImode))" + "INTVAL (operands[4]) == exact_log2 (~INTVAL (operands[2]) & 0xff) + && INTVAL (operands[4]) == exact_log2 (INTVAL (operands[5]) & 0xff)" "bst %3,0\;bld %0,%4" [(set_attr "length" "2")]) @@ -9128,7 +9128,7 @@ (define_insn "*movbitqi.1-6.b" (ashift:QI (and:QI (match_operand:QI 3 "register_operand" "r") (const_int 1)) (match_operand:QI 4 "const_0_to_7_operand" "n"))))] - "INTVAL(operands[4]) == exact_log2 (~INTVAL(operands[2]) & GET_MODE_MASK (QImode))" + "INTVAL (operands[4]) == exact_log2 (~INTVAL (operands[2]) & 0xff)" "bst %3,0\;bld %0,%4" [(set_attr "length" "2")]) @@ -9381,7 +9381,7 @@ (define_insn_and_split "*qi.byte1-3" (ashift:HISI (zero_extend:HISI (match_operand:QI 1 "register_operand" "r")) (match_operand:QI 2 "const_8_16_24_operand" "n")) (match_operand:HISI 3 "register_operand" "0")))] - "INTVAL(operands[2]) < GET_MODE_BITSIZE (mode)" + "INTVAL(operands[2]) <= " "#" "&& reload_completed" [(set (match_dup 4)