From patchwork Sat Apr 28 05:36:00 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 906036 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=csie.org Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 40Y01j29nSz9s06 for ; Sat, 28 Apr 2018 15:37:29 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id E8B14C21F6D; Sat, 28 Apr 2018 05:36:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 980E2C21F81; Sat, 28 Apr 2018 05:36:14 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id EAB19C21DA1; Sat, 28 Apr 2018 05:36:11 +0000 (UTC) Received: from wens.csie.org (mirror2.csie.ntu.edu.tw [140.112.30.76]) by lists.denx.de (Postfix) with ESMTPS id 1C2A4C21DA1 for ; Sat, 28 Apr 2018 05:36:11 +0000 (UTC) Received: by wens.csie.org (Postfix, from userid 1000) id 0F5615FAB3; Sat, 28 Apr 2018 13:36:06 +0800 (CST) From: Chen-Yu Tsai To: Jagan Teki , Maxime Ripard , u-boot@lists.denx.de Date: Sat, 28 Apr 2018 13:36:00 +0800 Message-Id: <20180428053604.5572-2-wens@csie.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180428053604.5572-1-wens@csie.org> References: <20180428053604.5572-1-wens@csie.org> Subject: [U-Boot] [PATCH v2 1/5] sunxi: Disable R_I2C for Libre Computer Board ALL-H3-CC H3 ver. X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The Libre Computer Board ALL-H3-CC does not have an I2C controllable regulator. Having R_I2C and SPL_I2C enabled serves no purpose. Disable them. Signed-off-by: Chen-Yu Tsai Acked-by: Maxime Ripard --- configs/libretech_all_h3_cc_h3_defconfig | 2 -- 1 file changed, 2 deletions(-) diff --git a/configs/libretech_all_h3_cc_h3_defconfig b/configs/libretech_all_h3_cc_h3_defconfig index 6072680e4711..185facdf3eab 100644 --- a/configs/libretech_all_h3_cc_h3_defconfig +++ b/configs/libretech_all_h3_cc_h3_defconfig @@ -5,10 +5,8 @@ CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 CONFIG_DRAM_ZQ=3881979 CONFIG_DRAM_ODT_EN=y -CONFIG_R_I2C_ENABLE=y CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-libretech-all-h3-cc" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set From patchwork Sat Apr 28 05:36:01 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 906038 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=csie.org Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 40Y03k5Lw3z9s06 for ; Sat, 28 Apr 2018 15:39:14 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 59D74C220AE; Sat, 28 Apr 2018 05:37:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 5B447C22053; Sat, 28 Apr 2018 05:36:16 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 1B95EC21E9F; Sat, 28 Apr 2018 05:36:12 +0000 (UTC) Received: from wens.csie.org (mirror2.csie.ntu.edu.tw [140.112.30.76]) by lists.denx.de (Postfix) with ESMTPS id 2497DC21E85 for ; Sat, 28 Apr 2018 05:36:11 +0000 (UTC) Received: by wens.csie.org (Postfix, from userid 1000) id 11A665FB52; Sat, 28 Apr 2018 13:36:06 +0800 (CST) From: Chen-Yu Tsai To: Jagan Teki , Maxime Ripard , u-boot@lists.denx.de Date: Sat, 28 Apr 2018 13:36:01 +0800 Message-Id: <20180428053604.5572-3-wens@csie.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180428053604.5572-1-wens@csie.org> References: <20180428053604.5572-1-wens@csie.org> Subject: [U-Boot] [PATCH v2 2/5] sunxi: Split out common board design for ALL-H3-CC device tree X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The Libre Computer Project ALL-H3-CC has three models, all using the same board design, but with different pin compatible SoCs and amount of DRAM. Currently only the H3 1GB DRAM variant is supported. To support the two other variants, first split the original device tree into a common board design part and an SoC specific part. The SoC part only defines which SoC is used and model name, and includes the SoC specific dtsi file and the common design dtsi file. Also fix up the SPDX identifier line to use the correct comment style, and place it on the first line. Signed-off-by: Chen-Yu Tsai Acked-by: Maxime Ripard --- arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts | 166 +----------------- ...-cc.dts => sunxi-libretech-all-h3-cc.dtsi} | 9 +- 2 files changed, 3 insertions(+), 172 deletions(-) copy arch/arm/dts/{sun8i-h3-libretech-all-h3-cc.dts => sunxi-libretech-all-h3-cc.dtsi} (94%) diff --git a/arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts b/arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts index c8fd69f0a4b8..50f2fb30d2d4 100644 --- a/arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts +++ b/arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts @@ -1,175 +1,13 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright (C) 2017 Chen-Yu Tsai - * - * SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ /dts-v1/; #include "sun8i-h3.dtsi" - -#include -#include +#include "sunxi-libretech-all-h3-cc.dtsi" / { model = "Libre Computer Board ALL-H3-CC H3"; compatible = "libretech,all-h3-cc-h3", "allwinner,sun8i-h3"; - - aliases { - ethernet0 = &emac; - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - leds { - compatible = "gpio-leds"; - - pwr_led { - label = "librecomputer:green:pwr"; - gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */ - default-state = "on"; - }; - - status_led { - label = "librecomputer:blue:status"; - gpios = <&pio 0 7 GPIO_ACTIVE_HIGH>; /* PA7 */ - }; - }; - - gpio_keys { - compatible = "gpio-keys"; - - power { - label = "power"; - linux,code = ; - gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ - }; - }; - - reg_vcc1v2: vcc1v2 { - compatible = "regulator-fixed"; - regulator-name = "vcc1v2"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <®_vcc5v0>; - gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */ - enable-active-high; - }; - - reg_vcc3v3: vcc3v3 { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <®_vcc5v0>; - }; - - /* This represents the board's 5V input */ - reg_vcc5v0: vcc5v0 { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - reg_vcc_dram: vcc-dram { - compatible = "regulator-fixed"; - regulator-name = "vcc-dram"; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <®_vcc5v0>; - gpio = <&r_pio 0 9 GPIO_ACTIVE_HIGH>; /* PL9 */ - enable-active-high; - }; - - reg_vcc_io: vcc-io { - compatible = "regulator-fixed"; - regulator-name = "vcc-io"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <®_vcc3v3>; - gpio = <&r_pio 0 5 GPIO_ACTIVE_LOW>; /* PL5 */ - }; - - reg_vdd_cpux: vdd-cpux { - compatible = "regulator-fixed"; - regulator-name = "vdd-cpux"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <®_vcc5v0>; - gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */ - enable-active-high; - }; -}; - -&ehci1 { - status = "okay"; -}; - -&ehci2 { - status = "okay"; -}; - -&ehci3 { - status = "okay"; -}; - -&emac { - phy-handle = <&int_mii_phy>; - phy-mode = "mii"; - allwinner,leds-active-low; - status = "okay"; -}; - -&ir { - pinctrl-names = "default"; - pinctrl-0 = <&ir_pins_a>; - status = "okay"; -}; - -&mmc0 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>; - vmmc-supply = <®_vcc_io>; - bus-width = <4>; - cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ - cd-inverted; - status = "okay"; -}; - -&ohci1 { - status = "okay"; -}; - -&ohci2 { - status = "okay"; -}; - -&ohci3 { - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins_a>; - status = "okay"; -}; - -&usbphy { - /* VBUS on USB ports are always on */ - usb0_vbus-supply = <®_vcc5v0>; - usb1_vbus-supply = <®_vcc5v0>; - usb2_vbus-supply = <®_vcc5v0>; - usb3_vbus-supply = <®_vcc5v0>; - status = "okay"; }; diff --git a/arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts b/arch/arm/dts/sunxi-libretech-all-h3-cc.dtsi similarity index 94% copy from arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts copy to arch/arm/dts/sunxi-libretech-all-h3-cc.dtsi index c8fd69f0a4b8..5d01bba180e4 100644 --- a/arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts +++ b/arch/arm/dts/sunxi-libretech-all-h3-cc.dtsi @@ -1,19 +1,12 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright (C) 2017 Chen-Yu Tsai - * - * SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ -/dts-v1/; -#include "sun8i-h3.dtsi" - #include #include / { - model = "Libre Computer Board ALL-H3-CC H3"; - compatible = "libretech,all-h3-cc-h3", "allwinner,sun8i-h3"; - aliases { ethernet0 = &emac; serial0 = &uart0; From patchwork Sat Apr 28 05:36:02 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 906037 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=csie.org Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 40Y0232s5bz9s06 for ; Sat, 28 Apr 2018 15:37:47 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 0EFB2C21FB7; Sat, 28 Apr 2018 05:36:52 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 72FC4C2202A; Sat, 28 Apr 2018 05:36:15 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 03675C21E7E; Sat, 28 Apr 2018 05:36:11 +0000 (UTC) Received: from wens.csie.org (mirror2.csie.ntu.edu.tw [140.112.30.76]) by lists.denx.de (Postfix) with ESMTPS id 33647C21E9F for ; Sat, 28 Apr 2018 05:36:11 +0000 (UTC) Received: by wens.csie.org (Postfix, from userid 1000) id 18BCA5FCF2; Sat, 28 Apr 2018 13:36:06 +0800 (CST) From: Chen-Yu Tsai To: Jagan Teki , Maxime Ripard , u-boot@lists.denx.de Date: Sat, 28 Apr 2018 13:36:02 +0800 Message-Id: <20180428053604.5572-4-wens@csie.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180428053604.5572-1-wens@csie.org> References: <20180428053604.5572-1-wens@csie.org> Subject: [U-Boot] [PATCH v2 3/5] sunxi: Add Libre Computer Board ALL-H3-CC H2+ ver. X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This patch adds a device tree file for the H2+ version of the Libre Computer Board ALL-H3-CC. It is the same board first introduced in commit afe27544125e ("sunxi: Add support for Libre Computer Board ALL-H3-CC H3 ver."), with the H3 SoC replaced with the H2+ SoC, and has only two 2Gb DDR3 chips instead of four. The device tree utilizes the common board design file for ALL-H3-CC, providing just the model strings and SoC specifics. Signed-off-by: Chen-Yu Tsai Acked-by: Maxime Ripard --- arch/arm/dts/Makefile | 1 + arch/arm/dts/sun8i-h2-plus-libretech-all-h3-cc.dts | 13 +++++++++++++ board/sunxi/MAINTAINERS | 3 ++- ...config => libretech_all_h3_cc_h2_plus_defconfig} | 2 +- 4 files changed, 17 insertions(+), 2 deletions(-) create mode 100644 arch/arm/dts/sun8i-h2-plus-libretech-all-h3-cc.dts copy configs/{orangepi_one_defconfig => libretech_all_h3_cc_h2_plus_defconfig} (85%) diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index ac7667b1e805..21e7bc1472aa 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -351,6 +351,7 @@ dtb-$(CONFIG_MACH_SUN8I_A83T) += \ sun8i-a83t-cubietruck-plus.dtb \ sun8i-a83t-tbs-a711.dts dtb-$(CONFIG_MACH_SUN8I_H3) += \ + sun8i-h2-plus-libretech-all-h3-cc.dtb \ sun8i-h2-plus-orangepi-zero.dtb \ sun8i-h3-bananapi-m2-plus.dtb \ sun8i-h3-libretech-all-h3-cc.dtb \ diff --git a/arch/arm/dts/sun8i-h2-plus-libretech-all-h3-cc.dts b/arch/arm/dts/sun8i-h2-plus-libretech-all-h3-cc.dts new file mode 100644 index 000000000000..4db0d4bb65eb --- /dev/null +++ b/arch/arm/dts/sun8i-h2-plus-libretech-all-h3-cc.dts @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2018 Chen-Yu Tsai + */ + +/dts-v1/; +#include "sun8i-h3.dtsi" +#include "sunxi-libretech-all-h3-cc.dtsi" + +/ { + model = "Libre Computer Board ALL-H3-CC H2+"; + compatible = "libretech,all-h3-cc-h2-plus", "allwinner,sun8i-h2-plus"; +}; diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 6dd48c026516..4c21a2fedfe8 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -266,9 +266,10 @@ M: Siarhei Siamashka S: Maintained F: configs/MSI_Primo81_defconfig -LIBRETECH ALL-H3-CC H3 BOARD +LIBRETECH ALL-H3-CC BOARDS M: Chen-Yu Tsai S: Maintained +F: configs/libretech_all_h3_cc_h2_plus_defconfig F: configs/libretech_all_h3_cc_h3_defconfig NANOPI-M1 BOARD diff --git a/configs/orangepi_one_defconfig b/configs/libretech_all_h3_cc_h2_plus_defconfig similarity index 85% copy from configs/orangepi_one_defconfig copy to configs/libretech_all_h3_cc_h2_plus_defconfig index 23f4973e5bab..0cbcd48aadb8 100644 --- a/configs/orangepi_one_defconfig +++ b/configs/libretech_all_h3_cc_h2_plus_defconfig @@ -5,7 +5,7 @@ CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 CONFIG_DRAM_ZQ=3881979 CONFIG_DRAM_ODT_EN=y -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-one" +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-libretech-all-h3-cc" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set From patchwork Sat Apr 28 05:36:03 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 906040 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=csie.org Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 40Y0460ZVCz9s06 for ; Sat, 28 Apr 2018 15:39:34 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id BF9AFC22047; Sat, 28 Apr 2018 05:37:31 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 6FC75C21FCD; Sat, 28 Apr 2018 05:36:17 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 2D64AC21DA1; Sat, 28 Apr 2018 05:36:12 +0000 (UTC) Received: from wens.csie.org (mirror2.csie.ntu.edu.tw [140.112.30.76]) by lists.denx.de (Postfix) with ESMTPS id 1C786C21E50 for ; Sat, 28 Apr 2018 05:36:11 +0000 (UTC) Received: by wens.csie.org (Postfix, from userid 1000) id 20A4F5FD1C; Sat, 28 Apr 2018 13:36:06 +0800 (CST) From: Chen-Yu Tsai To: Jagan Teki , Maxime Ripard , u-boot@lists.denx.de Date: Sat, 28 Apr 2018 13:36:03 +0800 Message-Id: <20180428053604.5572-5-wens@csie.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180428053604.5572-1-wens@csie.org> References: <20180428053604.5572-1-wens@csie.org> MIME-Version: 1.0 Subject: [U-Boot] [PATCH v2 4/5] sunxi: Add Libre Computer Board ALL-H3-CC H5 ver. X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This patch adds a device tree file for the H5 version of the Libre Computer Board ALL-H3-CC. It is the same board first introduced in commit afe27544125e ("sunxi: Add support for Libre Computer Board ALL-H3-CC H3 ver."), with the H3 SoC replaced with the H5 SoC, and has 4Gb DDR3 chips instead of 2Gb ones. The device tree utilizes the common board design file for ALL-H3-CC, providing just the model strings and SoC specifics. Signed-off-by: Chen-Yu Tsai Acked-by: Maxime Ripard --- arch/arm/dts/Makefile | 1 + ...tech-all-h3-cc.dts => sun50i-h5-libretech-all-h3-cc.dts} | 6 +++--- board/sunxi/MAINTAINERS | 1 + ...ngepi_one_defconfig => libretech_all_h3_cc_h5_defconfig} | 4 ++-- 4 files changed, 7 insertions(+), 5 deletions(-) copy arch/arm/dts/{sun8i-h2-plus-libretech-all-h3-cc.dts => sun50i-h5-libretech-all-h3-cc.dts} (53%) copy configs/{orangepi_one_defconfig => libretech_all_h3_cc_h5_defconfig} (80%) diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 21e7bc1472aa..482ece6112f2 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -371,6 +371,7 @@ dtb-$(CONFIG_MACH_SUN8I_R40) += \ dtb-$(CONFIG_MACH_SUN8I_V3S) += \ sun8i-v3s-licheepi-zero.dtb dtb-$(CONFIG_MACH_SUN50I_H5) += \ + sun50i-h5-libretech-all-h3-cc.dtb \ sun50i-h5-nanopi-neo2.dtb \ sun50i-h5-nanopi-neo-plus2.dtb \ sun50i-h5-orangepi-pc2.dtb \ diff --git a/arch/arm/dts/sun8i-h2-plus-libretech-all-h3-cc.dts b/arch/arm/dts/sun50i-h5-libretech-all-h3-cc.dts similarity index 53% copy from arch/arm/dts/sun8i-h2-plus-libretech-all-h3-cc.dts copy to arch/arm/dts/sun50i-h5-libretech-all-h3-cc.dts index 4db0d4bb65eb..a7e53c5c26b4 100644 --- a/arch/arm/dts/sun8i-h2-plus-libretech-all-h3-cc.dts +++ b/arch/arm/dts/sun50i-h5-libretech-all-h3-cc.dts @@ -4,10 +4,10 @@ */ /dts-v1/; -#include "sun8i-h3.dtsi" +#include "sun50i-h5.dtsi" #include "sunxi-libretech-all-h3-cc.dtsi" / { - model = "Libre Computer Board ALL-H3-CC H2+"; - compatible = "libretech,all-h3-cc-h2-plus", "allwinner,sun8i-h2-plus"; + model = "Libre Computer Board ALL-H3-CC H5"; + compatible = "libretech,all-h3-cc-h5", "allwinner,sun50i-h5"; }; diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 4c21a2fedfe8..ba36a09f5027 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -271,6 +271,7 @@ M: Chen-Yu Tsai S: Maintained F: configs/libretech_all_h3_cc_h2_plus_defconfig F: configs/libretech_all_h3_cc_h3_defconfig +F: configs/libretech_all_h3_cc_h5_defconfig NANOPI-M1 BOARD M: Mylène Josserand diff --git a/configs/orangepi_one_defconfig b/configs/libretech_all_h3_cc_h5_defconfig similarity index 80% copy from configs/orangepi_one_defconfig copy to configs/libretech_all_h3_cc_h5_defconfig index 23f4973e5bab..061bddc8fd5e 100644 --- a/configs/orangepi_one_defconfig +++ b/configs/libretech_all_h3_cc_h5_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y CONFIG_SPL=y -CONFIG_MACH_SUN8I_H3=y +CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=672 CONFIG_DRAM_ZQ=3881979 CONFIG_DRAM_ODT_EN=y -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-one" +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-libretech-all-h3-cc" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set From patchwork Sat Apr 28 05:36:04 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 906039 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=csie.org Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 40Y03s2LPzz9s06 for ; Sat, 28 Apr 2018 15:39:21 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 0A203C22053; Sat, 28 Apr 2018 05:37:47 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 4D025C22036; Sat, 28 Apr 2018 05:36:22 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 682C8C22109; Sat, 28 Apr 2018 05:36:17 +0000 (UTC) Received: from wens.csie.org (mirror2.csie.ntu.edu.tw [140.112.30.76]) by lists.denx.de (Postfix) with ESMTPS id 38316C21F19 for ; Sat, 28 Apr 2018 05:36:14 +0000 (UTC) Received: by wens.csie.org (Postfix, from userid 1000) id 27C6E5FD95; Sat, 28 Apr 2018 13:36:06 +0800 (CST) From: Chen-Yu Tsai To: Jagan Teki , Maxime Ripard , u-boot@lists.denx.de Date: Sat, 28 Apr 2018 13:36:04 +0800 Message-Id: <20180428053604.5572-6-wens@csie.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180428053604.5572-1-wens@csie.org> References: <20180428053604.5572-1-wens@csie.org> Subject: [U-Boot] [PATCH v2 5/5] sunxi: Sort dts Makefile entries for H3 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The dts Makefile entries for the H3 are not ordered correctly. Move the Nano Pi entries before the Orange Pi so they are. Signed-off-by: Chen-Yu Tsai Acked-by: Maxime Ripard --- arch/arm/dts/Makefile | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 482ece6112f2..6745259a6357 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -355,17 +355,17 @@ dtb-$(CONFIG_MACH_SUN8I_H3) += \ sun8i-h2-plus-orangepi-zero.dtb \ sun8i-h3-bananapi-m2-plus.dtb \ sun8i-h3-libretech-all-h3-cc.dtb \ + sun8i-h3-nanopi-m1.dtb \ + sun8i-h3-nanopi-m1-plus.dtb \ + sun8i-h3-nanopi-neo.dtb \ + sun8i-h3-nanopi-neo-air.dtb \ sun8i-h3-orangepi-2.dtb \ sun8i-h3-orangepi-lite.dtb \ sun8i-h3-orangepi-one.dtb \ sun8i-h3-orangepi-pc.dtb \ sun8i-h3-orangepi-pc-plus.dtb \ sun8i-h3-orangepi-plus.dtb \ - sun8i-h3-orangepi-plus2e.dtb \ - sun8i-h3-nanopi-m1.dtb \ - sun8i-h3-nanopi-m1-plus.dtb \ - sun8i-h3-nanopi-neo.dtb \ - sun8i-h3-nanopi-neo-air.dtb + sun8i-h3-orangepi-plus2e.dtb dtb-$(CONFIG_MACH_SUN8I_R40) += \ sun8i-r40-bananapi-m2-ultra.dtb dtb-$(CONFIG_MACH_SUN8I_V3S) += \