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Wed, 10 Jul 2024 07:26:31 -0700 (PDT) Received: from sw06.internal.sifive.com ([4.53.31.132]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2c99aab8e04sm11954513a91.56.2024.07.10.07.26.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Jul 2024 07:26:30 -0700 (PDT) From: Samuel Holland To: opensbi@lists.infradead.org Subject: [PATCH] lib: sbi_hsm: Save/restore menvcfg only when it exists Date: Wed, 10 Jul 2024 07:26:06 -0700 Message-ID: <20240710142629.2327391-1-samuel.holland@sifive.com> X-Mailer: git-send-email 2.45.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240710_072637_817619_142F5F4C X-CRM114-Status: UNSURE ( 9.71 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.1 (--) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: Attempting to access the menvcfg CSR raises an illegal instruction exception on hardware which implements Sm1p11 or older. Fixes: e9ee9678ba50 ("lib: sbi: fwft: add support for SBI_FWFT_PTE_AD_HW_UPDATING") Signed-off-by: Samuel Holland --- Content analysis details: (-2.1 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:42a listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] X-BeenThere: opensbi@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "opensbi" Errors-To: opensbi-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org Attempting to access the menvcfg CSR raises an illegal instruction exception on hardware which implements Sm1p11 or older. Fixes: e9ee9678ba50 ("lib: sbi: fwft: add support for SBI_FWFT_PTE_AD_HW_UPDATING") Signed-off-by: Samuel Holland Reviewed-by: Anup Patel --- lib/sbi/sbi_hsm.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c index 7e32af37..3706acfb 100644 --- a/lib/sbi/sbi_hsm.c +++ b/lib/sbi/sbi_hsm.c @@ -423,10 +423,12 @@ void __sbi_hsm_suspend_non_ret_save(struct sbi_scratch *scratch) hdata->saved_mie = csr_read(CSR_MIE); hdata->saved_mip = csr_read(CSR_MIP) & (MIP_SSIP | MIP_STIP); hdata->saved_medeleg = csr_read(CSR_MEDELEG); + if (sbi_hart_priv_version(scratch) >= SBI_HART_PRIV_VER_1_12) { #if __riscv_xlen == 32 - hdata->saved_menvcfgh = csr_read(CSR_MENVCFGH); + hdata->saved_menvcfgh = csr_read(CSR_MENVCFGH); #endif - hdata->saved_menvcfg = csr_read(CSR_MENVCFG); + hdata->saved_menvcfg = csr_read(CSR_MENVCFG); + } } static void __sbi_hsm_suspend_non_ret_restore(struct sbi_scratch *scratch) @@ -434,10 +436,12 @@ static void __sbi_hsm_suspend_non_ret_restore(struct sbi_scratch *scratch) struct sbi_hsm_data *hdata = sbi_scratch_offset_ptr(scratch, hart_data_offset); - csr_write(CSR_MENVCFG, hdata->saved_menvcfg); + if (sbi_hart_priv_version(scratch) >= SBI_HART_PRIV_VER_1_12) { + csr_write(CSR_MENVCFG, hdata->saved_menvcfg); #if __riscv_xlen == 32 - csr_write(CSR_MENVCFGH, hdata->saved_menvcfgh); + csr_write(CSR_MENVCFGH, hdata->saved_menvcfgh); #endif + } csr_write(CSR_MEDELEG, hdata->saved_medeleg); csr_write(CSR_MIE, hdata->saved_mie); csr_set(CSR_MIP, (hdata->saved_mip & (MIP_SSIP | MIP_STIP)));