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gnu-toolchain@rivosinc.com, Edwin Lu Subject: [PATCH 1/2] RISC-V: Add support for B standard extension Date: Mon, 8 Jul 2024 10:20:07 -0700 Message-Id: <20240708172007.3695827-2-ewlu@rivosinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240708172007.3695827-1-ewlu@rivosinc.com> References: <20240708172007.3695827-1-ewlu@rivosinc.com> MIME-Version: 1.0 X-Spam-Status: No, score=-11.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org This patch adds support for recognizing the B standard extension to be the collection of Zba, Zbb, Zbs extensions for consistency and conciseness across toolchains * https://github.com/riscv/riscv-b/tags gcc/ChangeLog: * common/config/riscv/riscv-common.cc: Add imply rules for B extension * config/riscv/arch-canonicalize: Ditto Signed-off-by: Edwin Lu --- gcc/common/config/riscv/riscv-common.cc | 6 ++++++ gcc/config/riscv/arch-canonicalize | 1 + 2 files changed, 7 insertions(+) diff --git a/gcc/common/config/riscv/riscv-common.cc b/gcc/common/config/riscv/riscv-common.cc index b9bda3e110a..df7f33b7486 100644 --- a/gcc/common/config/riscv/riscv-common.cc +++ b/gcc/common/config/riscv/riscv-common.cc @@ -84,6 +84,10 @@ static const riscv_implied_info_t riscv_implied_info[] = {"zabha", "zaamo"}, + {"b", "zba"}, + {"b", "zbb"}, + {"b", "zbs"}, + {"zdinx", "zfinx"}, {"zfinx", "zicsr"}, {"zdinx", "zicsr"}, @@ -245,6 +249,8 @@ static const struct riscv_ext_version riscv_ext_version_table[] = {"c", ISA_SPEC_CLASS_20190608, 2, 0}, {"c", ISA_SPEC_CLASS_2P2, 2, 0}, + {"b", ISA_SPEC_CLASS_NONE, 1, 0}, + {"h", ISA_SPEC_CLASS_NONE, 1, 0}, {"v", ISA_SPEC_CLASS_NONE, 1, 0}, diff --git a/gcc/config/riscv/arch-canonicalize b/gcc/config/riscv/arch-canonicalize index 35a7fe4455a..2ea514dd986 100755 --- a/gcc/config/riscv/arch-canonicalize +++ b/gcc/config/riscv/arch-canonicalize @@ -45,6 +45,7 @@ IMPLIED_EXT = { "zabha" : ["zaamo"], "f" : ["zicsr"], + "b" : ["zba", "zbb", "zbs"], "zdinx" : ["zfinx", "zicsr"], "zfinx" : ["zicsr"], "zhinx" : ["zhinxmin", "zfinx", "zicsr"], From patchwork Mon Jul 8 17:20:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Edwin Lu X-Patchwork-Id: 1958078 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.a=rsa-sha256 header.s=20230601 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LIKELY_SPAM_BODY, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org Update all instances of zba_zbb_zbs in the testsuite to use b instead. gcc/testsuite/ChangeLog: * g++.target/riscv/redundant-bitmap-1.C: Use gcb instead of zba_zbb_zbs * g++.target/riscv/redundant-bitmap-2.C: Ditto * g++.target/riscv/redundant-bitmap-3.C: Ditto * g++.target/riscv/redundant-bitmap-4.C: Ditto * gcc.target/riscv/shift-add-1.c: Ditto * gcc.target/riscv/shift-add-2.c: Ditto * gcc.target/riscv/synthesis-1.c: Ditto * gcc.target/riscv/synthesis-2.c: Ditto * gcc.target/riscv/synthesis-3.c: Ditto * gcc.target/riscv/synthesis-4.c: Ditto * gcc.target/riscv/synthesis-5.c: Ditto * gcc.target/riscv/synthesis-6.c: Ditto * gcc.target/riscv/synthesis-7.c: Ditto * gcc.target/riscv/synthesis-8.c: Ditto * gcc.target/riscv/zba_zbs_and-1.c: Ditto * gcc.target/riscv/zbs-zext-3.c: Ditto * lib/target-supports.exp: Add b to riscv_get_arch Signed-off-by: Edwin Lu --- gcc/testsuite/g++.target/riscv/redundant-bitmap-1.C | 2 +- gcc/testsuite/g++.target/riscv/redundant-bitmap-2.C | 2 +- gcc/testsuite/g++.target/riscv/redundant-bitmap-3.C | 2 +- gcc/testsuite/g++.target/riscv/redundant-bitmap-4.C | 2 +- gcc/testsuite/gcc.target/riscv/shift-add-1.c | 2 +- gcc/testsuite/gcc.target/riscv/shift-add-2.c | 2 +- gcc/testsuite/gcc.target/riscv/synthesis-1.c | 2 +- gcc/testsuite/gcc.target/riscv/synthesis-2.c | 2 +- gcc/testsuite/gcc.target/riscv/synthesis-3.c | 2 +- gcc/testsuite/gcc.target/riscv/synthesis-4.c | 2 +- gcc/testsuite/gcc.target/riscv/synthesis-5.c | 2 +- gcc/testsuite/gcc.target/riscv/synthesis-6.c | 2 +- gcc/testsuite/gcc.target/riscv/synthesis-7.c | 2 +- gcc/testsuite/gcc.target/riscv/synthesis-8.c | 2 +- gcc/testsuite/gcc.target/riscv/zba_zbs_and-1.c | 2 +- gcc/testsuite/gcc.target/riscv/zbs-zext-3.c | 4 ++-- gcc/testsuite/lib/target-supports.exp | 2 +- 17 files changed, 18 insertions(+), 18 deletions(-) diff --git a/gcc/testsuite/g++.target/riscv/redundant-bitmap-1.C b/gcc/testsuite/g++.target/riscv/redundant-bitmap-1.C index 37066f10eea..62bb2ab7b67 100644 --- a/gcc/testsuite/g++.target/riscv/redundant-bitmap-1.C +++ b/gcc/testsuite/g++.target/riscv/redundant-bitmap-1.C @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -march=rv64gc_zba_zbb_zbs -mabi=lp64" } */ +/* { dg-options "-O2 -march=rv64gcb -mabi=lp64" } */ void setBit(char &a, int b) { char c = 0x1UL << b; diff --git a/gcc/testsuite/g++.target/riscv/redundant-bitmap-2.C b/gcc/testsuite/g++.target/riscv/redundant-bitmap-2.C index 86acaba298f..52204daecd1 100644 --- a/gcc/testsuite/g++.target/riscv/redundant-bitmap-2.C +++ b/gcc/testsuite/g++.target/riscv/redundant-bitmap-2.C @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -march=rv64gc_zba_zbb_zbs -mabi=lp64" } */ +/* { dg-options "-O2 -march=rv64gcb -mabi=lp64" } */ void setBit(char &a, int b) { char c = 0x1UL << b; diff --git a/gcc/testsuite/g++.target/riscv/redundant-bitmap-3.C b/gcc/testsuite/g++.target/riscv/redundant-bitmap-3.C index 16bd7c1785e..6745220f2f4 100644 --- a/gcc/testsuite/g++.target/riscv/redundant-bitmap-3.C +++ b/gcc/testsuite/g++.target/riscv/redundant-bitmap-3.C @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -march=rv64gc_zba_zbb_zbs -mabi=lp64" } */ +/* { dg-options "-O2 -march=rv64gcb -mabi=lp64" } */ void setBit(char &a, int b) { char c = 0x1UL << b; diff --git a/gcc/testsuite/g++.target/riscv/redundant-bitmap-4.C b/gcc/testsuite/g++.target/riscv/redundant-bitmap-4.C index f664ee01a01..5e351fe457e 100644 --- a/gcc/testsuite/g++.target/riscv/redundant-bitmap-4.C +++ b/gcc/testsuite/g++.target/riscv/redundant-bitmap-4.C @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -march=rv64gc_zba_zbb_zbs -mabi=lp64" } */ +/* { dg-options "-O2 -march=rv64gcb -mabi=lp64" } */ void setBit(char &a, int b) { char c = 0x1UL << b; diff --git a/gcc/testsuite/gcc.target/riscv/shift-add-1.c b/gcc/testsuite/gcc.target/riscv/shift-add-1.c index d98875c3271..db84a51a222 100644 --- a/gcc/testsuite/gcc.target/riscv/shift-add-1.c +++ b/gcc/testsuite/gcc.target/riscv/shift-add-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc_zba_zbb_zbs -mabi=lp64" } */ +/* { dg-options "-march=rv64gcb -mabi=lp64" } */ /* { dg-skip-if "" { *-*-* } { "-O0" "-Og" } } */ int composeFromSurrogate(const unsigned short high) { diff --git a/gcc/testsuite/gcc.target/riscv/shift-add-2.c b/gcc/testsuite/gcc.target/riscv/shift-add-2.c index 87439858e59..ed95ced5b85 100644 --- a/gcc/testsuite/gcc.target/riscv/shift-add-2.c +++ b/gcc/testsuite/gcc.target/riscv/shift-add-2.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc_zba_zbb_zbs -mabi=lp64" } */ +/* { dg-options "-march=rv64gcb -mabi=lp64" } */ /* { dg-skip-if "" { *-*-* } { "-O0" "-Og" } } */ int sub2(int a, long long b) { diff --git a/gcc/testsuite/gcc.target/riscv/synthesis-1.c b/gcc/testsuite/gcc.target/riscv/synthesis-1.c index 9176d5f4989..c50abb08330 100644 --- a/gcc/testsuite/gcc.target/riscv/synthesis-1.c +++ b/gcc/testsuite/gcc.target/riscv/synthesis-1.c @@ -5,7 +5,7 @@ and eliminates the usual sources of extraneous dead code that would throw off the counts. */ /* { dg-skip-if "" { *-*-* } { "-O0" "-Og" "-O2" "-O3" "-Os" "-Oz" "-flto" } } */ -/* { dg-options "-march=rv64gc_zba_zbb_zbs" } */ +/* { dg-options "-march=rv64gcb" } */ /* Rather than test for a specific synthesis of all these constants or having thousands of tests each testing one variant, we just test the diff --git a/gcc/testsuite/gcc.target/riscv/synthesis-2.c b/gcc/testsuite/gcc.target/riscv/synthesis-2.c index b88374da3c4..82383408f77 100644 --- a/gcc/testsuite/gcc.target/riscv/synthesis-2.c +++ b/gcc/testsuite/gcc.target/riscv/synthesis-2.c @@ -5,7 +5,7 @@ and eliminates the usual sources of extraneous dead code that would throw off the counts. */ /* { dg-skip-if "" { *-*-* } { "-O0" "-Og" "-O2" "-O3" "-Os" "-Oz" "-flto" } } */ -/* { dg-options "-march=rv64gc_zba_zbb_zbs" } */ +/* { dg-options "-march=rv64gcb" } */ /* All these cases have the same form. lui+slli.uw+addi /* { dg-final { scan-assembler-times "\\tadd" 367 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/synthesis-3.c b/gcc/testsuite/gcc.target/riscv/synthesis-3.c index 5d92ac8e309..88ef0e81203 100644 --- a/gcc/testsuite/gcc.target/riscv/synthesis-3.c +++ b/gcc/testsuite/gcc.target/riscv/synthesis-3.c @@ -5,7 +5,7 @@ and eliminates the usual sources of extraneous dead code that would throw off the counts. */ /* { dg-skip-if "" { *-*-* } { "-O0" "-Og" "-O2" "-O3" "-Os" "-Oz" "-flto" } } */ -/* { dg-options "-march=rv64gc_zba_zbb_zbs" } */ +/* { dg-options "-march=rv64gcb" } */ /* Rather than test for a specific synthesis of all these constants or having thousands of tests each testing one variant, we just test the diff --git a/gcc/testsuite/gcc.target/riscv/synthesis-4.c b/gcc/testsuite/gcc.target/riscv/synthesis-4.c index 328a55b9e6e..54d25e2681f 100644 --- a/gcc/testsuite/gcc.target/riscv/synthesis-4.c +++ b/gcc/testsuite/gcc.target/riscv/synthesis-4.c @@ -5,7 +5,7 @@ and eliminates the usual sources of extraneous dead code that would throw off the counts. */ /* { dg-skip-if "" { *-*-* } { "-O0" "-Og" "-O2" "-O3" "-Os" "-Oz" "-flto" } } */ -/* { dg-options "-march=rv64gc_zba_zbb_zbs" } */ +/* { dg-options "-march=rv64gcb" } */ /* Rather than test for a specific synthesis of all these constants or having thousands of tests each testing one variant, we just test the diff --git a/gcc/testsuite/gcc.target/riscv/synthesis-5.c b/gcc/testsuite/gcc.target/riscv/synthesis-5.c index 4d81565b563..4ed07e4def5 100644 --- a/gcc/testsuite/gcc.target/riscv/synthesis-5.c +++ b/gcc/testsuite/gcc.target/riscv/synthesis-5.c @@ -6,7 +6,7 @@ and eliminates the usual sources of extraneous dead code that would throw off the counts. */ /* { dg-skip-if "" { *-*-* } { "-O0" "-Og" "-O2" "-O3" "-Os" "-Oz" "-flto" } } */ -/* { dg-options "-march=rv64gc_zba_zbb_zbs" } */ +/* { dg-options "-march=rv64gcb" } */ /* Rather than test for a specific synthesis of all these constants or having thousands of tests each testing one variant, we just test the diff --git a/gcc/testsuite/gcc.target/riscv/synthesis-6.c b/gcc/testsuite/gcc.target/riscv/synthesis-6.c index 65cf748f4b5..2304855fbd1 100644 --- a/gcc/testsuite/gcc.target/riscv/synthesis-6.c +++ b/gcc/testsuite/gcc.target/riscv/synthesis-6.c @@ -5,7 +5,7 @@ and eliminates the usual sources of extraneous dead code that would throw off the counts. */ /* { dg-skip-if "" { *-*-* } { "-O0" "-Og" "-O2" "-O3" "-Os" "-Oz" "-flto" } } */ -/* { dg-options "-march=rv64gc_zba_zbb_zbs" } */ +/* { dg-options "-march=rv64gcb" } */ /* Rather than test for a specific synthesis of all these constants or having thousands of tests each testing one variant, we just test the diff --git a/gcc/testsuite/gcc.target/riscv/synthesis-7.c b/gcc/testsuite/gcc.target/riscv/synthesis-7.c index 1611c964758..5a69d2e5f21 100644 --- a/gcc/testsuite/gcc.target/riscv/synthesis-7.c +++ b/gcc/testsuite/gcc.target/riscv/synthesis-7.c @@ -5,7 +5,7 @@ and eliminates the usual sources of extraneous dead code that would throw off the counts. */ /* { dg-skip-if "" { *-*-* } { "-O0" "-Og" "-O2" "-O3" "-Os" "-Oz" "-flto" } } */ -/* { dg-options "-march=rv64gc_zba_zbb_zbs" } */ +/* { dg-options "-march=rv64gcb" } */ /* Rather than test for a specific synthesis of all these constants or having thousands of tests each testing one variant, we just test the diff --git a/gcc/testsuite/gcc.target/riscv/synthesis-8.c b/gcc/testsuite/gcc.target/riscv/synthesis-8.c index 2bcdb4e774d..72fd7113321 100644 --- a/gcc/testsuite/gcc.target/riscv/synthesis-8.c +++ b/gcc/testsuite/gcc.target/riscv/synthesis-8.c @@ -5,7 +5,7 @@ and eliminates the usual sources of extraneous dead code that would throw off the counts. */ /* { dg-skip-if "" { *-*-* } { "-O0" "-Og" "-O2" "-O3" "-Os" "-Oz" "-flto" } } */ -/* { dg-options "-march=rv64gc_zba_zbb_zbs" } */ +/* { dg-options "-march=rv64gcb" } */ /* Rather than test for a specific synthesis of all these constants or having thousands of tests each testing one variant, we just test the diff --git a/gcc/testsuite/gcc.target/riscv/zba_zbs_and-1.c b/gcc/testsuite/gcc.target/riscv/zba_zbs_and-1.c index 23fd769449e..ddff91a4e7c 100644 --- a/gcc/testsuite/gcc.target/riscv/zba_zbs_and-1.c +++ b/gcc/testsuite/gcc.target/riscv/zba_zbs_and-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc_zba_zbb_zbs -mabi=lp64" } */ +/* { dg-options "-march=rv64gcb -mabi=lp64" } */ /* { dg-skip-if "" { *-*-* } { "-O0" "-Og" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/zbs-zext-3.c b/gcc/testsuite/gcc.target/riscv/zbs-zext-3.c index 0239014e06b..8dc3f289778 100644 --- a/gcc/testsuite/gcc.target/riscv/zbs-zext-3.c +++ b/gcc/testsuite/gcc.target/riscv/zbs-zext-3.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc_zba_zbb_zbs -mabi=lp64d" { target { rv64 } } } */ -/* { dg-options "-march=rv32gc_zba_zbb_zbs -mabi=ilp32" { target { rv32 } } } */ +/* { dg-options "-march=rv64gcb -mabi=lp64d" { target { rv64 } } } */ +/* { dg-options "-march=rv32gcb -mabi=ilp32" { target { rv32 } } } */ /* { dg-skip-if "" { *-*-* } { "-O0" "-Og" } } */ /* We need to adjust the constant so this works for rv32 and rv64. */ diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index d3edc7d839e..f001c28072f 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -2140,7 +2140,7 @@ proc check_effective_target_riscv_v_misalign_ok { } { proc riscv_get_arch { } { set gcc_march "" # ??? do we neeed to add more extensions to the list below? - foreach ext { i m a f d q c v zicsr zifencei zfh zba zbb zbc zbs zvbb zvfh ztso zaamo zalrsc zabha } { + foreach ext { i m a f d q c b v zicsr zifencei zfh zba zbb zbc zbs zvbb zvfh ztso zaamo zalrsc zabha } { if { [check_no_compiler_messages riscv_ext_$ext assembly [string map [list DEF __riscv_$ext] { #ifndef DEF #error "Not DEF"