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Sat, 06 Jul 2024 05:40:27 -0700 (PDT) Message-ID: Date: Sat, 6 Jul 2024 06:40:25 -0600 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Beta Content-Language: en-US From: Jeff Law To: "gcc-patches@gcc.gnu.org" Subject: [committed] Fix various sh define_insn_and_split predicates X-Spam-Status: No, score=-7.6 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, RCVD_IN_SBL_CSS, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org The sh4-linux-gnu port has failed to bootstrap since the introduction of late combine due to failures to split certain insns. This is caused by incorrect predicates in various define_insn_and_split patterns. Essentially the insn's predicate is something like "TARGET_SH1". The split predicate is "&& can_create_pseudos_p ()". So these patterns will match post-reload, but be un-splittable. So at assembly output time, we get the failure as the output template is "#". This patch fixes the most obvious & egregious cases by bringing the split condition into the insn's predicate and leaving "&& 1" as the split condition. That's enough to get sh4-linux-gnu bootstrapping again and I'm hoping it does the same for sh4eb-linux-gnu. Pushing to the trunk. Jeff * config/sh/sh.md (adddi3): Only allow matching when we can still create new pseudos. (subdi3, *rotcl, *rotcr, *rotcr_neg_t, negdi2): Likewise. (abs2, negabs2, negdi_cond): Likewise. (*swapbisi2_and_shl8, *swapbhisi2, *movsi_index_disp_load): Likewise. (*movhi_index_disp_load, *movindex_disp_store): Likewise. (*mov_t_msb_neg, *negt_msb, clipu_one): Likewise. diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md index 9491b49e55b..3e978254ab0 100644 --- a/gcc/config/sh/sh.md +++ b/gcc/config/sh/sh.md @@ -1542,9 +1542,9 @@ (define_insn_and_split "adddi3" (plus:DI (match_operand:DI 1 "arith_reg_operand") (match_operand:DI 2 "arith_reg_operand"))) (clobber (reg:SI T_REG))] - "TARGET_SH1" + "TARGET_SH1 && can_create_pseudo_p ()" "#" - "&& can_create_pseudo_p ()" + "&& 1" [(const_int 0)] { emit_insn (gen_clrt ()); @@ -1934,9 +1934,9 @@ (define_insn_and_split "subdi3" (minus:DI (match_operand:DI 1 "arith_reg_operand") (match_operand:DI 2 "arith_reg_operand"))) (clobber (reg:SI T_REG))] - "TARGET_SH1" + "TARGET_SH1 && can_create_pseudo_p ()" "#" - "&& can_create_pseudo_p ()" + "&& 1" [(const_int 0)] { emit_insn (gen_clrt ()); @@ -3174,9 +3174,9 @@ (define_insn_and_split "*rotcl" (and:SI (match_operand:SI 3 "arith_reg_or_t_reg_operand") (const_int 1)))) (clobber (reg:SI T_REG))] - "TARGET_SH1" + "TARGET_SH1 && can_create_pseudo_p ()" "#" - "&& can_create_pseudo_p ()" + "&& 1" [(const_int 0)] { gcc_assert (INTVAL (operands[2]) > 0); @@ -3259,9 +3259,9 @@ (define_insn_and_split "*rotcl" (match_operand:SI 2 "const_int_operand")) (match_operand 3 "treg_set_expr"))) (clobber (reg:SI T_REG))] - "TARGET_SH1" + "TARGET_SH1 && can_create_pseudo_p ()" "#" - "&& can_create_pseudo_p ()" + "&& 1" [(parallel [(set (match_dup 0) (ior:SI (ashift:SI (match_dup 1) (match_dup 2)) (and:SI (match_dup 3) (const_int 1)))) @@ -3278,9 +3278,9 @@ (define_insn_and_split "*rotcl" (ashift:SI (match_operand:SI 2 "arith_reg_operand") (match_operand:SI 3 "const_int_operand")))) (clobber (reg:SI T_REG))] - "TARGET_SH1" + "TARGET_SH1 && can_create_pseudo_p ()" "#" - "&& can_create_pseudo_p ()" + "&& 1" [(parallel [(set (match_dup 0) (ior:SI (ashift:SI (match_dup 2) (match_dup 3)) (and:SI (match_dup 1) (const_int 1)))) @@ -3293,9 +3293,9 @@ (define_insn_and_split "*rotcl" (lshiftrt:SI (match_operand:SI 3 "arith_reg_operand") (const_int 31)))) (clobber (reg:SI T_REG))] - "TARGET_SH1" + "TARGET_SH1 && can_create_pseudo_p ()" "#" - "&& can_create_pseudo_p ()" + "&& 1" [(parallel [(set (match_dup 0) (ior:SI (ashift:SI (match_dup 1) (match_dup 2)) (and:SI (reg:SI T_REG) (const_int 1)))) @@ -3312,9 +3312,9 @@ (define_insn_and_split "*rotcl" (ashift:SI (match_operand:SI 1 "arith_reg_operand") (match_operand:SI 2 "const_int_operand")))) (clobber (reg:SI T_REG))] - "TARGET_SH1" + "TARGET_SH1 && can_create_pseudo_p ()" "#" - "&& can_create_pseudo_p ()" + "&& 1" [(parallel [(set (match_dup 0) (ior:SI (ashift:SI (match_dup 1) (match_dup 2)) (and:SI (reg:SI T_REG) (const_int 1)))) @@ -3332,9 +3332,9 @@ (define_insn_and_split "*rotcl" (const_int 1) (match_operand 4 "const_int_operand")))) (clobber (reg:SI T_REG))] - "TARGET_SH1" + "TARGET_SH1 && can_create_pseudo_p ()" "#" - "&& can_create_pseudo_p ()" + "&& 1" [(parallel [(set (match_dup 0) (ior:SI (ashift:SI (match_dup 1) (match_dup 2)) (and:SI (match_dup 5) (const_int 1)))) @@ -3377,9 +3377,9 @@ (define_insn_and_split "*rotcr" (lshiftrt:SI (match_operand:SI 2 "arith_reg_operand") (const_int 1)))) (clobber (reg:SI T_REG))] - "TARGET_SH1" + "TARGET_SH1 && can_create_pseudo_p ()" "#" - "&& can_create_pseudo_p ()" + "&& 1" [(const_int 0)] { rtx tmp = gen_reg_rtx (SImode); @@ -3394,9 +3394,9 @@ (define_insn_and_split "*rotcr" (const_int 1)) (const_int -2147483648))) ;; 0xffffffff80000000 (clobber (reg:SI T_REG))] - "TARGET_SH1" + "TARGET_SH1 && can_create_pseudo_p ()" "#" - "&& can_create_pseudo_p ()" + "&& 1" [(const_int 0)] { emit_insn (gen_sett ()); @@ -3411,9 +3411,9 @@ (define_insn_and_split "*rotcr_neg_t" (lshiftrt:SI (match_operand:SI 2 "arith_reg_operand") (match_operand:SI 3 "const_int_operand")))) (clobber (reg:SI T_REG))] - "TARGET_SH1" + "TARGET_SH1 && can_create_pseudo_p ()" "#" - "&& can_create_pseudo_p ()" + "&& 1" [(parallel [(set (match_dup 0) (ior:SI (lshiftrt:SI (match_dup 2) (match_dup 3)) (ashift:SI (reg:SI T_REG) (const_int 31)))) @@ -3428,9 +3428,9 @@ (define_insn_and_split "*rotcr_neg_t" (match_operand:SI 2 "const_int_operand")) (match_operand:SI 3 "negt_reg_shl31_operand"))) (clobber (reg:SI T_REG))] - "TARGET_SH1" + "TARGET_SH1 && can_create_pseudo_p ()" "#" - "&& can_create_pseudo_p ()" + "&& 1" [(parallel [(set (match_dup 0) (ior:SI (lshiftrt:SI (match_dup 1) (match_dup 2)) (ashift:SI (reg:SI T_REG) (const_int 31)))) @@ -4379,9 +4379,9 @@ (define_insn_and_split "negdi2" [(set (match_operand:DI 0 "arith_reg_dest") (neg:DI (match_operand:DI 1 "arith_reg_operand"))) (clobber (reg:SI T_REG))] - "TARGET_SH1" + "TARGET_SH1 && can_create_pseudo_p ()" "#" - "&& can_create_pseudo_p ()" + "&& 1" [(const_int 0)] { emit_insn (gen_clrt ()); @@ -4460,9 +4460,9 @@ (define_insn_and_split "abs2" [(set (match_operand:SIDI 0 "arith_reg_dest") (abs:SIDI (match_operand:SIDI 1 "arith_reg_operand"))) (clobber (reg:SI T_REG))] - "TARGET_SH1" + "TARGET_SH1 && can_create_pseudo_p ()" "#" - "&& can_create_pseudo_p ()" + "&& 1" [(const_int 0)] { if (mode == SImode) @@ -4482,9 +4482,9 @@ (define_insn_and_split "*negabs2" [(set (match_operand:SIDI 0 "arith_reg_dest") (neg:SIDI (abs:SIDI (match_operand:SIDI 1 "arith_reg_operand")))) (clobber (reg:SI T_REG))] - "TARGET_SH1" + "TARGET_SH1 && can_create_pseudo_p ()" "#" - "&& can_create_pseudo_p ()" + "&& 1" [(const_int 0)] { if (mode == SImode) @@ -4551,9 +4551,9 @@ (define_insn_and_split "negdi_cond" (match_operand:DI 1 "arith_reg_operand") (neg:DI (match_operand:DI 2 "arith_reg_operand")))) (clobber (reg:SI T_REG))] - "TARGET_SH1" + "TARGET_SH1 && can_create_pseudo_p ()" "#" - "&& can_create_pseudo_p ()" + "&& 1" [(const_int 0)] { rtx_code_label *skip_neg_label = gen_label_rtx (); @@ -4622,9 +4622,9 @@ (define_insn_and_split "*swapbisi2_and_shl8" (const_int 8)) (const_int 65280)) (match_operand:SI 2 "arith_reg_operand" "r")))] - "TARGET_SH1 && ! reload_in_progress && ! reload_completed" + "TARGET_SH1 && ! reload_in_progress && ! reload_completed && can_create_pseudo_p ()" "#" - "&& can_create_pseudo_p ()" + "&& 1" [(const_int 0)] { rtx tmp0 = gen_reg_rtx (SImode); @@ -4644,9 +4644,9 @@ (define_insn_and_split "*swapbhisi2" (const_int 8)) (const_int 65280)) (zero_extract:SI (match_dup 1) (const_int 8) (const_int 8))))] - "TARGET_SH1 && ! reload_in_progress && ! reload_completed" + "TARGET_SH1 && ! reload_in_progress && ! reload_completed && can_create_pseudo_p ()" "#" - "&& can_create_pseudo_p ()" + "&& 1" [(const_int 0)] { rtx tmp = gen_reg_rtx (SImode); @@ -5005,9 +5005,9 @@ (define_insn_and_split "*movsi_index_disp_load" [(set (match_operand:SI 0 "arith_reg_dest" "=r") (match_operand:SI 1 "mem_index_disp_operand" "m")) (clobber (reg:SI T_REG))] - "TARGET_SH1" + "TARGET_SH1 && can_create_pseudo_p ()" "#" - "&& can_create_pseudo_p ()" + "&& 1" [(set (match_dup 6) (plus:SI (match_dup 5) (match_dup 3))) (set (match_dup 0) (match_dup 7))] { @@ -5033,9 +5033,9 @@ (define_insn_and_split "*movhi_index_disp_load" [(set (match_operand:SI 0 "arith_reg_dest") (SZ_EXTEND:SI (match_operand:HI 1 "mem_index_disp_operand"))) (clobber (reg:SI T_REG))] - "TARGET_SH1" + "TARGET_SH1 && can_create_pseudo_p ()" "#" - "&& can_create_pseudo_p ()" + "&& 1" [(const_int 0)] { rtx mem = operands[1]; @@ -5080,9 +5080,9 @@ (define_insn_and_split "*mov_index_disp_store" [(set (match_operand:HISI 0 "mem_index_disp_operand" "=m") (match_operand:HISI 1 "arith_reg_operand" "r")) (clobber (reg:SI T_REG))] - "TARGET_SH1" + "TARGET_SH1 && can_create_pseudo_p ()" "#" - "&& can_create_pseudo_p ()" + "&& 1" [(set (match_dup 6) (plus:SI (match_dup 5) (match_dup 3))) (set (match_dup 7) (match_dup 1))] { @@ -8311,9 +8311,9 @@ (define_insn_and_split "*mov_t_msb_neg" (const_int 1)) (const_int 2147483647))) (clobber (reg:SI T_REG))] - "TARGET_SH1" + "TARGET_SH1 && can_create_pseudo_p ()" "#" - "&& can_create_pseudo_p ()" + "&& 1" [(parallel [(set (match_dup 0) (plus:SI (zero_extract:SI (match_dup 1) (const_int 1) (const_int 0)) @@ -8325,9 +8325,9 @@ (define_insn_and_split "*mov_t_msb_neg" (plus:SI (match_operand 1 "treg_set_expr") (const_int 2147483647))) ;; 0x7fffffff (clobber (reg:SI T_REG))] - "TARGET_SH1" + "TARGET_SH1 && can_create_pseudo_p ()" "#" - "&& can_create_pseudo_p ()" + "&& 1" [(const_int 0)] { if (negt_reg_operand (operands[1], VOIDmode)) @@ -8474,9 +8474,9 @@ (define_insn_and_split "*movt_msb" (define_insn_and_split "*negt_msb" [(set (match_operand:SI 0 "arith_reg_dest") (match_operand:SI 1 "negt_reg_shl31_operand"))] - "TARGET_SH1" + "TARGET_SH1 && can_create_pseudo_p ()" "#" - "&& can_create_pseudo_p ()" + "&& 1" [(const_int 0)] { rtx tmp = gen_reg_rtx (SImode); @@ -8895,9 +8895,9 @@ (define_insn_and_split "clipu_one" [(set (match_operand:SI 0 "arith_reg_dest") (umin:SI (match_operand:SI 1 "arith_reg_operand") (const_int 1))) (clobber (reg:SI T_REG))] - "TARGET_SH2A" + "TARGET_SH2A && can_create_pseudo_p ()" "#" - "&& can_create_pseudo_p ()" + "&& 1" [(const_int 0)] { emit_insn (gen_cmpeqsi_t (operands[1], const0_rtx));