From patchwork Thu Jul 4 12:53:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 1956871 X-Patchwork-Delegate: ykai007@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4WFGn43XcPz1xqb for ; Thu, 4 Jul 2024 22:54:16 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 3AC738886C; Thu, 4 Jul 2024 14:53:59 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=0leil.net Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id B5DD388885; Thu, 4 Jul 2024 14:53:56 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL,RCVD_IN_VALIDITY_CERTIFIED_BLOCKED, RCVD_IN_VALIDITY_RPBL_BLOCKED,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from smtp-bc08.mail.infomaniak.ch (smtp-bc08.mail.infomaniak.ch [45.157.188.8]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 812E388650 for ; Thu, 4 Jul 2024 14:53:54 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=0leil.net Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=foss+uboot@0leil.net Received: from smtp-3-0000.mail.infomaniak.ch (smtp-3-0000.mail.infomaniak.ch [10.4.36.107]) by smtp-3-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4WFGmf1gMczQ2L; Thu, 4 Jul 2024 14:53:54 +0200 (CEST) Received: from unknown by smtp-3-0000.mail.infomaniak.ch (Postfix) with ESMTPA id 4WFGmd2v3Qzn2Q; Thu, 4 Jul 2024 14:53:53 +0200 (CEST) From: Quentin Schulz Date: Thu, 04 Jul 2024 14:53:31 +0200 Subject: [PATCH 1/3] arm64: dts: rockchip: add PCIe3 support on rk3588-jaguar MIME-Version: 1.0 Message-Id: <20240704-tsd-rk3588-nvme-v1-1-fb9e8dde9570@cherry.de> References: <20240704-tsd-rk3588-nvme-v1-0-fb9e8dde9570@cherry.de> In-Reply-To: <20240704-tsd-rk3588-nvme-v1-0-fb9e8dde9570@cherry.de> To: Sumit Garg , Simon Glass , Philipp Tomsich , Kever Yang , Tom Rini , Klaus Goger , Heiko Stuebner Cc: u-boot@lists.denx.de, Quentin Schulz , Heiko Stuebner , Quentin Schulz X-Mailer: b4 0.14.0 X-Infomaniak-Routing: alpha X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean From: Heiko Stuebner The Jaguar SBC provides an M.2 slot connected to the pcie3 controller. In contrast to a number of other boards the pcie-refclk is gpio-controlled, so the necessary clock and is added to the list of pcie3 clocks. Signed-off-by: Heiko Stuebner Reviewed-by: Quentin Schulz Link: https://lore.kernel.org/r/20240423074956.2622318-1-heiko@sntech.de Signed-off-by: Heiko Stuebner [ upstream commit: 0ec7e1096332bc2b9bc881c21cfd234058f747b3 ] (cherry picked from commit 76a89655ae740dddb57187b5b52071ed99187452) Tested-by: Heiko Stuebner Reviewed-by: Kever Yang --- dts/upstream/src/arm64/rockchip/rk3588-jaguar.dts | 59 +++++++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/dts/upstream/src/arm64/rockchip/rk3588-jaguar.dts b/dts/upstream/src/arm64/rockchip/rk3588-jaguar.dts index 7d7303f8ecb..678ed8b4dcc 100644 --- a/dts/upstream/src/arm64/rockchip/rk3588-jaguar.dts +++ b/dts/upstream/src/arm64/rockchip/rk3588-jaguar.dts @@ -72,6 +72,27 @@ }; }; + /* + * 100MHz reference clock for PCIe peripherals from PI6C557-05BLE + * clock generator. + * The clock output is gated via the OE pin on the clock generator. + * This is modeled as a fixed-clock plus a gpio-gate-clock. + */ + pcie_refclk_gen: pcie-refclk-gen-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + }; + + pcie_refclk: pcie-refclk-clock { + compatible = "gpio-gate-clock"; + clocks = <&pcie_refclk_gen>; + #clock-cells = <0>; + enable-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_LOW>; /* PCIE30X4_CLKREQN_M0 */ + pinctrl-names = "default"; + pinctrl-0 = <&pcie30x4_clkreqn_m0>; + }; + pps { compatible = "pps-gpio"; gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; @@ -353,6 +374,30 @@ status = "okay"; }; +&pcie30phy { + status = "okay"; +}; + +&pcie3x4 { + /* + * The board has a gpio-controlled "pcie_refclk" generator, + * so add it to the list of clocks. + */ + clocks = <&cru ACLK_PCIE_4L_MSTR>, <&cru ACLK_PCIE_4L_SLV>, + <&cru ACLK_PCIE_4L_DBI>, <&cru PCLK_PCIE_4L>, + <&cru CLK_PCIE_AUX0>, <&cru CLK_PCIE4L_PIPE>, + <&pcie_refclk>; + clock-names = "aclk_mst", "aclk_slv", + "aclk_dbi", "pclk", + "aux", "pipe", + "ref"; + pinctrl-names = "default"; + pinctrl-0 = <&pcie30x4_waken_m0 &pcie30x4_perstn_m0>; + reset-gpios = <&gpio0 RK_PD0 GPIO_ACTIVE_HIGH>; /* PCIE30X4_PERSTN_M0 */ + vpcie3v3-supply = <&vcc3v3_mdot2>; + status = "okay"; +}; + &pinctrl { emmc { emmc_reset: emmc-reset { @@ -371,6 +416,20 @@ rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; }; }; + + pcie30x4 { + pcie30x4_clkreqn_m0: pcie30x4-clkreqn-m0 { + rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + pcie30x4_perstn_m0: pcie30x4-perstn-m0 { + rockchip,pins = <0 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + pcie30x4_waken_m0: pcie30x4-waken-m0 { + rockchip,pins = <0 RK_PC7 12 &pcfg_pull_none>; + }; + }; }; &saradc { From patchwork Thu Jul 4 12:53:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 1956872 X-Patchwork-Delegate: ykai007@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4WFGn70ghvz1xqb for ; Thu, 4 Jul 2024 22:54:19 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 8ECA7888BC; Thu, 4 Jul 2024 14:53:59 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=0leil.net Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 899AA88885; Thu, 4 Jul 2024 14:53:57 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_PASS, SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from smtp-42aa.mail.infomaniak.ch (smtp-42aa.mail.infomaniak.ch [IPv6:2001:1600:4:17::42aa]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 654218867A for ; Thu, 4 Jul 2024 14:53:55 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=0leil.net Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=foss+uboot@0leil.net Received: from smtp-3-0000.mail.infomaniak.ch (smtp-3-0000.mail.infomaniak.ch [10.4.36.107]) by smtp-3-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4WFGmf6qFBzMPW; Thu, 4 Jul 2024 14:53:54 +0200 (CEST) Received: from unknown by smtp-3-0000.mail.infomaniak.ch (Postfix) with ESMTPA id 4WFGmf1wSBzld0; Thu, 4 Jul 2024 14:53:54 +0200 (CEST) From: Quentin Schulz Date: Thu, 04 Jul 2024 14:53:32 +0200 Subject: [PATCH 2/3] rockchip: jaguar-rk3588: add PCIe M.2 M-KEY NVMe support MIME-Version: 1.0 Message-Id: <20240704-tsd-rk3588-nvme-v1-2-fb9e8dde9570@cherry.de> References: <20240704-tsd-rk3588-nvme-v1-0-fb9e8dde9570@cherry.de> In-Reply-To: <20240704-tsd-rk3588-nvme-v1-0-fb9e8dde9570@cherry.de> To: Sumit Garg , Simon Glass , Philipp Tomsich , Kever Yang , Tom Rini , Klaus Goger , Heiko Stuebner Cc: u-boot@lists.denx.de, Quentin Schulz X-Mailer: b4 0.14.0 X-Infomaniak-Routing: alpha X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean From: Quentin Schulz Jaguar has an M.2 M-KEY slot for NVMes, connected to the PCIe3 4-lane PHY on RK3588. CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y is technically not necessary since it's required only for the M.2 E-KEY slot on the main PCB, but that is used typically for WiFi+BT modules, or on the mezzanine connector but the features exposed behind that connector aren't supported in U-Boot (no DT for it right now). However, if the PHY driver is missing, we get the following error message: pcie_dw_rockchip pcie@fe170000: failed to get pcie phy (ret=-19) and you would need to know which PCIe controller that is before deciding to ignore it. While after enabling the PHY driver, we are greeted with: pcie_dw_rockchip pcie@fe170000: PCIe-2 Link Fail which is a bit more acceptable (to me). The other option would be to disable the PCIe2 PHYs/controllers in the DT, which I'm not too fond of. Signed-off-by: Quentin Schulz Reviewed-by: Heiko Stuebner Tested-by: Heiko Stuebner Reviewed-by: Kever Yang --- configs/jaguar-rk3588_defconfig | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/configs/jaguar-rk3588_defconfig b/configs/jaguar-rk3588_defconfig index 36bf34d97c8..18006467dde 100644 --- a/configs/jaguar-rk3588_defconfig +++ b/configs/jaguar-rk3588_defconfig @@ -13,6 +13,7 @@ CONFIG_TARGET_JAGUAR_RK3588=y CONFIG_DEBUG_UART_BASE=0xfeb50000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_PCI=y CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -40,6 +41,7 @@ CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y # CONFIG_CMD_SF is not set CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set @@ -88,7 +90,10 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DWC_ETH_QOS=y CONFIG_DWC_ETH_QOS_ROCKCHIP=y +CONFIG_NVME_PCI=y +CONFIG_PCIE_DW_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y CONFIG_SPL_PINCTRL=y CONFIG_DM_PMIC=y CONFIG_PMIC_RK8XX=y From patchwork Thu Jul 4 12:53:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 1956873 X-Patchwork-Delegate: ykai007@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4WFGnJ5KRxz1xqb for ; Thu, 4 Jul 2024 22:54:28 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 0E3A3888BF; Thu, 4 Jul 2024 14:54:00 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=0leil.net Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 7E3078867A; Thu, 4 Jul 2024 14:53:58 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_PASS, SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from smtp-8fac.mail.infomaniak.ch (smtp-8fac.mail.infomaniak.ch [IPv6:2001:1600:4:17::8fac]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 53ED18886C for ; Thu, 4 Jul 2024 14:53:56 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=0leil.net Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=foss+uboot@0leil.net Received: from smtp-3-0000.mail.infomaniak.ch (smtp-3-0000.mail.infomaniak.ch [10.4.36.107]) by smtp-3-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4WFGmh00DgzRjW; Thu, 4 Jul 2024 14:53:56 +0200 (CEST) Received: from unknown by smtp-3-0000.mail.infomaniak.ch (Postfix) with ESMTPA id 4WFGmg0KDWzkv4; Thu, 4 Jul 2024 14:53:55 +0200 (CEST) From: Quentin Schulz Date: Thu, 04 Jul 2024 14:53:33 +0200 Subject: [PATCH 3/3] rockchip: tiger-rk3588: add PCIe support MIME-Version: 1.0 Message-Id: <20240704-tsd-rk3588-nvme-v1-3-fb9e8dde9570@cherry.de> References: <20240704-tsd-rk3588-nvme-v1-0-fb9e8dde9570@cherry.de> In-Reply-To: <20240704-tsd-rk3588-nvme-v1-0-fb9e8dde9570@cherry.de> To: Sumit Garg , Simon Glass , Philipp Tomsich , Kever Yang , Tom Rini , Klaus Goger , Heiko Stuebner Cc: u-boot@lists.denx.de, Quentin Schulz X-Mailer: b4 0.14.0 X-Infomaniak-Routing: alpha X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean From: Quentin Schulz This enables PCIe support on Tiger as exposed on Q7_PCIE[0123]_[RT]X_[PN] signals and more specifically on the `PCI Express` connector on the Haikou devkit. This was tested with a PCIe to NVMe adapter (e.g. https://www.amazon.de/dp/B07RZZ3TJG). Signed-off-by: Quentin Schulz Reviewed-by: Heiko Stuebner Tested-by: Heiko Stuebner Reviewed-by: Kever Yang --- configs/tiger-rk3588_defconfig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/configs/tiger-rk3588_defconfig b/configs/tiger-rk3588_defconfig index 8fcdd063a3d..8eb1027e449 100644 --- a/configs/tiger-rk3588_defconfig +++ b/configs/tiger-rk3588_defconfig @@ -14,6 +14,7 @@ CONFIG_DEBUG_UART_BASE=0xfeb50000 CONFIG_DEBUG_UART_CLOCK=24000000 # CONFIG_DEBUG_UART_BOARD_INIT is not set CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_PCI=y CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -41,6 +42,7 @@ CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y # CONFIG_CMD_SF is not set CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set @@ -89,6 +91,8 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DWC_ETH_QOS=y CONFIG_DWC_ETH_QOS_ROCKCHIP=y +CONFIG_NVME_PCI=y +CONFIG_PCIE_DW_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y CONFIG_PHY_ROCKCHIP_USBDP=y