From patchwork Wed Jul 3 09:05:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Nazzareno Trimarchi X-Patchwork-Id: 1956049 X-Patchwork-Delegate: festevam@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.a=rsa-sha256 header.s=google header.b=fDLau7cR; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4WDYlc4nW5z1xqb for ; Wed, 3 Jul 2024 19:05:32 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 836C7887DB; Wed, 3 Jul 2024 11:05:20 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="fDLau7cR"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id B9CD6887CA; Wed, 3 Jul 2024 11:05:18 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-ej1-x634.google.com (mail-ej1-x634.google.com [IPv6:2a00:1450:4864:20::634]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id C5CD5887A7 for ; Wed, 3 Jul 2024 11:05:16 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=michael@amarulasolutions.com Received: by mail-ej1-x634.google.com with SMTP id a640c23a62f3a-a72459d8d6aso529147966b.0 for ; Wed, 03 Jul 2024 02:05:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1719997516; x=1720602316; darn=lists.denx.de; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=LjmTckBV+07wWKN3HJ+3wUh9ZFw51lqArJvINqyjWlI=; b=fDLau7cRX7udzkUvU755vwEWorYOpzD115BKKsNoeVnbzOOL0Xz89sqMBIgfWoWD2w 97hP/oBIFqebWLelmkacSXZ9MF/hbt8qfzf7iF2668FVNg656JAPsIuhea6rCWA3wfPt S6TSE8uJHh/E8VwVxG8YhByYeIrw6Azv7IqsM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1719997516; x=1720602316; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LjmTckBV+07wWKN3HJ+3wUh9ZFw51lqArJvINqyjWlI=; b=JBeuVug1DX2XX/+SPD0/z9HAU9s78irOqHiEbGh60Pm5Jg7PqdsmvoSkzEzYQHIjLr e9jAkZ0VY8jHxFfch4XEYEJWN0DxA8L9qxMISeqIOsoaBNa3f0M324l2LoE3tHaCRT5I vrm5m9L+2vGJCczO1Uwivc0ezYZ8gKJemCz/L8eRvs5lertl+GxTJraix8SJj/D4M+Yx tL0R1/kGadidBoZztGvfMrVzvxKb9bwZd94jCYmOtLXSzh7oe2ycENsXnzKsmx60EYYJ nNb617oMmg69NogAzi3+SbkwQoO1HUhFNFfqp5881teZwQ1PG7Q0ygkmMZDTErqUDqo7 iZ8Q== X-Forwarded-Encrypted: i=1; AJvYcCWPE+B6wr6FP+9hDFDugIzk0q9ZpDagqD+e1MI3ufFIuLaXnv4GQlnE0Xkuq3QTC4ZQcbWNbPZmHcS0bUzXkll+G6KVCg== X-Gm-Message-State: AOJu0Yz5DDEwMhh35vZ6M3KqBoGeRlHklFQQ56TnVc+8DhpaG97i6wvF ILrwtEwUuxg1DR8O2h7ldvrM5NGUHJpvp0+FqtpFdABWJ/PcPSM7F0hXwEr+7+Q= X-Google-Smtp-Source: AGHT+IEBHh4Gzvplo6/nF9WJKQYKuW/bnXrA00OjFcWKBIhN0FTW3wKTPq9N15Iu5H9ucVnZsRtAiQ== X-Received: by 2002:a17:906:5d1:b0:a72:b804:566f with SMTP id a640c23a62f3a-a75144a2809mr649662266b.52.1719997516143; Wed, 03 Jul 2024 02:05:16 -0700 (PDT) Received: from panicking.amarulasolutions.com ([2001:b07:6474:ebbf:d622:a7f3:7832:9423]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a72aaf1bb6bsm491186866b.30.2024.07.03.02.05.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Jul 2024 02:05:15 -0700 (PDT) From: Michael Trimarchi To: Lukasz Majewski , Sean Anderson Cc: Tom Rini , linux-amarula@amarulasolutions.com, u-boot@lists.denx.de, Dario Binacchi , Michael Trimarchi Subject: [PATCH 1/2] clk: clk-mux: Make public the clk_fetch_parent_index Date: Wed, 3 Jul 2024 11:05:10 +0200 Message-ID: <20240703090512.92636-2-michael@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240703090512.92636-1-michael@amarulasolutions.com> References: <20240703090512.92636-1-michael@amarulasolutions.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Make public the clk_fetch_parent_index and rename it. This allow us to be reused in driver specialization Signed-off-by: Michael Trimarchi --- drivers/clk/clk-mux.c | 5 ++--- include/linux/clk-provider.h | 1 + 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c index f410518461e..e3481be95fa 100644 --- a/drivers/clk/clk-mux.c +++ b/drivers/clk/clk-mux.c @@ -102,8 +102,7 @@ u8 clk_mux_get_parent(struct clk *clk) return clk_mux_val_to_index(clk, mux->table, mux->flags, val); } -static int clk_fetch_parent_index(struct clk *clk, - struct clk *parent) +int clk_mux_fetch_parent_index(struct clk *clk, struct clk *parent) { struct clk_mux *mux = to_clk_mux(clk); @@ -127,7 +126,7 @@ static int clk_mux_set_parent(struct clk *clk, struct clk *parent) u32 val; u32 reg; - index = clk_fetch_parent_index(clk, parent); + index = clk_mux_fetch_parent_index(clk, parent); if (index < 0) { log_err("Could not fetch index\n"); return index; diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index b8acacd49ee..59f9c241b84 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -74,6 +74,7 @@ struct clk_mux { #define to_clk_mux(_clk) container_of(_clk, struct clk_mux, clk) extern const struct clk_ops clk_mux_ops; u8 clk_mux_get_parent(struct clk *clk); +int clk_mux_fetch_parent_index(struct clk *clk, struct clk *parent); /** * clk_mux_index_to_val() - Convert the parent index to the register value From patchwork Wed Jul 3 09:05:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Nazzareno Trimarchi X-Patchwork-Id: 1956050 X-Patchwork-Delegate: festevam@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.a=rsa-sha256 header.s=google header.b=ekcxGqil; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4WDYlq4Dtlz1xqb for ; Wed, 3 Jul 2024 19:05:43 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id E42A3887F0; Wed, 3 Jul 2024 11:05:21 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="ekcxGqil"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 2B5B2887E4; Wed, 3 Jul 2024 11:05:20 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-ej1-x636.google.com (mail-ej1-x636.google.com [IPv6:2a00:1450:4864:20::636]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id C2CF9887F0 for ; Wed, 3 Jul 2024 11:05:17 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=michael@amarulasolutions.com Received: by mail-ej1-x636.google.com with SMTP id a640c23a62f3a-a7241b2fe79so563842266b.1 for ; Wed, 03 Jul 2024 02:05:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1719997517; x=1720602317; darn=lists.denx.de; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=nTKyPOiZSdTeRWSurS/BWFcqhEtBNgG2EpnrpWfnasU=; b=ekcxGqil85uHsUrX2AhM0U9zYWw6iOOzN6lYE78cu7N00TJjAAXp2TOCSVCHf7RGS9 1dgau5iWn7LptPwEoHF+Qfkgx/FtTwObBX1KNhvMkSO84WzN4msFxa7qdcgAHTIocBjO ZDdpvIImODR/k3wiA3sym7LOdeM0f9PbtqfR8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1719997517; x=1720602317; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=nTKyPOiZSdTeRWSurS/BWFcqhEtBNgG2EpnrpWfnasU=; b=tJEpHhXh726EKmnLBXGD1LiShWOQw+q41FvXLlP2jPtNtfiUe8uT/z8b991+WlMFL0 va9m51bqeNxHqdxsSUn//3aeJRK/l6ZjGg55k4UodzhK7a6Kbwwkfy0yyEB0oAOEw6OM 8DCUmIAa4gKMiVd+GXK3EEUeCMAwT4hu2SZ/6CXdJcMKEW5oujlYk5TaWhmC/noiJku0 71wiX4P0WyEFigaKFSDVVd/rrXdLP3LbDj9ZG/Rcn2fXu4lwdlpcqdBGNrU6XckQ6FK9 HWU8xZwZuT1oGrVM9NarQXDkkBTdJsUQCgoLW08LhaOOJGApFwoigTlUs+oZCfjMVQG8 9U8Q== X-Forwarded-Encrypted: i=1; AJvYcCWc3TS371zD4OGKamyc0oaJ4SN3vVOdE8TuuOS4tXUJ2B5vbmX5wKnoGXZbP1dSWL7BOtpIixs9YfeY+1n0CZmNO5IMRQ== X-Gm-Message-State: AOJu0YwTf6rhQFhRmUgbCs/6mLGphWLFjnvfTa7Z9UmlIw1m6Z6l/KCc x8GWsWQY7+EecNbWzEIe48m9OiuzaL7dV41Is9tN3f66275bEW1arcK2yL/+6kFbUdbBEdWs1Ri lmdg= X-Google-Smtp-Source: AGHT+IHp05O72jT6LwMNxasmHItqih6SJm3QxI3vmQM2mb1JvOZEzEzxjUotJsfxs6akhuNnLRHgww== X-Received: by 2002:a17:907:2d22:b0:a6f:4b5b:4ba7 with SMTP id a640c23a62f3a-a75144dea19mr816420266b.67.1719997517158; Wed, 03 Jul 2024 02:05:17 -0700 (PDT) Received: from panicking.amarulasolutions.com ([2001:b07:6474:ebbf:d622:a7f3:7832:9423]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a72aaf1bb6bsm491186866b.30.2024.07.03.02.05.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Jul 2024 02:05:16 -0700 (PDT) From: Michael Trimarchi To: Lukasz Majewski , Sean Anderson Cc: Tom Rini , linux-amarula@amarulasolutions.com, u-boot@lists.denx.de, Dario Binacchi , Michael Trimarchi Subject: [PATCH 2/2] clk: imx: add mux ops for i.MX8M composite clk Date: Wed, 3 Jul 2024 11:05:11 +0200 Message-ID: <20240703090512.92636-3-michael@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240703090512.92636-1-michael@amarulasolutions.com> References: <20240703090512.92636-1-michael@amarulasolutions.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Upstream Linux commit f90b68d6c8b0. The CORE/BUS root slice has following design, simplied graph: The difference is core not have pre_div block. A composite core/bus clk has 8 inputs for mux to select, saying clk[0-7]. It support target(smart) interface and normal interface. Target interface is exported for programmer easy to configure ccm root. Normal interface is also exported, but we not use it in our driver, because it will introduce more complexity compared with target interface. The normal interface simplified as below: SEL_A GA +--+ +-+ | +->+ +------+ CLK[0-7]--->+ | +-+ | | | | +----v---+ +----+ | +--+ |pre_diva+----> | +---------+ | +--------+ |mux +--+post_div | | +--+ |pre_divb+--->+ | +---------+ | | | +----^---+ +----+ +--->+ | +-+ | | +->+ +------+ +--+ +-+ SEL_B GB The mux in the upper pic is not the target interface MUX, target interface MUX is hiding SEL_A and SEL_B. When you choose clk[0-7], you are actually writing SEL_A or SEL_B depends on the internal counter which will also control the internal "mux". The target interface simplified as below which is used by Linux Kernel: CLK[0-7]--->MUX-->Gate-->pre_div-->post_div A requirement of the Target Interface's software is that the target clock source is active, it means when setting SEL_A, the current input clk to SEL_A must be active, same to SEL_B. We touch target interface, but hardware logic actually also need configure normal interface. There will be system hang, when doing the following steps: The initial state: SEL_A/SEL_B are both sourcing from clk0, the internal counter choose SEL_A. 1. switch mux from clk0 to clk1 The hardware logic will choose SEL_B and configure SEL_B to clk1. SEL_A no changed. 2. gate off clk0 Disable clk0, then the input to SEL_A is off. 3. switch from clk1 to clk2 The hardware logic will choose SEL_A and configure SEL_A to clk2, however the current SEL_A input clk0 is off, the system hang. The solution to fix the issue is in step 1, write twice to target interface MUX, it will make SEL_A/SEL_B both sources from clk1, then no need to care about the state of clk0. And finally system performs well. Signed-off-by: Michael Trimarchi --- drivers/clk/imx/clk-composite-8m.c | 37 +++++++++++++++++++++++++++++- 1 file changed, 36 insertions(+), 1 deletion(-) diff --git a/drivers/clk/imx/clk-composite-8m.c b/drivers/clk/imx/clk-composite-8m.c index 560d74aac80..2cb7d135000 100644 --- a/drivers/clk/imx/clk-composite-8m.c +++ b/drivers/clk/imx/clk-composite-8m.c @@ -117,6 +117,41 @@ static const struct clk_ops imx8m_clk_composite_divider_ops = { .set_rate = imx8m_clk_composite_divider_set_rate, }; +static int imx8m_clk_mux_set_parent(struct clk *clk, struct clk *parent) +{ + struct clk_mux *mux = to_clk_mux(clk); + int index; + u32 val; + u32 reg; + + index = clk_mux_fetch_parent_index(clk, parent); + if (index < 0) { + log_err("Could not fetch index\n"); + return index; + } + + val = clk_mux_index_to_val(mux->table, mux->flags, index); + + reg = readl(mux->reg); + reg &= ~(mux->mask << mux->shift); + val = val << mux->shift; + reg |= val; + + /* + * write twice to make sure non-target interface + * SEL_A/B point the same clk input. + */ + writel(reg, mux->reg); + writel(reg, mux->reg); + + return 0; +} + +const struct clk_ops imx8m_clk_mux_ops = { + .get_rate = clk_generic_get_rate, + .set_parent = imx8m_clk_mux_set_parent, +}; + struct clk *imx8m_clk_composite_flags(const char *name, const char * const *parent_names, int num_parents, void __iomem *reg, @@ -155,7 +190,7 @@ struct clk *imx8m_clk_composite_flags(const char *name, clk = clk_register_composite(NULL, name, parent_names, num_parents, - &mux->clk, &clk_mux_ops, &div->clk, + &mux->clk, &imx8m_clk_mux_ops, &div->clk, &imx8m_clk_composite_divider_ops, &gate->clk, &clk_gate_ops, flags); if (IS_ERR(clk))