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a=ed25519-sha256; c=relaxed/relaxed; t=1719994501; s=strato-dkim-0003; d=gjlay.de; h=Subject:To:From:Date:Message-ID:Cc:Date:From:Subject:Sender; bh=qh1JVKQRhK6v8rymPVomkjZM4sNzgXp+XQSiuwYrCV4=; b=8/W5Dug+GhfeQLWbeSAUrtX7Ju5GMCaNgXe69ghqfkWTfvgfsfnNncn/V2Qxffqj+R p9v+wWm9iFLmnPVIMFBA== X-RZG-AUTH: ":LXoWVUeid/7A29J/hMvvT3koxZnKT7Qq0xotTetVnKkbjtK7q2y9LkX3jYYP" Received: from [192.168.2.102] by smtp.strato.de (RZmta 50.5.0 DYNA|AUTH) with ESMTPSA id x057780638F0QuJ (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256 bits)) (Client did not present a certificate) for ; Wed, 3 Jul 2024 10:15:00 +0200 (CEST) Message-ID: Date: Wed, 3 Jul 2024 10:14:59 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: Georg-Johann Lay Content-Language: en-US To: "gcc-patches@gcc.gnu.org" Subject: [patch,avr,applied] Fix PR98762 partial clobber in movqi output X-Spam-Status: No, score=-11.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, SPF_HELO_PASS, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org The movqi output for Reduced Tiny had a wrong condition and restore statement for the base register in the case where the destination overlaps the base register. Applied as obvious. Johann --- AVR: target/98762 - Handle partial clobber in movqi output. PR target/98762 gcc/ * config/avr/avr.cc (avr_out_movqi_r_mr_reg_disp_tiny): Properly restore the base register when it is partially clobbered. gcc/testsuite/ * gcc.target/avr/torture/pr98762.c: New test. diff --git a/gcc/config/avr/avr.cc b/gcc/config/avr/avr.cc index a110af62cd5..f048bf5fd41 100644 --- a/gcc/config/avr/avr.cc +++ b/gcc/config/avr/avr.cc @@ -4838,13 +4838,30 @@ avr_out_movqi_r_mr_reg_disp_tiny (rtx_insn *insn, rtx op[], int *plen) rtx dest = op[0]; rtx src = op[1]; rtx x = XEXP (src, 0); + rtx base = XEXP (x, 0); - avr_asm_len (TINY_ADIW (%I1, %J1, %o1) CR_TAB - "ld %0,%b1" , op, plen, -3); + if (plen) + *plen = 0; - if (!reg_overlap_mentioned_p (dest, XEXP (x, 0)) - && !reg_unused_after (insn, XEXP (x, 0))) - avr_asm_len (TINY_SBIW (%I1, %J1, %o1), op, plen, 2); + if (!reg_overlap_mentioned_p (dest, base)) + { + avr_asm_len (TINY_ADIW (%I1, %J1, %o1) CR_TAB + "ld %0,%b1", op, plen, 3); + if (!reg_unused_after (insn, base)) + avr_asm_len (TINY_SBIW (%I1, %J1, %o1), op, plen, 2); + } + else + { + // PR98762: The base register overlaps dest and is only partly clobbered. + rtx base2 = all_regs_rtx[1 ^ REGNO (dest)]; + + if (!reg_unused_after (insn, base2)) + avr_asm_len ("mov __tmp_reg__,%0" , &base2, plen, 1); + avr_asm_len (TINY_ADIW (%I1, %J1, %o1) CR_TAB + "ld %0,%b1", op, plen, 3); + if (!reg_unused_after (insn, base2)) + avr_asm_len ("mov %0,__tmp_reg__" , &base2, plen, 1); + } return ""; } diff --git a/gcc/testsuite/gcc.target/avr/torture/pr98762.c b/gcc/testsuite/gcc.target/avr/torture/pr98762.c new file mode 100644 index 00000000000..c3ba7da69a8 --- /dev/null +++ b/gcc/testsuite/gcc.target/avr/torture/pr98762.c @@ -0,0 +1,19 @@ +/* { dg-do run } */ +/* { dg-additional-options "-std=c99" } */ + +long long acc = 0x1122334455667788; + +__attribute__((noinline,noclone)) +void addhi (short a) +{ + acc += (long long) a << 32; +} + +int main (void) +{ + addhi (0x0304); + if (acc != 0x1122364855667788) + __builtin_abort(); + + return 0; +}