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Fri, 28 Jun 2024 08:58:32 -0700 (PDT) MIME-Version: 1.0 From: Uros Bizjak Date: Fri, 28 Jun 2024 17:58:20 +0200 Message-ID: Subject: [PATCH] i386: Cleanup tmp variable usage in ix86_expand_move To: "gcc-patches@gcc.gnu.org" X-Spam-Status: No, score=-8.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Remove extra assignment, extra temp variable and variable shadowing. No functional changes intended. gcc/ChangeLog: * config/i386/i386-expand.cc (ix86_expand_move): Remove extra assignment to tmp variable, reuse tmp variable instead of declaring new temporary variable and remove tmp variable shadowing. Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. Also built crosscompiler to x86_64-pc-cygwin and x86_64-apple-darwin16. Uros. diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc index a4434c19272..a773b45bf03 100644 --- a/gcc/config/i386/i386-expand.cc +++ b/gcc/config/i386/i386-expand.cc @@ -414,9 +414,6 @@ ix86_expand_move (machine_mode mode, rtx operands[]) { #if TARGET_PECOFF tmp = legitimize_pe_coff_symbol (op1, addend != NULL_RTX); -#else - tmp = NULL_RTX; -#endif if (tmp) { @@ -425,6 +422,7 @@ ix86_expand_move (machine_mode mode, rtx operands[]) break; } else +#endif { op1 = operands[1]; break; @@ -482,12 +480,12 @@ ix86_expand_move (machine_mode mode, rtx operands[]) /* dynamic-no-pic */ if (MACHOPIC_INDIRECT) { - rtx temp = (op0 && REG_P (op0) && mode == Pmode) - ? op0 : gen_reg_rtx (Pmode); - op1 = machopic_indirect_data_reference (op1, temp); + tmp = (op0 && REG_P (op0) && mode == Pmode) + ? op0 : gen_reg_rtx (Pmode); + op1 = machopic_indirect_data_reference (op1, tmp); if (MACHOPIC_PURE) op1 = machopic_legitimize_pic_address (op1, mode, - temp == op1 ? 0 : temp); + tmp == op1 ? 0 : tmp); } if (op0 != op1 && GET_CODE (op0) != MEM) { @@ -542,9 +540,9 @@ ix86_expand_move (machine_mode mode, rtx operands[]) op1 = validize_mem (force_const_mem (mode, op1)); if (!register_operand (op0, mode)) { - rtx temp = gen_reg_rtx (mode); - emit_insn (gen_rtx_SET (temp, op1)); - emit_move_insn (op0, temp); + tmp = gen_reg_rtx (mode); + emit_insn (gen_rtx_SET (tmp, op1)); + emit_move_insn (op0, tmp); return; } } @@ -565,7 +563,7 @@ ix86_expand_move (machine_mode mode, rtx operands[]) if (SUBREG_BYTE (op0) == 0) { wide_int mask = wi::mask (64, true, 128); - rtx tmp = immed_wide_int_const (mask, TImode); + tmp = immed_wide_int_const (mask, TImode); op0 = SUBREG_REG (op0); tmp = gen_rtx_AND (TImode, copy_rtx (op0), tmp); if (mode == DFmode) @@ -577,7 +575,7 @@ ix86_expand_move (machine_mode mode, rtx operands[]) else if (SUBREG_BYTE (op0) == 8) { wide_int mask = wi::mask (64, false, 128); - rtx tmp = immed_wide_int_const (mask, TImode); + tmp = immed_wide_int_const (mask, TImode); op0 = SUBREG_REG (op0); tmp = gen_rtx_AND (TImode, copy_rtx (op0), tmp); if (mode == DFmode)