From patchwork Thu Jun 27 08:29:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Sayle X-Patchwork-Id: 1953053 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=nextmovesoftware.com header.i=@nextmovesoftware.com header.a=rsa-sha256 header.s=default header.b=KBohleh0; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4W8sKN0JK7z20X6 for ; Thu, 27 Jun 2024 18:33:26 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id BB11B3838A1A for ; Thu, 27 Jun 2024 08:33:24 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from server.nextmovesoftware.com (server.nextmovesoftware.com [69.48.154.134]) by sourceware.org (Postfix) with ESMTPS id C0F8B3839390 for ; Thu, 27 Jun 2024 08:29:45 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org C0F8B3839390 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=nextmovesoftware.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=nextmovesoftware.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org C0F8B3839390 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=69.48.154.134 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1719476990; cv=none; b=Femn5Y8V9dEA6BjLZ89boWjn+8cKh6kpf38s7X870FMyR1VyPsxiZgxc6vGzO2MgMP8Y3nqMzvT5DHgriGa/zs+aH9/kmBz+MbFL4mXMnn27fZ4JgTTaOzCOlfG2/xASMDS3kq+8hdzsOy36IoTmrNbrxviMY/Qfjb16INhOEMg= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1719476990; c=relaxed/simple; bh=d1MirGdzNmNF2qCct9EiNNnUzlcQlCPrh1IGTAluLl0=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=aaU7FYgrGqAwFE/TIMVcYqfAgmLAoaOWnsRETHd48sF9iyev9LjW7oyJCuVNCoVlGKdVJh+XmTH/kenG7FF34+RXYAapJKm0+e1zJROLuBM+0jZAeCIYeLitfsCxCRQR63KtfNvwG250ISA0xoXoQwh1eYf4aEGHCzTy4euKvcU= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=nextmovesoftware.com; s=default; h=Content-Type:MIME-Version:Message-ID: Date:Subject:Cc:To:From:Sender:Reply-To:Content-Transfer-Encoding:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:In-Reply-To:References:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=NVVzh5l2wUu5gok1V4TlQm2VebDui+sI7pksxoW1JMs=; b=KBohleh04ZdytGFg/uI+BrEL0S Rq0arLO/wliKxNboM44inl9A/eQvZCVWpkIjBthCk5xLhBn9h7v9Ax2nl1Uw8DYXmuhTO7d35Crxl 16/HozeWIpYA64ST6EpVK/oPhg/xVurNqtRckA7kCZ+pixWnUeWVCGswVV4/EcILXyQyfmqvdiJBB bzCbnwnLBs9CAkM6g3M2NoEIJzjnQGafA5T1i8C3kZPRbTiikmFk4pdbfTYtqUkVRBGv+wIlnuLe2 ilPpnh8M/4jk1HboRG3gICp2/9cKZ41y1JWKe5QjHqpxdgJv+r56iFoPc8gq2NEq3u4hM34XdgyWD 10I/iqQw==; Received: from [168.86.198.82] (port=51684 helo=Dell) by server.nextmovesoftware.com with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.97.1) (envelope-from ) id 1sMkVk-000000001Ut-3AO1; Thu, 27 Jun 2024 04:29:44 -0400 From: "Roger Sayle" To: Cc: "'Hongtao Liu'" Subject: [x86 SSE PATCH] Some additional ternlog refinements. Date: Thu, 27 Jun 2024 09:29:42 +0100 Message-ID: <000701dac86c$2953c570$7bfb5050$@nextmovesoftware.com> MIME-Version: 1.0 X-Mailer: Microsoft Outlook 16.0 Thread-Index: AdrIa1F8gwg8IAr8Tqy9i+adsUcTZA== Content-Language: en-gb X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - server.nextmovesoftware.com X-AntiAbuse: Original Domain - gcc.gnu.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - nextmovesoftware.com X-Get-Message-Sender-Via: server.nextmovesoftware.com: authenticated_id: roger@nextmovesoftware.com X-Authenticated-Sender: server.nextmovesoftware.com: roger@nextmovesoftware.com X-Source: X-Source-Args: X-Source-Dir: X-Spam-Status: No, score=-12.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org This patch is another round of refinements to fine tune the new ternlog infrastructure in i386's sse.md. This patch tweaks ix86_ternlog_idx to allow multiple MEM/CONST_VECTOR/VEC_DUPLICATE operands prior to splitting (before reload), when force_register is called on all but one of these operands. Conceptually during the dynamic programming, registers fill the args slots in the order 0, 1, 2, and mem-like operands fill the slots in the order 2, 0, 1 [preferring the memory operand to come last]. This patch allows us to remove some of the legacy ternlog patterns in sse.md without regressions [which is left to the next and final patch in this series]. An indication that these patterns are no longer required is shown by the necessary testsuite tweaks below, where the output assembler for the legacy instructions used hexadecimal, but with the new ternlog infrastructure now consistently use decimal. This patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check, both with and without --target_board=unix{-m32} with no new failures. Ok for mainline? 2024-06-27 Roger Sayle gcc/ChangeLog * config/i386/i386-expand.cc (ix86_ternlog_idx) : Add a "goto do_mem_operand" as this need not match memory_operand. : Only args[2] may be volatile memory operand. Allow MEM/VEC_DUPLICATE/CONST_VECTOR as args[0] and args[1]. gcc/testsuite/ChangeLog * gcc.target/i386/avx512f-andn-di-zmm-2.c: Match decimal instead of hexadecimal immediate operand to ternlog. * gcc.target/i386/avx512f-andn-si-zmm-2.c: Likewise. * gcc.target/i386/avx512f-orn-si-zmm-1.c: Likewise. * gcc.target/i386/avx512f-orn-si-zmm-2.c: Likewise. * gcc.target/i386/pr100711-3.c: Likewise. * gcc.target/i386/pr100711-4.c: Likewise. * gcc.target/i386/pr100711-5.c: Likewise. Thanks in advance, Roger diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc index ac42300..110de7f 100644 --- a/gcc/config/i386/i386-expand.cc +++ b/gcc/config/i386/i386-expand.cc @@ -25608,7 +25608,7 @@ ix86_ternlog_idx (rtx op, rtx *args) case VEC_DUPLICATE: if (!bcst_mem_operand (op, GET_MODE (op))) return -1; - /* FALLTHRU */ + goto do_mem_operand; case MEM: if (!memory_operand (op, GET_MODE (op))) @@ -25620,23 +25620,52 @@ ix86_ternlog_idx (rtx op, rtx *args) /* FALLTHRU */ case CONST_VECTOR: +do_mem_operand: if (!args[2]) { args[2] = op; return 0xaa; } /* Maximum of one volatile memory reference per expression. */ - if (side_effects_p (op) && side_effects_p (args[2])) + if (side_effects_p (op)) return -1; if (rtx_equal_p (op, args[2])) return 0xaa; - /* Check if one CONST_VECTOR is the ones-complement of the other. */ + /* Check if CONST_VECTOR is the ones-complement of args[2]. */ if (GET_CODE (op) == CONST_VECTOR && GET_CODE (args[2]) == CONST_VECTOR && rtx_equal_p (simplify_const_unary_operation (NOT, GET_MODE (op), op, GET_MODE (op)), args[2])) return 0x55; + if (!args[0]) + { + args[0] = op; + return 0xf0; + } + if (rtx_equal_p (op, args[0])) + return 0xf0; + /* Check if CONST_VECTOR is the ones-complement of args[0]. */ + if (GET_CODE (op) == CONST_VECTOR + && GET_CODE (args[0]) == CONST_VECTOR + && rtx_equal_p (simplify_const_unary_operation (NOT, GET_MODE (op), + op, GET_MODE (op)), + args[0])) + return 0x0f; + if (!args[1]) + { + args[1] = op; + return 0xcc; + } + if (rtx_equal_p (op, args[1])) + return 0xcc; + /* Check if CONST_VECTOR is the ones-complement of args[1]. */ + if (GET_CODE (op) == CONST_VECTOR + && GET_CODE (args[1]) == CONST_VECTOR + && rtx_equal_p (simplify_const_unary_operation (NOT, GET_MODE (op), + op, GET_MODE (op)), + args[1])) + return 0x33; return -1; case NOT: diff --git a/gcc/testsuite/gcc.target/i386/avx512f-andn-di-zmm-2.c b/gcc/testsuite/gcc.target/i386/avx512f-andn-di-zmm-2.c index 4ebb30f..24f3d6c 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-andn-di-zmm-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-andn-di-zmm-2.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-mavx512f -mno-avx512vl -mprefer-vector-width=512 -O2" } */ -/* { dg-final { scan-assembler-times "vpternlogq\[ \\t\]+\\\$0x44, \\(%(?:eax|rdi|edi)\\)\\\{1to\[1-8\]+\\\}, %zmm\[0-9\]+, %zmm0" 1 } } */ +/* { dg-final { scan-assembler-times "vpternlogq\[ \\t\]+\\\$80, \\(%(?:eax|rdi|edi)\\)\\\{1to\[1-8\]+\\\}, %zmm\[0-9\]+, %zmm0" 1 } } */ /* { dg-final { scan-assembler-not "vpbroadcast" } } */ #define type __m512i diff --git a/gcc/testsuite/gcc.target/i386/avx512f-andn-si-zmm-2.c b/gcc/testsuite/gcc.target/i386/avx512f-andn-si-zmm-2.c index 86e7ebe..1f5e72d 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-andn-si-zmm-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-andn-si-zmm-2.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-mavx512f -O2" } */ -/* { dg-final { scan-assembler-times "vpternlogd\[ \\t\]+\\\$0x44, \\(%(?:eax|rdi|edi)\\)\\\{1to\[1-8\]+\\\}, %zmm\[0-9\]+, %zmm0" 1 } } */ +/* { dg-final { scan-assembler-times "vpternlogd\[ \\t\]+\\\$80, \\(%(?:eax|rdi|edi)\\)\\\{1to\[1-8\]+\\\}, %zmm\[0-9\]+, %zmm0" 1 } } */ /* { dg-final { scan-assembler-not "vpbroadcast" } } */ #define type __m512i diff --git a/gcc/testsuite/gcc.target/i386/avx512f-orn-si-zmm-1.c b/gcc/testsuite/gcc.target/i386/avx512f-orn-si-zmm-1.c index 7d02f03..d21f48f 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-orn-si-zmm-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-orn-si-zmm-1.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-mavx512f -mno-avx512vl -mprefer-vector-width=512 -O2" } */ -/* { dg-final { scan-assembler-times "vpternlogd\[ \\t\]+\\\$0xdd, \\(%(?:eax|rdi|edi)\\)\\\{1to\[1-8\]+\\\}, %zmm\[0-9\]+, %zmm0" 1 } } */ +/* { dg-final { scan-assembler-times "vpternlogd\[ \\t\]+\\\$245, \\(%(?:eax|rdi|edi)\\)\\\{1to\[1-8\]+\\\}, %zmm\[0-9\]+, %zmm0" 1 } } */ /* { dg-final { scan-assembler-not "vpbroadcast" } } */ #define type __m512i diff --git a/gcc/testsuite/gcc.target/i386/avx512f-orn-si-zmm-2.c b/gcc/testsuite/gcc.target/i386/avx512f-orn-si-zmm-2.c index c793083..5359200 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-orn-si-zmm-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-orn-si-zmm-2.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-mavx512f -mno-avx512vl -mprefer-vector-width=512 -O2" } */ -/* { dg-final { scan-assembler-times "vpternlogd\[ \\t\]+\\\$0xbb, \\(%(?:eax|rdi|edi)\\)\\\{1to\[1-8\]+\\\}, %zmm\[0-9\]+, %zmm0" 1 } } */ +/* { dg-final { scan-assembler-times "vpternlogd\[ \\t\]+\\\$175, \\(%(?:eax|rdi|edi)\\)\\\{1to\[1-8\]+\\\}, %zmm\[0-9\]+, %zmm0" 1 } } */ /* { dg-final { scan-assembler-not "vpbroadcast" } } */ #define type __m512i diff --git a/gcc/testsuite/gcc.target/i386/pr100711-3.c b/gcc/testsuite/gcc.target/i386/pr100711-3.c index 98cc1c3..ea60190 100644 --- a/gcc/testsuite/gcc.target/i386/pr100711-3.c +++ b/gcc/testsuite/gcc.target/i386/pr100711-3.c @@ -39,4 +39,4 @@ v8di foo_v8di (long long a, v8di b) /* { dg-final { scan-assembler-times "vpandn" 4 { target { ! ia32 } } } } */ /* { dg-final { scan-assembler-times "vpandn" 2 { target { ia32 } } } } */ -/* { dg-final { scan-assembler-times "vpternlog\[dq\]\[ \\t\]+\\\$0x44" 2 { target { ia32 } } } } */ +/* { dg-final { scan-assembler-times "vpternlog\[dq\]\[ \\t\]+\\\$80" 2 { target { ia32 } } } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr100711-4.c b/gcc/testsuite/gcc.target/i386/pr100711-4.c index 26152d6..4ca1292 100644 --- a/gcc/testsuite/gcc.target/i386/pr100711-4.c +++ b/gcc/testsuite/gcc.target/i386/pr100711-4.c @@ -39,4 +39,4 @@ v8di foo_v8di (long long a, v8di b) /* { dg-final { scan-assembler-times "vpternlog\[dq\]\[ \\t\]+\\\$207" 4 { target { ! ia32 } } } } */ /* { dg-final { scan-assembler-times "vpternlogd\[ \\t\]+\\\$207" 2 { target { ia32 } } } } */ -/* { dg-final { scan-assembler-times "vpternlog\[dq\]\[ \\t\]+\\\$0xdd" 2 { target { ia32 } } } } */ +/* { dg-final { scan-assembler-times "vpternlog\[dq\]\[ \\t\]+\\\$245" 2 { target { ia32 } } } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr100711-5.c b/gcc/testsuite/gcc.target/i386/pr100711-5.c index 820bed8..640787e 100644 --- a/gcc/testsuite/gcc.target/i386/pr100711-5.c +++ b/gcc/testsuite/gcc.target/i386/pr100711-5.c @@ -39,5 +39,5 @@ v8di foo_v8di (long long a, v8di b) /* { dg-final { scan-assembler-times "vpternlog\[dq\]\[ \\t\]+\\\$195" 4 { target { ! ia32 } } } } */ /* { dg-final { scan-assembler-times "vpternlogd\[ \\t\]+\\\$195" 2 { target { ia32 } } } } */ -/* { dg-final { scan-assembler-times "vpternlog\[dq\]\[ \\t\]+\\\$0x99" 2 { target { ia32 } } } } */ +/* { dg-final { scan-assembler-times "vpternlog\[dq\]\[ \\t\]+\\\$165" 2 { target { ia32 } } } } */