From patchwork Wed Jun 26 17:05:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Carl Love X-Patchwork-Id: 1952730 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256 header.s=pp1 header.b=fKpZuQyw; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4W8Slq6PmVz20X6 for ; Thu, 27 Jun 2024 03:06:31 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 1B4463875411 for ; Wed, 26 Jun 2024 17:06:29 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) by sourceware.org (Postfix) with ESMTPS id F3C943875426 for ; Wed, 26 Jun 2024 17:06:05 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org F3C943875426 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=linux.ibm.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org F3C943875426 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=148.163.158.5 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1719421568; cv=none; b=sssFzVY/YzzYwqDdIHTbJnrryn3YLFmL+UybL4MvdVVxH4MYjznyYExjw6dHlLXpdNmMc4k2xeXD2WsiofQM/G8w5elr+IanGudbju/aWCkLO0EGdZKUxXpKoT/aqi2wkGy4rO7WY/rzoIT0SF0i8P2S/99zXXpfPYdQevzK4Bg= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1719421568; c=relaxed/simple; bh=ElmxZDNxPMYtmVAn6sJ2AF8n8MOPjbSDYw0TGHm0cX8=; h=DKIM-Signature:Message-ID:Date:MIME-Version:From:Subject:To; b=n0iXn927vAHQYuKJ0hYW4l/z3riGdS5WyI57ASWcyP0iQbLVW7e35KP22z4VCKTYrMLW+VIZJBumUrEYFt+86gKOwTgY1x8iXnfuBFrGiBpMmmuAsdtdmOFbKkcILpDIYWJqRWAcHmLVgblElBl19bsA7f6ZvWlC6CHIB1SQ9Y4= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from pps.filterd (m0353724.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 45QGRIUh025760; Wed, 26 Jun 2024 17:06:05 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h= message-id:date:mime-version:from:subject:to:content-type :content-transfer-encoding; s=pp1; bh=EkNaoSS4j58/o9AAK46fXKcbVv I0dzttRwiTueBEljs=; b=fKpZuQywINYB3ymJvTMMWtve522zvPxsi1iGJnt9iy 4Ryk9pfQuzPANEKJ7Mlm6YBsK4LmYDnIYEFgPTJTgmLs4BFh5b5YOH7JPJgaqM/g OAGd6IYZIqLbKTzo95M0W9QJdwNjuFkYEQZkAQkY3S8nzjuz6Ua1HnB3jjU0vOFZ 8TXPESmLJKWSh1pKlamioLAcW1xsx7pkj6+6tEkJkSlqL94cCbsSBLgjFvrRC1Pk gdQMYH7fwy2FXJyEtW3qL+/Xeu7uG6fEre1puaQ9Jvh2uVfytnkwsUnalLBiq5fa lJIznA0OFmK9SbQBv4mBeGD1QIsiagjresnSZlS5w2SQ== Received: from ppma23.wdc07v.mail.ibm.com (5d.69.3da9.ip4.static.sl-reverse.com [169.61.105.93]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 400nnj8bjw-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 26 Jun 2024 17:06:05 +0000 (GMT) Received: from pps.filterd (ppma23.wdc07v.mail.ibm.com [127.0.0.1]) by ppma23.wdc07v.mail.ibm.com (8.17.1.19/8.17.1.19) with ESMTP id 45QFgsqp000627; Wed, 26 Jun 2024 17:06:04 GMT Received: from smtprelay02.dal12v.mail.ibm.com ([172.16.1.4]) by ppma23.wdc07v.mail.ibm.com (PPS) with ESMTPS id 3yxaen5mpy-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 26 Jun 2024 17:06:04 +0000 Received: from smtpav04.wdc07v.mail.ibm.com (smtpav04.wdc07v.mail.ibm.com [10.39.53.231]) by smtprelay02.dal12v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 45QH61Kf28377568 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 26 Jun 2024 17:06:03 GMT Received: from smtpav04.wdc07v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 1211358045; Wed, 26 Jun 2024 17:06:01 +0000 (GMT) Received: from smtpav04.wdc07v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 3494558062; Wed, 26 Jun 2024 17:06:00 +0000 (GMT) Received: from [9.67.67.158] (unknown [9.67.67.158]) by smtpav04.wdc07v.mail.ibm.com (Postfix) with ESMTP; Wed, 26 Jun 2024 17:06:00 +0000 (GMT) Message-ID: <537f6ea8-12a2-45aa-b3e5-a164b3982bc0@linux.ibm.com> Date: Wed, 26 Jun 2024 10:05:59 -0700 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US From: Carl Love Subject: [PATCH] rs6000, update vec_ld, vec_lde, vec_st and vec_ste, documentation To: gcc-patches@gcc.gnu.org, Segher Boessenkool , "bergner@linux.ibm.com" , "Kewen.Lin" , Carl Love X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: ZA0r_B-g3FtevJCu95Oe949AbyGtQ0Q9 X-Proofpoint-GUID: ZA0r_B-g3FtevJCu95Oe949AbyGtQ0Q9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-26_08,2024-06-25_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 priorityscore=1501 suspectscore=0 lowpriorityscore=0 bulkscore=0 mlxlogscore=999 clxscore=1015 malwarescore=0 adultscore=0 spamscore=0 phishscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2406140001 definitions=main-2406260124 X-Spam-Status: No, score=-10.3 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org GCC maintainers: The following patch updates the user documentation for the vec_ld, vec_lde, vec_st and vec_ste built-ins to make it clearer that there are data alignment requirements for these built-ins. If the data alignment requirements are not followed, the data loaded or stored by these built-ins will be wrong. Please let me know if this patch is acceptable for mainline. Thanks. Carl ---------------------------------------------------- rs6000, update vec_ld, vec_lde, vec_st and vec_ste documentation Use of the vec_ld and vec_st built-ins require that the data be 16-byte aligned to work properly. Add some additional text to the existing documentation to make this clearer to the user. Similarly, the vec_lde and vec_ste built-ins also have data alignment requirements based on the size of the vector element. Update the documentation to make this clear to the user. gcc/ChangeLog: * doc/extend.texi: Add clarification for the use of the vec_ld vec_st, vec_lde and vec_ste built-ins. --- gcc/doc/extend.texi | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index ee3644a5264..55faded17b9 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -22644,10 +22644,17 @@ vector unsigned char vec_xxsldi (vector unsigned char, @end smallexample Note that the @samp{vec_ld} and @samp{vec_st} built-in functions always -generate the AltiVec @samp{LVX} and @samp{STVX} instructions even -if the VSX instruction set is available. The @samp{vec_vsx_ld} and -@samp{vec_vsx_st} built-in functions always generate the VSX @samp{LXVD2X}, -@samp{LXVW4X}, @samp{STXVD2X}, and @samp{STXVW4X} instructions. +generate the AltiVec @samp{LVX}, and @samp{STVX} instructions. The +instructions mask off the lower 4 bits of the effective address thus requiring +the data to be 16-byte aligned to work properly. The @samp{vec_lde} and +@samp{vec_ste} built-in functions operate on vectors of bytes, short integer, +integer, and float. The corresponding AltiVec instructions @samp{LVEBX}, +@samp{LVEHX}, @samp{LVEWX}, @samp{STVEBX}, @samp{STVEHX}, @samp{STVEWX} mask +off the lower bits of the effective address based on the size of the data. +Thus the data must be aligned to the size of the vector element to work +properly. The @samp{vec_vsx_ld} and @samp{vec_vsx_st} built-in functions +always generate the VSX @samp{LXVD2X}, @samp{LXVW4X}, @samp{STXVD2X}, and +@samp{STXVW4X} instructions. @node PowerPC AltiVec Built-in Functions Available on ISA 2.07 @subsubsection PowerPC AltiVec Built-in Functions Available on ISA 2.07