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Wed, 26 Jun 2024 06:00:33 -0700 (PDT) Message-ID: <0da58898-8d0b-408e-81bf-3b85d3b501b3@gmail.com> Date: Wed, 26 Jun 2024 07:00:32 -0600 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Beta Content-Language: en-US From: Jeff Law To: "gcc-patches@gcc.gnu.org" Subject: [committed][RISC-V] Fix expected output for thead store pair test X-Spam-Status: No, score=-8.4 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Surya's patch to IRA has improved the code we generate for one of the thead store pair tests for both rv32 and rv64. This patch adjusts the expectations of that test. I've verified that the test now passes on rv32 and rv64 in my tester. Pushing to the trunk. Jeff commit 03a3dffa43145f80548d32b266b9b87be07b52ee Author: Jeff Law Date: Wed Jun 26 06:59:26 2024 -0600 [committed][RISC-V] Fix expected output for thead store pair test Surya's patch to IRA has improved the code we generate for one of the thead store pair tests for both rv32 and rv64. This patch adjusts the expectations of that test. I've verified that the test now passes on rv32 and rv64 in my tester. Pushing to the trunk. gcc/testsuite * gcc.target/riscv/xtheadmempair-3.c: Update expected output. diff --git a/gcc/testsuite/gcc.target/riscv/xtheadmempair-3.c b/gcc/testsuite/gcc.target/riscv/xtheadmempair-3.c index 5dec702819a..99a6ae7f4d7 100644 --- a/gcc/testsuite/gcc.target/riscv/xtheadmempair-3.c +++ b/gcc/testsuite/gcc.target/riscv/xtheadmempair-3.c @@ -17,13 +17,11 @@ void bar (xlen_t, xlen_t, xlen_t, xlen_t, xlen_t, xlen_t, xlen_t, xlen_t); void baz (xlen_t a, xlen_t b, xlen_t c, xlen_t d, xlen_t e, xlen_t f, xlen_t g, xlen_t h) { foo (a, b, c, d, e, f, g, h); - /* RV64: We don't use 0(sp), therefore we can only get 3 mempairs. */ - /* RV32: We don't use 0(sp)-8(sp), therefore we can only get 2 mempairs. */ bar (a, b, c, d, e, f, g, h); } -/* { dg-final { scan-assembler-times "th.ldd\t" 3 { target { rv64 } } } } */ -/* { dg-final { scan-assembler-times "th.sdd\t" 3 { target { rv64 } } } } */ +/* { dg-final { scan-assembler-times "th.ldd\t" 4 { target { rv64 } } } } */ +/* { dg-final { scan-assembler-times "th.sdd\t" 4 { target { rv64 } } } } */ -/* { dg-final { scan-assembler-times "th.lwd\t" 2 { target { rv32 } } } } */ -/* { dg-final { scan-assembler-times "th.swd\t" 2 { target { rv32 } } } } */ +/* { dg-final { scan-assembler-times "th.lwd\t" 4 { target { rv32 } } } } */ +/* { dg-final { scan-assembler-times "th.swd\t" 4 { target { rv32 } } } } */