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[125.229.129.140]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-716b4d54ea2sm6495899a12.54.2024.06.24.23.57.22 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Jun 2024 23:57:23 -0700 (PDT) From: You-Sheng Yang To: kernel-team@lists.ubuntu.com Subject: [PATCH 1/4][SRU][Noble] HID: amd_sfh: Increase sensor command timeout Date: Tue, 25 Jun 2024 14:56:58 +0800 Message-ID: <20240625065702.3341835-2-vicamo.yang@canonical.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240625065702.3341835-1-vicamo.yang@canonical.com> References: <20240625065702.3341835-1-vicamo.yang@canonical.com> MIME-Version: 1.0 Received-SPF: pass client-ip=209.85.166.179; envelope-from=vicamo@gmail.com; helo=mail-il1-f179.google.com X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Basavaraj Natikar BugLink: https://bugs.launchpad.net/bugs/2058331 During the initialization sensors may take some time to respond. Hence, increase the sensor command timeouts in order to obtain status responses within a maximum timeout. Co-developed-by: Akshata MukundShetty Signed-off-by: Akshata MukundShetty Signed-off-by: Basavaraj Natikar Signed-off-by: Jiri Kosina (cherry picked from commit 333861f4cca6d2c959ca2876587c42767853dccc) Signed-off-by: You-Sheng Yang --- drivers/hid/amd-sfh-hid/amd_sfh_pcie.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/hid/amd-sfh-hid/amd_sfh_pcie.c b/drivers/hid/amd-sfh-hid/amd_sfh_pcie.c index ce449da08e9b..8c1809c7d1f7 100644 --- a/drivers/hid/amd-sfh-hid/amd_sfh_pcie.c +++ b/drivers/hid/amd-sfh-hid/amd_sfh_pcie.c @@ -41,11 +41,11 @@ static int amd_sfh_wait_response_v2(struct amd_mp2_dev *mp2, u8 sid, u32 sensor_ { union cmd_response cmd_resp; - /* Get response with status within a max of 1600 ms timeout */ + /* Get response with status within a max of 10 seconds timeout */ if (!readl_poll_timeout(mp2->mmio + AMD_P2C_MSG(0), cmd_resp.resp, (cmd_resp.response_v2.response == sensor_sts && cmd_resp.response_v2.status == 0 && (sid == 0xff || - cmd_resp.response_v2.sensor_id == sid)), 500, 1600000)) + cmd_resp.response_v2.sensor_id == sid)), 500, 10000000)) return cmd_resp.response_v2.response; return SENSOR_DISABLED; From patchwork Tue Jun 25 06:56:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: You-Sheng Yang X-Patchwork-Id: 1951949 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ubuntu.com (client-ip=185.125.189.65; helo=lists.ubuntu.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=patchwork.ozlabs.org) Received: from lists.ubuntu.com (lists.ubuntu.com [185.125.189.65]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4W7bHf1Wc7z20Z9 for ; Tue, 25 Jun 2024 16:57:34 +1000 (AEST) Received: from localhost ([127.0.0.1] helo=lists.ubuntu.com) by lists.ubuntu.com with esmtp (Exim 4.86_2) (envelope-from ) id 1sM07M-0003V4-T3; Tue, 25 Jun 2024 06:57:28 +0000 Received: from mail-oo1-f42.google.com ([209.85.161.42]) by lists.ubuntu.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1sM07L-0003Tv-RK for kernel-team@lists.ubuntu.com; Tue, 25 Jun 2024 06:57:27 +0000 Received: by mail-oo1-f42.google.com with SMTP id 006d021491bc7-5ba70a0ed75so2589968eaf.1 for ; Mon, 24 Jun 2024 23:57:27 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1719298646; x=1719903446; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/it8KEPfPGsnt9OK/5rfmNPf++giqVW2GH8BF9XGC2c=; b=Sb4z+rS5+dnkVUHdMblwh0tv2P/CePnNPB3fxwbm/mDYzk/YRozLSEJbUq35beKGOp qqKIhTtX4PxOJW91Z7CV8H+o5iqkBsVvPzg5lgG9LkdLaeOuiUDEuULluV1aYkDkIt1g lHiUfuefnlTXNjrMosbQiCLcHXQaLPnn7e+4sitHM7+dmYsj9gwBfAQRlEQXod00yvQS cMQPaBLKo+T6uc5WraXeW6uXC4FMz55JTee0/ZI/K6euwGhDtLyEBy1XA0sO+mT2y2Tj Y2QThsQa9+SmPrm9SK5TLk5/5XjLS7hU9URtIY298+ht4JK1xPCk/9s61Y78MDak4nIR Revg== X-Gm-Message-State: AOJu0YwYZzv6ogvekxJdNkay3dTFIGoHw5cCPKd+h46pvZbfuho1aa/k WqnYzrV2OXdUqUdwuTV90e8c12LST72xG+2wPCkUSbhzQvMjD8Xp4uVpFxT4 X-Google-Smtp-Source: AGHT+IHoTjXnUsnAgnjxaWQuhvKhepTj4F4i+C1eQwBuVSlRM+pMpUclROF1Mjih0AFFqSon4rwufg== X-Received: by 2002:a05:6358:b313:b0:19f:569e:673 with SMTP id e5c5f4694b2df-1a23fd8d5a7mr791459755d.29.1719298645716; Mon, 24 Jun 2024 23:57:25 -0700 (PDT) Received: from localhost.localdomain (125-229-129-140.hinet-ip.hinet.net. [125.229.129.140]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-716b4d54ea2sm6495899a12.54.2024.06.24.23.57.24 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Jun 2024 23:57:25 -0700 (PDT) From: You-Sheng Yang To: kernel-team@lists.ubuntu.com Subject: [PATCH 2/4][SRU][Noble] HID: amd_sfh: Improve boot time when SFH is available Date: Tue, 25 Jun 2024 14:56:59 +0800 Message-ID: <20240625065702.3341835-3-vicamo.yang@canonical.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240625065702.3341835-1-vicamo.yang@canonical.com> References: <20240625065702.3341835-1-vicamo.yang@canonical.com> MIME-Version: 1.0 Received-SPF: pass client-ip=209.85.161.42; envelope-from=vicamo@gmail.com; helo=mail-oo1-f42.google.com X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Basavaraj Natikar BugLink: https://bugs.launchpad.net/bugs/2058331 AMD SFH load takes longer time in initialization. Hence split and defer initialization code to improve SFH module load time and boot time of the system when SFH is available. Signed-off-by: Basavaraj Natikar Signed-off-by: Jiri Kosina (cherry picked from commit 2105e8e00da4673266e217653292fef6acefde03) Signed-off-by: You-Sheng Yang --- drivers/hid/amd-sfh-hid/amd_sfh_common.h | 2 + drivers/hid/amd-sfh-hid/amd_sfh_pcie.c | 75 ++++++++++++++++++++---- 2 files changed, 64 insertions(+), 13 deletions(-) diff --git a/drivers/hid/amd-sfh-hid/amd_sfh_common.h b/drivers/hid/amd-sfh-hid/amd_sfh_common.h index a1950bc6e6ce..ef5551c1eec5 100644 --- a/drivers/hid/amd-sfh-hid/amd_sfh_common.h +++ b/drivers/hid/amd-sfh-hid/amd_sfh_common.h @@ -53,6 +53,8 @@ struct amd_mp2_dev { /* mp2 active control status */ u32 mp2_acs; struct sfh_dev_status dev_en; + struct work_struct work; + u8 init_done; }; struct amd_mp2_ops { diff --git a/drivers/hid/amd-sfh-hid/amd_sfh_pcie.c b/drivers/hid/amd-sfh-hid/amd_sfh_pcie.c index 8c1809c7d1f7..495ec1179ee5 100644 --- a/drivers/hid/amd-sfh-hid/amd_sfh_pcie.c +++ b/drivers/hid/amd-sfh-hid/amd_sfh_pcie.c @@ -10,6 +10,7 @@ #include #include +#include #include #include #include @@ -329,6 +330,48 @@ static const struct dmi_system_id dmi_nodevs[] = { { } }; +static void sfh1_1_init_work(struct work_struct *work) +{ + struct amd_mp2_dev *mp2 = container_of(work, struct amd_mp2_dev, work); + struct pci_dev *pdev = mp2->pdev; + int rc; + + rc = mp2->sfh1_1_ops->init(mp2); + if (rc) { + dev_err(&pdev->dev, "sfh1_1_init failed err %d\n", rc); + return; + } + + amd_sfh_clear_intr(mp2); + mp2->init_done = 1; +} + +static void sfh_init_work(struct work_struct *work) +{ + struct amd_mp2_dev *mp2 = container_of(work, struct amd_mp2_dev, work); + struct pci_dev *pdev = mp2->pdev; + int rc; + + rc = amd_sfh_hid_client_init(mp2); + if (rc) { + amd_sfh_clear_intr(mp2); + dev_err(&pdev->dev, "amd_sfh_hid_client_init failed err %d\n", rc); + return; + } + + amd_sfh_clear_intr(mp2); + mp2->init_done = 1; +} + +static void amd_sfh_remove(struct pci_dev *pdev) +{ + struct amd_mp2_dev *mp2 = pci_get_drvdata(pdev); + + flush_work(&mp2->work); + if (mp2->init_done) + mp2->mp2_ops->remove(mp2); +} + static int amd_mp2_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) { struct amd_mp2_dev *privdata; @@ -367,10 +410,12 @@ static int amd_mp2_pci_probe(struct pci_dev *pdev, const struct pci_device_id *i privdata->sfh1_1_ops = (const struct amd_sfh1_1_ops *)id->driver_data; if (privdata->sfh1_1_ops) { - rc = privdata->sfh1_1_ops->init(privdata); + rc = devm_work_autocancel(&pdev->dev, &privdata->work, sfh1_1_init_work); if (rc) return rc; - goto init_done; + + schedule_work(&privdata->work); + return 0; } mp2_select_ops(privdata); @@ -381,33 +426,34 @@ static int amd_mp2_pci_probe(struct pci_dev *pdev, const struct pci_device_id *i return rc; } - rc = amd_sfh_hid_client_init(privdata); + rc = devm_work_autocancel(&pdev->dev, &privdata->work, sfh_init_work); if (rc) { amd_sfh_clear_intr(privdata); - if (rc != -EOPNOTSUPP) - dev_err(&pdev->dev, "amd_sfh_hid_client_init failed\n"); return rc; } -init_done: - amd_sfh_clear_intr(privdata); - - return devm_add_action_or_reset(&pdev->dev, privdata->mp2_ops->remove, privdata); + schedule_work(&privdata->work); + return 0; } static void amd_sfh_shutdown(struct pci_dev *pdev) { struct amd_mp2_dev *mp2 = pci_get_drvdata(pdev); - if (mp2 && mp2->mp2_ops) - mp2->mp2_ops->stop_all(mp2); + if (mp2) { + flush_work(&mp2->work); + if (mp2->init_done) + mp2->mp2_ops->stop_all(mp2); + } } static int __maybe_unused amd_mp2_pci_resume(struct device *dev) { struct amd_mp2_dev *mp2 = dev_get_drvdata(dev); - mp2->mp2_ops->resume(mp2); + flush_work(&mp2->work); + if (mp2->init_done) + mp2->mp2_ops->resume(mp2); return 0; } @@ -416,7 +462,9 @@ static int __maybe_unused amd_mp2_pci_suspend(struct device *dev) { struct amd_mp2_dev *mp2 = dev_get_drvdata(dev); - mp2->mp2_ops->suspend(mp2); + flush_work(&mp2->work); + if (mp2->init_done) + mp2->mp2_ops->suspend(mp2); return 0; } @@ -438,6 +486,7 @@ static struct pci_driver amd_mp2_pci_driver = { .probe = amd_mp2_pci_probe, .driver.pm = &amd_mp2_pm_ops, .shutdown = amd_sfh_shutdown, + .remove = amd_sfh_remove, }; module_pci_driver(amd_mp2_pci_driver); From patchwork Tue Jun 25 06:57:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: You-Sheng Yang X-Patchwork-Id: 1951950 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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[125.229.129.140]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-716b4d54ea2sm6495899a12.54.2024.06.24.23.57.25 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Jun 2024 23:57:26 -0700 (PDT) From: You-Sheng Yang To: kernel-team@lists.ubuntu.com Subject: [PATCH 3/4][SRU][Noble] HID: amd_sfh: Extend MP2 register access to SFH Date: Tue, 25 Jun 2024 14:57:00 +0800 Message-ID: <20240625065702.3341835-4-vicamo.yang@canonical.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240625065702.3341835-1-vicamo.yang@canonical.com> References: <20240625065702.3341835-1-vicamo.yang@canonical.com> MIME-Version: 1.0 Received-SPF: pass client-ip=209.85.215.180; envelope-from=vicamo@gmail.com; helo=mail-pg1-f180.google.com X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Basavaraj Natikar BugLink: https://bugs.launchpad.net/bugs/2058331 Various MP2 register sets are supported by newer processors. Therefore, extend MP2 register access to SFH. Signed-off-by: Basavaraj Natikar Signed-off-by: Jiri Kosina (cherry picked from commit 6296562f30b1caf4b5f44e0c89c8f5cbfdb14b4a) Signed-off-by: You-Sheng Yang --- drivers/hid/amd-sfh-hid/amd_sfh_common.h | 14 ++++++++++++++ drivers/hid/amd-sfh-hid/amd_sfh_pcie.c | 9 ++++++--- drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_desc.c | 2 +- drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_init.c | 4 ++-- drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_interface.c | 10 +++++----- 5 files changed, 28 insertions(+), 11 deletions(-) diff --git a/drivers/hid/amd-sfh-hid/amd_sfh_common.h b/drivers/hid/amd-sfh-hid/amd_sfh_common.h index ef5551c1eec5..e5620d7db569 100644 --- a/drivers/hid/amd-sfh-hid/amd_sfh_common.h +++ b/drivers/hid/amd-sfh-hid/amd_sfh_common.h @@ -19,6 +19,9 @@ #define AMD_C2P_MSG(regno) (0x10500 + ((regno) * 4)) #define AMD_P2C_MSG(regno) (0x10680 + ((regno) * 4)) +#define AMD_C2P_MSG_V1(regno) (0x10900 + ((regno) * 4)) +#define AMD_P2C_MSG_V1(regno) (0x10500 + ((regno) * 4)) + #define SENSOR_ENABLED 4 #define SENSOR_DISABLED 5 @@ -55,6 +58,7 @@ struct amd_mp2_dev { struct sfh_dev_status dev_en; struct work_struct work; u8 init_done; + u8 rver; }; struct amd_mp2_ops { @@ -81,4 +85,14 @@ void amd_sfh_clear_intr_v2(struct amd_mp2_dev *privdata); int amd_sfh_irq_init_v2(struct amd_mp2_dev *privdata); void amd_sfh_clear_intr(struct amd_mp2_dev *privdata); int amd_sfh_irq_init(struct amd_mp2_dev *privdata); + +static inline u64 amd_get_c2p_val(struct amd_mp2_dev *mp2, u32 idx) +{ + return mp2->rver == 1 ? AMD_C2P_MSG_V1(idx) : AMD_C2P_MSG(idx); +} + +static inline u64 amd_get_p2c_val(struct amd_mp2_dev *mp2, u32 idx) +{ + return mp2->rver == 1 ? AMD_P2C_MSG_V1(idx) : AMD_P2C_MSG(idx); +} #endif diff --git a/drivers/hid/amd-sfh-hid/amd_sfh_pcie.c b/drivers/hid/amd-sfh-hid/amd_sfh_pcie.c index 495ec1179ee5..9e97c26c4482 100644 --- a/drivers/hid/amd-sfh-hid/amd_sfh_pcie.c +++ b/drivers/hid/amd-sfh-hid/amd_sfh_pcie.c @@ -99,9 +99,9 @@ static void amd_stop_all_sensor_v2(struct amd_mp2_dev *privdata) void amd_sfh_clear_intr_v2(struct amd_mp2_dev *privdata) { - if (readl(privdata->mmio + AMD_P2C_MSG(4))) { - writel(0, privdata->mmio + AMD_P2C_MSG(4)); - writel(0xf, privdata->mmio + AMD_P2C_MSG(5)); + if (readl(privdata->mmio + amd_get_p2c_val(privdata, 4))) { + writel(0, privdata->mmio + amd_get_p2c_val(privdata, 4)); + writel(0xf, privdata->mmio + amd_get_p2c_val(privdata, 5)); } } @@ -410,6 +410,9 @@ static int amd_mp2_pci_probe(struct pci_dev *pdev, const struct pci_device_id *i privdata->sfh1_1_ops = (const struct amd_sfh1_1_ops *)id->driver_data; if (privdata->sfh1_1_ops) { + if (boot_cpu_data.x86 >= 0x1A) + privdata->rver = 1; + rc = devm_work_autocancel(&pdev->dev, &privdata->work, sfh1_1_init_work); if (rc) return rc; diff --git a/drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_desc.c b/drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_desc.c index 33fbdde8aff0..c8916afefa62 100644 --- a/drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_desc.c +++ b/drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_desc.c @@ -251,7 +251,7 @@ static u8 get_input_rep(u8 current_index, int sensor_idx, int report_id, break; case HPD_IDX: get_common_inputs(&hpd_input.common_property, report_id); - hpdstatus.val = readl(mp2->mmio + AMD_C2P_MSG(4)); + hpdstatus.val = readl(mp2->mmio + amd_get_c2p_val(mp2, 4)); hpd_input.human_presence = hpdstatus.shpd.presence; report_size = sizeof(hpd_input); memcpy(input_report, &hpd_input, sizeof(hpd_input)); diff --git a/drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_init.c b/drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_init.c index 9dbe6f4cb294..5b24d5f63701 100644 --- a/drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_init.c +++ b/drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_init.c @@ -172,7 +172,7 @@ static int amd_sfh1_1_hid_client_init(struct amd_mp2_dev *privdata) if (rc) goto cleanup; - writel(0, privdata->mmio + AMD_P2C_MSG(0)); + writel(0, privdata->mmio + amd_get_p2c_val(privdata, 0)); mp2_ops->start(privdata, info); status = amd_sfh_wait_for_response (privdata, cl_data->sensor_idx[i], ENABLE_SENSOR); @@ -298,7 +298,7 @@ static void amd_sfh_set_ops(struct amd_mp2_dev *mp2) int amd_sfh1_1_init(struct amd_mp2_dev *mp2) { - u32 phy_base = readl(mp2->mmio + AMD_C2P_MSG(22)); + u32 phy_base = readl(mp2->mmio + amd_get_c2p_val(mp2, 22)); struct device *dev = &mp2->pdev->dev; struct sfh_base_info binfo; int rc; diff --git a/drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_interface.c b/drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_interface.c index ae36312bc236..2de2668a0277 100644 --- a/drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_interface.c +++ b/drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_interface.c @@ -20,7 +20,7 @@ static int amd_sfh_wait_response(struct amd_mp2_dev *mp2, u8 sid, u32 cmd_id) struct sfh_cmd_response cmd_resp; /* Get response with status within a max of 10000 ms timeout */ - if (!readl_poll_timeout(mp2->mmio + AMD_P2C_MSG(0), cmd_resp.resp, + if (!readl_poll_timeout(mp2->mmio + amd_get_p2c_val(mp2, 0), cmd_resp.resp, (cmd_resp.response.response == 0 && cmd_resp.response.cmd_id == cmd_id && (sid == 0xff || cmd_resp.response.sensor_id == sid)), 500, 10000000)) @@ -39,7 +39,7 @@ static void amd_start_sensor(struct amd_mp2_dev *privdata, struct amd_mp2_sensor cmd_base.cmd.sub_cmd_value = 1; cmd_base.cmd.sensor_id = info.sensor_idx; - writel(cmd_base.ul, privdata->mmio + AMD_C2P_MSG(0)); + writel(cmd_base.ul, privdata->mmio + amd_get_c2p_val(privdata, 0)); } static void amd_stop_sensor(struct amd_mp2_dev *privdata, u16 sensor_idx) @@ -52,8 +52,8 @@ static void amd_stop_sensor(struct amd_mp2_dev *privdata, u16 sensor_idx) cmd_base.cmd.sub_cmd_value = 1; cmd_base.cmd.sensor_id = sensor_idx; - writeq(0x0, privdata->mmio + AMD_C2P_MSG(1)); - writel(cmd_base.ul, privdata->mmio + AMD_C2P_MSG(0)); + writeq(0x0, privdata->mmio + amd_get_c2p_val(privdata, 1)); + writel(cmd_base.ul, privdata->mmio + amd_get_c2p_val(privdata, 0)); } static void amd_stop_all_sensor(struct amd_mp2_dev *privdata) @@ -66,7 +66,7 @@ static void amd_stop_all_sensor(struct amd_mp2_dev *privdata) /* 0xf indicates all sensors */ cmd_base.cmd.sensor_id = 0xf; - writel(cmd_base.ul, privdata->mmio + AMD_C2P_MSG(0)); + writel(cmd_base.ul, privdata->mmio + amd_get_c2p_val(privdata, 0)); } static struct amd_mp2_ops amd_sfh_ops = { From patchwork Tue Jun 25 06:57:01 2024 Content-Type: text/plain; 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[125.229.129.140]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-716b4d54ea2sm6495899a12.54.2024.06.24.23.57.27 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Jun 2024 23:57:28 -0700 (PDT) From: You-Sheng Yang To: kernel-team@lists.ubuntu.com Subject: [PATCH 4/4][SRU][Noble] HID: amd_sfh: Set the AMD SFH driver to depend on x86 Date: Tue, 25 Jun 2024 14:57:01 +0800 Message-ID: <20240625065702.3341835-5-vicamo.yang@canonical.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240625065702.3341835-1-vicamo.yang@canonical.com> References: <20240625065702.3341835-1-vicamo.yang@canonical.com> MIME-Version: 1.0 Received-SPF: pass client-ip=209.85.161.47; envelope-from=vicamo@gmail.com; helo=mail-oo1-f47.google.com X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Basavaraj Natikar BugLink: https://bugs.launchpad.net/bugs/2058331 Considering that amd_sfh exists only on AMD platforms, set the AMD SFH driver to depend on x86 to avoid build warnings or errors on other architectures, as shown below. drivers/hid/amd-sfh-hid/amd_sfh_pcie.c: In function 'amd_mp2_pci_probe': drivers/hid/amd-sfh-hid/amd_sfh_pcie.c:413:21: error: 'boot_cpu_data' undeclared (first use in this function); did you mean 'boot_cpu_hwid'? 413 | if (boot_cpu_data.x86 >= 0x1A) | ^~~~~~~~~~~~~ | boot_cpu_hwid Fixes: 6296562f30b1 ("HID: amd_sfh: Extend MP2 register access to SFH") Reported-by: Stephen Rothwell Closes: https://lore.kernel.org/all/20240228145648.41c493ec@canb.auug.org.au/ Signed-off-by: Basavaraj Natikar Signed-off-by: Jiri Kosina (cherry picked from commit 90184f90c9ac559062a04aca72e5d05730164de0) Signed-off-by: You-Sheng Yang --- drivers/hid/amd-sfh-hid/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/hid/amd-sfh-hid/Kconfig b/drivers/hid/amd-sfh-hid/Kconfig index af752dd3a340..329de5e12c1a 100644 --- a/drivers/hid/amd-sfh-hid/Kconfig +++ b/drivers/hid/amd-sfh-hid/Kconfig @@ -6,6 +6,7 @@ menu "AMD SFH HID Support" config AMD_SFH_HID tristate "AMD Sensor Fusion Hub" depends on HID + depends on X86 help If you say yes to this option, support will be included for the AMD Sensor Fusion Hub.