From patchwork Sat Jun 22 08:24:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Sayle X-Patchwork-Id: 1951033 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=nextmovesoftware.com header.i=@nextmovesoftware.com header.a=rsa-sha256 header.s=default header.b=djCWmdSX; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4W5nNZ1CWLz20Wk for ; Sat, 22 Jun 2024 18:25:30 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id C0D23382FAF4 for ; Sat, 22 Jun 2024 08:25:24 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from server.nextmovesoftware.com (server.nextmovesoftware.com [69.48.154.134]) by sourceware.org (Postfix) with ESMTPS id DC4053858C98 for ; Sat, 22 Jun 2024 08:24:52 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org DC4053858C98 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=nextmovesoftware.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=nextmovesoftware.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org DC4053858C98 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=69.48.154.134 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1719044695; cv=none; b=SIAzn8zvV86WyO0R0e1klOUchh1Ew9Ja9YjbHrafm2OzxftXRn9S0SoLeFWfRlo19bIIecTmcNJt/RDg6Bi2xeNj0Xv3T4mei48ojDibucl7W8aXSbTbxkwyTQyU69wF+W8xhkeO5aoIENofyFYC1fj5LrXbqKZil6Dh60tRGMo= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1719044695; c=relaxed/simple; bh=Xu0dRKgExQD901/xi+ImGI8mIxR35r0u9hPVqLkyevc=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=YMf2Tbb2S9SzXBigTqMY8EgZbfovYngbky4JO96BKOJRwKw549L6x0yWfiCbMMo/YbX0m6XDYkiPQto5URsdK0Z8UbpOtSP4M90nJC5Y4ZYmlpQdzWpx/txIHTTd32WYO/CqMSjUSCOaWzlrfmW1SpUg3D5wWcmRJEvMTfb41xo= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=nextmovesoftware.com; s=default; h=Content-Type:MIME-Version:Message-ID: Date:Subject:Cc:To:From:Sender:Reply-To:Content-Transfer-Encoding:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:In-Reply-To:References:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=00W4aXfITYcQ6Y+/BYxJkwIcBxCFCFhZk5EuYbZN43Q=; b=djCWmdSX4NAyhT0qQlvNkrTsNV o1Mw9i09UiteLNcx8IVcdpr6z+htCIffrHVWabnArJjysJXw0qbaPNkGBqxpqFlIT/HHeLdU62FZa CJW+GwDgo8s8rvWZfQmoJmMw+sN8GYL5w56SHJEvzmw9sq6zFJmxlHip355tHuuduP+76OWFLUGkJ rd1RQPXr72AF0LzZFzrAEvUpaaXDwE696cD+iJynSkU6W3pyosc57xlDV3eeDUA04vbEhVcjATDVo fsha/Gl3KsK3go3peU0oYwXDtR4MKfo5w2SCNegChbBBJ1rUa68JY5ds9Wx1xCi/7yxX13w8UiQUX T45CLnng==; Received: from [168.86.198.82] (port=51918 helo=Dell) by server.nextmovesoftware.com with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.97.1) (envelope-from ) id 1sKw3H-0000000Aqpl-04hZ; Sat, 22 Jun 2024 04:24:51 -0400 From: "Roger Sayle" To: Cc: "'Claudiu Zissulescu'" , "'Claudiu Zissulescu'" Subject: [ARC PATCH] Improved SImode conditional moves (improves DImode shifts). Date: Sat, 22 Jun 2024 09:24:47 +0100 Message-ID: <01fb01dac47d$a5ca8500$f15f8f00$@nextmovesoftware.com> MIME-Version: 1.0 X-Mailer: Microsoft Outlook 16.0 Thread-Index: AdrEfOyoRH29A0+lSuqrLJw5uoLJvw== Content-Language: en-gb X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - server.nextmovesoftware.com X-AntiAbuse: Original Domain - gcc.gnu.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - nextmovesoftware.com X-Get-Message-Sender-Via: server.nextmovesoftware.com: authenticated_id: roger@nextmovesoftware.com X-Authenticated-Sender: server.nextmovesoftware.com: roger@nextmovesoftware.com X-Source: X-Source-Args: X-Source-Dir: X-Spam-Status: No, score=-12.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org This patch adds an alternative to ARC's *movsicc_insn to improve register allocation by allowing the input operands to be swapped by reversing the condition of the conditional move. A example of the benefits can be seen in the expansion of DImode shifts, where x << y currently generates not_s r12,r2 lsr_s r3,r0 asl_s r1,r1,r2 asl_s r0,r0,r2 lsr_s r3,r3,r12 btst_s r2,5 add_s r1,r1,r3 ;b,b,h mov_s r2,r0 ;4 mov.eq r2,r1 mov_s r1,r2 ;4 j_s.d [blink] sub.ne r0,r0,r0 with this patch, we can now generate: not_s r12,r2 lsr_s r3,r0 asl_s r1,r1,r2 asl_s r0,r0,r2 lsr_s r3,r3,r12 btst_s r2,5 add_s r1,r1,r3 ;b,b,h mov.ne r1,r0 j_s.d [blink] sub.ne r0,r0,r0 This issue is also described at https://github.com/foss-for-synopsys-dwc-arc-processors/gcc/issues/110 Tested with a cross-compiler to arc-linux hosted on x86_64, with no new (compile-only) regressions from make -k check. Ok for mainline if this passes Claudiu's and/or Jeff's testing? 2024-06-22 Roger Sayle gcc/ChangeLog * config/arc/arc.md (*movsicc_insn): Add an alternative that allows commuting of register operands using %D to swap the condition. gcc/testsuite/ChangeLog * gcc.target/arc/ashrdi-1.c: New test case. * gcc.target/arc/lshrdi-1.c: Likewise. * gcc.target/arc/shldi-1.c: Likewise. Thanks in advance. Roger diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md index 9004b6085a23..a603fe213af6 100644 --- a/gcc/config/arc/arc.md +++ b/gcc/config/arc/arc.md @@ -1631,11 +1631,11 @@ archs4x, archs4xd" ") (define_insn "*movsicc_insn" - [(set (match_operand:SI 0 "dest_reg_operand" "=w,w") + [(set (match_operand:SI 0 "dest_reg_operand" "=w,w,w") (if_then_else:SI (match_operator 3 "proper_comparison_operator" [(match_operand 4 "cc_register" "") (const_int 0)]) - (match_operand:SI 1 "nonmemory_operand" "cL,Cal") - (match_operand:SI 2 "register_operand" "0,0")))] + (match_operand:SI 1 "nonmemory_operand" "cL,Cal,0") + (match_operand:SI 2 "register_operand" "0,0,c")))] "" { if (rtx_equal_p (operands[1], const0_rtx) && GET_CODE (operands[3]) == NE @@ -1646,10 +1646,10 @@ archs4x, archs4xd" && rtx_equal_p (operands[1], constm1_rtx) && GET_CODE (operands[3]) == LTU) return "sbc.cs\\t%0,%0,%0"; - return "mov.%d3\\t%0,%1"; + return which_alternative == 2 ? "mov.%D3\\t%0,%2" : "mov.%d3\\t%0,%1"; } - [(set_attr "type" "cmove,cmove") - (set_attr "length" "4,8")]) + [(set_attr "type" "cmove,cmove,cmove") + (set_attr "length" "4,8,4")]) ;; When there's a mask of a single bit, and then a compare to 0 or 1, ;; if the single bit is the sign bit, then GCC likes to convert this diff --git a/gcc/testsuite/gcc.target/arc/ashrdi-1.c b/gcc/testsuite/gcc.target/arc/ashrdi-1.c new file mode 100644 index 000000000000..8138752d3df8 --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/ashrdi-1.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +long long foo(long long x, int y) +{ + return x >> y; +} + +/* { dg-final { scan-assembler-not "mov.eq" } } */ +/* { dg-final { scan-assembler-times "mov_s" 1 } } */ +/* { dg-final { scan-assembler-times "mov.ne" 2 } } */ diff --git a/gcc/testsuite/gcc.target/arc/lshrdi-1.c b/gcc/testsuite/gcc.target/arc/lshrdi-1.c new file mode 100644 index 000000000000..c3106801378a --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/lshrdi-1.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +unsigned long long foo(unsigned long long x, int y) +{ + return x >> y; +} + +/* { dg-final { scan-assembler-not "mov_s" } } */ +/* { dg-final { scan-assembler-not "mov.eq" } } */ +/* { dg-final { scan-assembler-times "mov.ne" 1 } } */ diff --git a/gcc/testsuite/gcc.target/arc/shldi-1.c b/gcc/testsuite/gcc.target/arc/shldi-1.c new file mode 100644 index 000000000000..734e04a9ebd9 --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/shldi-1.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +long long foo(long long x, int y) +{ + return x << y; +} + +/* { dg-final { scan-assembler-not "mov_s" } } */ +/* { dg-final { scan-assembler-not "mov.eq" } } */ +/* { dg-final { scan-assembler-times "mov.ne" 1 } } */